Glam girl Heddy Lamar may have used her good looks to good effect on the silver screen, but she put her smarts to better use as an inventor. During World War II, she co-patented a frequency-switching system for torpedo guidance that was considered years ahead of its time.
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| Number | Title | Issue Date |
| 8124535 | Method of fabricating solar cell A method of fabricating a solar cell is provided. A saw damage removal process is performed on a silicon substrate. A dry surface treatment is performed to a surface of the silicon substrate on form an irregular surface. A metal-activated selective oxidation is perf... | 02/28/2012 |
| 8124534 | Multiple exposure and single etch integration method A process including forming a silicon layer over a semiconductor wafer having features thereon and then selectively ion implanting in the silicon layer to form ion implanted regions. The step of selectively ion implanting is repeated as many times as necessary to ob... | 02/28/2012 |
| 8105952 | Method of forming a pattern A pattern forming method is provided, which includes forming, above a substrate, a layer of a diblock copolymer composition containing at least PS and PEO, subjecting the layer to phase separation to obtain a phase-separated layer, thereby forming an easy-to-etch re... | 01/31/2012 |
| 8008207 | Use of ion implantation in chemical etching A method for controlling chemical dry etching to improve smoothness of an etched surface is disclosed. Ions are implanted into a surface to form a volatilizable compound at a temperature low enough to avoid, reduce, or eliminate formation of three-dimensional struct... | 08/30/2011 |
| 7998871 | Mask forming and implanting methods using implant stopping layer Methods of forming a mask for implanting a substrate and implanting using an implant stopping layer with a photoresist provide lower aspect ratio masks that cause minimal damage to trench isolations in the substrate during removal of the mask. In one embodiment, a m... | 08/16/2011 |
| 7994064 | Selective etch for damage at exfoliated surface Ions are implanted into a silicon donor body, defining a cleave plane. A first surface of the donor body is affixed to a receiver element, and a lamina is exfoliated at the cleave plane, creating a second surface of the lamina. There is damaged silicon at the second... | 08/09/2011 |
| 7902076 | Method of fabricating semiconductor device A method of fabricating a semiconductor device according to one embodiment includes: forming a porous film above a semiconductor substrate; forming an altered layer by applying alteration treatment to a first pattern region of the porous film up to a predetermined d... | 03/08/2011 |
| 7825031 | Method of fabricating a semiconductor device The invention relates to a method of fabricating an integrated circuit, including the steps of providing at least one layer; performing a first implantation step, wherein particles are implanted into the layer under a first direction of incidence; performing a secon... | 11/02/2010 |
| 7799692 | Method and apparatus for the treatment of a semiconductor wafer Treatment of a semiconductor wafer employs: a) position-dependent measuring of a parameter characterizing the semiconductor wafer to determine a position-dependent value of the parameter over an entire surface of the semiconductor ... | 09/21/2010 |
| 7786016 | Methods of uniformly removing silicon oxide and a method of removing a sacrificial oxide A method of substantially uniformly removing silicon oxide is disclosed. The silicon oxide to be removed includes at least one cavity therein or more than one density or strain therein. The silicon oxide having at least one cavity or more than one density or strain ... | 08/31/2010 |
| 7767583 | Method to improve uniformity of chemical mechanical polishing planarization Embodiments of this method improve the results of a chemical mechanical polishing (CMP) process. A surface is implanted with a species, such as, for example, Si, Ge, As, B, P, H, He, Ne, Ar, Kr, Xe, and C. The implant of this species will at least affect dishing, er... | 08/03/2010 |
| 7737041 | Semiconductor device and method of manufacturing the same A semiconductor device comprises a semiconductor layer including a plurality of paralleled linear straight sections extending in a first direction. The layer also includes a plurality of connecting sections each having a width in the first direction sufficient to fo... | 06/15/2010 |
| 7687404 | Method for manufacturing display device In a method for manufacturing a display device having a light emitting element, a first base insulating film, a second base insulating film, a semiconductor layer, and a gate insulating film are formed in this order over a substrate. A gate electrode is formed over ... | 03/30/2010 |
| 7678704 | Method of making a contact in a semiconductor device To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The pattern transfer layer is patterned in the reverse tone of a layout of recesses to be formed in the insulatin... | 03/16/2010 |
| 7651947 | Mask forming and implanting methods using implant stopping layer and mask so formed Methods of forming a mask for implanting a substrate and implanting using an implant stopping layer with a photoresist provide lower aspect ratio masks that cause minimal damage to trench isolations in the substrate during removal of the mask. In one embodiment, a m... | 01/26/2010 |
| 7579281 | Transistor assembly and method of its fabrication A transistor assembly with semiconductor material vertically introduced into micro holes (4) in a pliable a film laminate consisting of two plastic films (1, 3) with a metal layer (2) located therebetween. Said semiconductor material is provided... | 08/25/2009 |
| 7553771 | Method of forming pattern of semiconductor device A method of forming a pattern of a semiconductor device comprises forming a first hard mask film, a first resist film, and a second hard mask film over an underlying layer of a semiconductor substrate; forming a second resist pattern over the second hard mask film; ... | 06/30/2009 |
| 7544622 | Passivation for cleaning a material A contact is defined by an opening etched into borophosphosilicate glass (BPSG) down to a silicon substrate. In a contact cleaning process designed to remove native oxide at the bottom of the contact with little effect on the BPSG, the contact is dipped in an etch r... | 06/09/2009 |
| 7528072 | Crystallographic preferential etch to define a recessed-region for epitaxial growth A semiconductor device comprising a gate structure on a semiconductor substrate and a recessed-region in the semiconductor substrate. The recessed-region has a widest lateral opening that is near a top surface of the semiconductor substrate. The widest lateral openi... | 05/05/2009 |
| 7494933 | Method for achieving uniform etch depth using ion implantation and a timed etch A method of performing a timed etch of a material to a precise depth is provided. In this method, ion implantation of the material is performed before the timed etch. This ion implantation process substantially enhances the etch rate of the material within a precise... | 02/24/2009 |
| 7429534 | Etching a nitride-based heterostructure An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. A... | 09/30/2008 |
| 7422936 | Facilitating removal of sacrificial layers via implantation to form replacement metal gates Replacement metal gates may be formed by removing a polysilicon layer from a gate structure. The gate structure may be formed by patterning the polysilicon layer and depositing a spacer layer over the gate structure such that the spacer layer has a first polish rate... | 09/09/2008 |
| 7422020 | Aluminum incorporation in porous dielectric for improved mechanical properties of patterned dielectric A porous dielectric layer is formed on a substrate. Aluminum is incorporated in the porous dielectric layer with a pattern process using an Aluminum gas precursor. The incorporated Aluminum improves the mechanical properties of the porous dielectric layer. ... | 09/09/2008 |
| 7419914 | Semiconductor device fabrication method A method for fabricating a semiconductor device with a borderless via/wiring structure includes the steps of performing borderless via etching using a resist mask to form a contact hole in an interlevel dielectric layer over a semiconductor substrate so as to expose... | 09/02/2008 |
| 7419915 | Laser assisted chemical etching method for release microscale and nanoscale devices A method using an etchant and a laser for localized precise heating enables precise etching and release of MEMS devices with improved process control while expanding the number of materials used to make MEMS, including silicon-dioxide patterned films buried in and s... | 09/02/2008 |
| 7416988 | Semiconductor device and fabrication process thereof A method of fabricating a semiconductor device includes the steps of modifying a damaged layer containing carbon and formed at a semiconductor surface by exposing the damaged layer to oxygen radicals to form a modified layer, and removing the modified layer by a wet... | 08/26/2008 |
| 7407853 | Display device and manufacturing method of the same The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upp... | 08/05/2008 |
| 7390753 | In-situ plasma treatment of advanced resists in fine pattern definition A novel, in-situ plasma treatment method for eliminating or reducing striations caused by standing waves in a photoresist mask, is disclosed. The method includes providing a photoresist mask on a BARC (bottom anti-reflective coating) layer that is deposited on a fea... | 06/24/2008 |
| 7390748 | Method of forming a polishing inhibiting layer using a slurry having an additive A polishing inhibiting layer forming additive for a slurry, the slurry so formed, and a method of chemical mechanical polishing are disclosed. The polishing inhibiting layer is formed through application of the slurry to the surface being polished and is removable a... | 06/24/2008 |
| 7390745 | Pattern enhancement by crystallographic etching A method for producing predetermined shapes in a crystalline Si-containing material that have substantially uniform straight sides or edges and well-defined inside and outside corners is provided together with the structure that is formed utilizing the method of the... | 06/24/2008 |
| 7386162 | Post fabrication CD modification on imprint lithography mask The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for imprint mask critical dimension error(s). An aspect of the invention generates feedback information ... | 06/10/2008 |
| 7376259 | Topography compensation of imprint lithography patterning The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that modify an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask featu... | 05/20/2008 |
| 7358181 | Method for structuring a semiconductor device A method for structuring a laterally extending first layer in a semiconductor device with the aid of a reactive second layer, which together with the first layer to be structured forms first reaction products, which products are removed by material removal that acts... | 04/15/2008 |
| 7341941 | Methods to facilitate etch uniformity and selectivity A semiconductor device is fabricated with energy based process(es) that alter etch rates for dielectric layers within damascene processes. A first interconnect layer is formed over a semiconductor body. A first dielectric layer is formed over the first interconnect ... | 03/11/2008 |
| 7338857 | Increasing adherence of dielectrics to phase change materials A phase change material is formed over a dielectric material. An impurity is introduced into the dielectric to improve the adherence of said dielectric to said phase change material. ... | 03/04/2008 |
| 7335964 | Semiconductor structures In one aspect, the invention encompasses a semiconductor processing method of forming a material over an uneven surface topology. A substrate having an uneven surface topology is provided. The uneven surface topology comprises a valley between a pair of outwardly pr... | 02/26/2008 |
| 7320917 | Semiconductor device and method for manufacturing the same Gate length is 110 nm±15 nm or shorter (130 nm or shorter in a design rule) or an aspect ratio of an area between adjacent gate electrode structures thereof (ratio of the height of the gate electrode structure to the distance between the gate electrode structures) ... | 01/22/2008 |
| 7316978 | Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the prot... | 01/08/2008 |
| 7312146 | Semiconductor device interconnect fabricating techniques The present invention provides methods for fabricating integrated circuit structures for use in semiconductor wafer fabrication techniques. A Cu diffusion barrier/Cu seed sandwich layer is deposited on a substrate. A first sacrificial layer, deposited on the sandwic... | 12/25/2007 |
| 7294580 | Method for plasma stripping using periodic modulation of gas chemistry and hydrocarbon addition A method for etching a feature in a low-k dielectric layer through a photoresist etch mask over a substrate. A gas-modulated cyclic stripping process is performed for more than three cycles for stripping a single photoresist mask. Each cycle of the gas-modulated cyc... | 11/13/2007 |