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| Number | Title | Issue Date |
| 8445388 | Methods of forming semiconductor devices and devices formed using such methods Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particl... | 05/21/2013 |
| 8426315 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device is disclosed that includes a semiconductor wafer having a main surface including a device chip area, a peripheral area encompassing the device chip area, and a blank area situated between the device chip area and the ... | 04/23/2013 |
| 8420543 | Method for treating the dislocation in a GaN-containing semiconductor layer A method for treating the threading dislocation within a GaN-containing semiconductor layer is provided. The method includes a substrate is provided. A GaN-containing semiconductor layer with the threading dislocation is formed on the substrate. An etching process w... | 04/16/2013 |
| 8372752 | Method for fabricating ultra-fine nanowire Disclosed herein is a method for fabricating an ultra fine nanowire, which relates to a manufacturing technology of a microelectronic semiconductor transistor. This method obtains a suspended ultra fine nanowire base on a combination of a mask blocking oxidation pro... | 02/12/2013 |
| 8334213 | Bottom electrode etching process in MRAM cell A BE patterning scheme in a MRAM is disclosed that avoids damage to the MTJ array and underlying ILD layer while reducing BE-BE shorts and BE-bit line shorts. A protective dielectric layer is coated over a MTJ array before a photoresist layer is coated and patterned... | 12/18/2012 |
| 8324108 | Increasing robustness of a dual stress liner approach in a semiconductor device by applying a wet chemistry In a dual stress liner approach, unwanted material provided between closely spaced gate electrode structures may be removed to a significant degree on the basis of a wet chemical etch process, thereby reducing the risk of creating patterning-related irregularities. ... | 12/04/2012 |
| 8232213 | Semiconductor device and manufacturing method thereof, and liquid crystal display device A method for manufacturing a semiconductor device includes: a first etching step of etching a TEOS layer from a glass substrate to partially expose a SiN layer; a second etching step, conducted separately and independently from the first etching step, of wet-etching... | 07/31/2012 |
| 8178443 | Hardmask materials Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about −600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers... | 05/15/2012 |
| 8148267 | Method of forming isolation layer of semiconductor memory device A method of forming isolation layers of a semiconductor memory device. In accordance with an embodiment of the invention, a semiconductor substrate in which trenches are formed is provided. A first dielectric layer is formed over the semiconductor substrate includin... | 04/03/2012 |
| 8114780 | Method for dielectric material removal between conductive lines A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with ... | 02/14/2012 |
| 8071482 | Manufacturing method of a silicon carbide semiconductor device A manufacturing method for a silicon carbide semiconductor device is disclosed. It includes an etching method in which an Al film and Ni film are laid on an SiC wafer in this order and wet-etched, whereby a two-layer etching mask is formed in which Ni film portions ... | 12/06/2011 |
| 7994063 | Method for manufacturing semiconductor device and method for cleaning semiconductor substrate Disclosed is a method for cleaning a semiconductor substrate that can solve a problem of a conventional cleaning method which should include at least five steps for cleaning a substrate such as a semiconductor substrate. The method for cleaning a semiconductor subst... | 08/09/2011 |
| 7985687 | System and method for improving reliability in a semiconductor device A method for forming a memory device includes forming a hard mask over a substrate, where the hard mask includes a first mask layer and a second mask layer formed over the first mask layer. The substrate is etched to form a trench. The trench is filled with a field ... | 07/26/2011 |
| 7951721 | Etching technique for creation of thermally-isolated microstructures There is described a method for creating a thermally-isolated microstructure on a slab of mono-crystalline silicon which uses a hybrid dry-then-wet etch technique that when controlled, can produce microstructures without any silicon adhering underneath, microstructu... | 05/31/2011 |
| 7858529 | Treatment method of semiconductor, method for manufacturing MOS, and MOS structure The method of the present invention includes providing a semiconductor substrate with a recess; performing a pre-cleaning step on the semiconductor substrate; and performing a first reduction step, a lateral etching step and a second reduction step on the semiconduc... | 12/28/2010 |
| 7838429 | Method to manufacture a thin film resistor A method for manufacturing a semiconductor device that method comprises forming a thin film resistor by a process that includes depositing a resistive material layer on a semiconductor substrate. The process also includes depositing an insulating layer on the resist... | 11/23/2010 |
| 7829467 | Method for producing a polished semiconductor Semiconductor wafers are cut from a crystal and subjected to a series of processing steps in which material is removed from a front side and a rear side of the semiconductor wafers, comprising the following processing steps: a mech... | 11/09/2010 |
| 7820552 | Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack An advanced method of patterning a gate stack including a high-k gate dielectric that is capped with a high-k gate dielectric capping layer such as, for example, a rare earth metal (or rare earth like)-containing layer is provided. In particular, the present inventi... | 10/26/2010 |
| 7803713 | Method for fabricating air gap for semiconductor device A method for fabricating an interconnect structure in a semiconductor device. A masking layer is formed on a dielectric layer formed on a substrate, having at least one opening. The opening is transferred into the dielectric layer. A Plasma stripping process is perf... | 09/28/2010 |
| 7763544 | Method of forming fine pattern of semiconductor device using sige layer as sacrificial layer, and method of forming self-aligned contacts using the same There are provided a method of forming a fine pattern of a semiconductor device using a silicon germanium sacrificial layer, and a method of forming a self-aligned contact using the same. The method of forming a self-aligned contact of a semiconductor device include... | 07/27/2010 |
| 7759252 | Method of two-step backside etching The present invention is related to a method of two-step backside-etching. First, a substrate with a plurality of hard masks is provided. Next, the back and the edge of the substrate are backside-etched to remove parts of the hard masks on the back and the edge of t... | 07/20/2010 |
| 7696098 | Tuneable unipolar lasers A unipolar semiconductor laser is provided in which an active region is sandwiched in a guiding structure between an upper and lower cladding layer, the lower cladding layer being situated on a semiconducting substrate. The unipolar semiconductor laser comprises a r... | 04/13/2010 |
| 7611992 | Semiconductor light emitting element and method of manufacturing the same A semiconductor light emitting element including a conductive substrate, a bonding metal layer formed on the conductive substrate, a barrier layer formed on the bonding metal layer, a reflective layer formed on the barrier layer, an ohmic electrode layer formed on t... | 11/03/2009 |
| 7521366 | Manufacturing method of electro line for liquid crystal display device A manufacturing method of an electro line for a liquid crystal display device includes depositing a barrier layer made of a conducting material on a substrate, depositing a copper layer (Cu) on the barrier layer, wet-etching the Cu layer using a first etchant, and d... | 04/21/2009 |
| 7507670 | Silicon electrode assembly surface decontamination by acidic solution Methods for cleaning silicon surfaces of electrode assemblies by efficiently removing contaminants from the silicon surfaces without discoloring the silicon surfaces using an acidic solution comprising hydrofluoric acid, nitric acid, acetic acid, and balance deioniz... | 03/24/2009 |
| 7476622 | Method of forming a contact in a semiconductor device A gate is formed on a device formation region of a semiconductor substrate, and source and drain regions are formed in the device formation region of the semiconductor substrate adjacent respective sides of the gate. The gate is formed to include a gate dielectric l... | 01/13/2009 |
| 7468323 | Method of forming high aspect ratio structures An etching process includes providing a dielectric first film on a substrate and a sacrificial second film on the dielectric first film. A conductive structure such as a container capacitor is formed in a recess in the first and second films. The conductive structur... | 12/23/2008 |
| 7459401 | Method of dividing wafer A method of dividing and separating a wafer having a plurality of devices formed on its front surface, which are separated by streets. The method includes applying a resist film coating to a portion of the back surface of the wafer other than an area corresponding t... | 12/02/2008 |
| 7452821 | Method for the formation of contact holes for a number of contact regions for components integrated in a substrate A method is disclosed by means of which contact holes (K1), (K2) and (K3), leading to integrated components can be produced with just one structuring mask, whereby contact holes (K1) and (K3) lead to contact regions (25e, | 11/18/2008 |
| 7452822 | Via plug formation in dual damascene process A method for forming a dual damascene structure in a semiconductor device manufacturing process where via plugs which may include a thickness portion of a plug filling material overlying the process surface is formed by diffusing an acid into a plug filling material... | 11/18/2008 |
| 7431855 | Apparatus and method for removing photoresist from a substrate An apparatus and method for removing photoresist from a substrate, which includes treating the photoresist with a first reactant to cause swelling, cracking or delamination of the photoresist, treating the photoresist with a second reactant to chemically alter the p... | 10/07/2008 |
| 7422020 | Aluminum incorporation in porous dielectric for improved mechanical properties of patterned dielectric A porous dielectric layer is formed on a substrate. Aluminum is incorporated in the porous dielectric layer with a pattern process using an Aluminum gas precursor. The incorporated Aluminum improves the mechanical properties of the porous dielectric layer. ... | 09/09/2008 |
| 7419914 | Semiconductor device fabrication method A method for fabricating a semiconductor device with a borderless via/wiring structure includes the steps of performing borderless via etching using a resist mask to form a contact hole in an interlevel dielectric layer over a semiconductor substrate so as to expose... | 09/02/2008 |
| 7405139 | Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch A method of preventing the formation of cracks on the backside of a silicon (Si) semiconductor chip or wafer during the processing thereof. Also provided is a method for inhibiting the propagation of cracks, which have already formed in the backside of a silicon chi... | 07/29/2008 |
| 7402467 | Method of manufacturing a semiconductor device A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT... | 07/22/2008 |
| 7402523 | Etching method A method for etching an insulation film through a patterned mask, includes the steps of etching the insulation film until just before an underlayer is about to be exposed by applying a plasma, and modifying a quality of a remaining film of the insulation film by app... | 07/22/2008 |
| 7396737 | Method of forming shallow trench isolation A method of manufacturing a semiconductor device including forming a pad oxide layer on a semiconductor substrate, forming a spacer oxide layer pattern on sidewalls of the pad oxide layer, and forming a nitride layer on the pad oxide layer. The method further includ... | 07/08/2008 |
| 7384799 | Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices A method for forming a MEMS device using an amorphous silicon layer as a release layer includes etching superjacent films and using the amorphous silicon layer as an etch stop layer. The amorphous silicon layer is resistant to attack during the post-etch solvent str... | 06/10/2008 |
| 7364832 | Wet developable hard mask in conjunction with thin photoresist for micro photolithography A novel process for using a hard mask or protective layer in conjunction with an extremely thin photoresist is provided. In this process, a thin film of the protective layer is coated on the surface of a substrate that is to be selectively modified by reactive ion e... | 04/29/2008 |
| 7365021 | Methods of fabricating a semiconductor device using an organic compound and fluoride-based buffered solution Methods are provided for fabricating a semiconductor device that include the steps of: sequentially forming a metal interconnection and a protecting layer on a semiconductor substrate; forming a contact hole on the protecting layer; isolating the contact hole by for... | 04/29/2008 |
