Did You Know...
...that Charles Goodyear performed some of his experiments on rubber while in debtor's prison? He was there so often he referred to it as his "hotel". Chronically in debt because of poor business sense and ill health, Goodyear depended on the generosity of friends and family. Even after he unlocked the secret to vulcanizing rubber, he was unable to improve his financial situation. When he died, his estate was $200,000 in debt.
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| Number | Title | Issue Date |
| 8058177 | Winged vias to increase overlay margin Winged via structures to increase overlay margin are generally described. In one example, a method comprises depositing a sacrificial layer to an interlayer dielectric, the interlayer dielectric being coupled with a semiconductor substrate, forming at least one tren... | 11/15/2011 |
| 7772125 | Structure in which cylindrical microstructure is maintained in anisotropic groove, method for fabricating the same, and semiconductor device, TFT driving circuit, panel, display and sensor using the structure in which cylindrical microstructure is maintained in anisotropic groove A method for fabricating a structure according to the present invention includes the steps of: forming a groove in a substrate, dropping a solution in which microstructures such as nanowires are dispersed into the groove and the step of evaporating the solution to a... | 08/10/2010 |
| 7749912 | Method for fabricating bulb-shaped recess pattern A method for fabricating a bulb-shaped recess pattern includes: forming an etch barrier layer over a substrate; forming a hard mask pattern in which a first polymer is attached to sidewalls of the hard mask pattern over the etch barrier layer; sequentially etching t... | 07/06/2010 |
| 7749911 | Method for forming an improved T-shaped gate structure A T-shaped gate structure and method for forming the same the method including providing a semiconductor substrate comprising at least one overlying sacrificial layer; lithographically patterning a resist layer overlying the at least one sacrificial layer for etchin... | 07/06/2010 |
| 7741226 | Optimal tungsten through wafer via and process of fabricating same A method of optimally filling a through via within a through wafer via structure with a conductive metal such as, for example, W is provided. The inventive method includes providing a structure including a substrate having at least one aperture at least partially fo... | 06/22/2010 |
| 7651946 | Wet etch processing A method of wet etching produces high-precision microneedle arrays for use in medical applications. The method achieves precise process control over microneedle fabrication, at single wafer or batch-level, using wet etching of silicon with potassium hydroxide (KOH) ... | 01/26/2010 |
| 7569485 | Method for an integrated circuit contact A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect... | 08/04/2009 |
| 7439143 | Flash memory device and method of manufacturing the same Disclosed is a flash memory device. The flash memory device includes a plurality of trench lines in an isolation region of a semiconductor device, a common source region along a word line (WL) direction under a surface portion of the semiconductor substrate, a plura... | 10/21/2008 |
| 7432605 | Overlay mark, method for forming the same and application thereof An overlay mark for checking the alignment accuracy between a lower layer and a lithography process for defining an upper layer is described, including a part of the lower layer having two first x-directional trenches, two first y-directional trenches, two second x-... | 10/07/2008 |
| 7413995 | Etched interposer for integrated circuit devices In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer. In one embodiment, the interposer 106 incl... | 08/19/2008 |
| 7410905 | Method for fabricating thin film pattern, device and fabricating method therefor, method for fabricating liquid crystal display, liquid crystal display, method for fabricating active matrix substrate, electro-optical apparatus, and electrical apparatus A method for fabricating a thin film pattern on a substrate, includes the steps of: forming a concave part on the substrate that conforms to the thin film pattern; and applying a function liquid into the concave part. ... | 08/12/2008 |
| 7405162 | Etching method and computer-readable storage medium An etching method forms an opening with a substantially vertical profile extending to a stopper layer by performing an etching with a plasma of an etching gas acting on an object to be processed loaded in an evacuable processing vessel, wherein the object has a mask... | 07/29/2008 |
| 7393791 | Etching method, method of fabricating metal film structure, and etching structure There is provided an etching method in which a protective film existing in an etching-destined region of a substrate structure is removed by means of ICP-RIE to form an exposure region of the principal surface of the substrate. The substrate structure comprises a su... | 07/01/2008 |
| 7387955 | Field effect transistor and method for manufacturing the same A field effect transistor having a T- or Γ-shaped fine gate electrode of which a head portion is wider than a foot portion, and a method for manufacturing the field effect transistor, are provided. A void is formed between the head portion of the gate electrode and... | 06/17/2008 |
| 7381649 | Structure for a multiple-gate FET device and a method for its fabrication A method for forming a semiconductor device and a device made using the method are provided. In one example, the method includes forming a hard mask layer on a semiconductor substrate and patterning the hard mask layer to form multiple openings. The substrate is etc... | 06/03/2008 |
| 7365015 | Damascene replacement metal gate process with controlled gate profile and length using SiGeas sacrificial material A method of forming a metal gate in a wafer. PolySi1-xGex and polysilicon are used to form a tapered groove. Gate oxide, PolySi1-xGex, and polysilicon is deposited on a wafer. A resist pattern is formed. A portion of the p... | 04/29/2008 |
| 7352006 | Light emitting diodes exhibiting both high reflectivity and high light extraction The invention is a light emitting diode that exhibits high reflectivity to incident light and high extraction efficiency for internally generated light. The light emitting diode includes a reflecting layer that reflects both the incident light and the internally gen... | 04/01/2008 |
| 7348669 | Bump structure of semiconductor device and method of manufacturing the same In connection with a bump of a semiconductor device and a manufacturing method thereof, a groove is formed in a bump pad region of a semiconductor substrate. An under bump metal layer is then formed in the groove, and a lower end portion of the bump fills the groove... | 03/25/2008 |
| 7348202 | CMOS image sensor and method for fabricating the same An image sensor includes a semiconductor substrate; a pixel array disposed on the semiconductor substrate; and an insulating interlayer, formed on the semiconductor substrate, having a trench coinciding with the disposition of the pixel array, the trench having unif... | 03/25/2008 |
| 7338614 | Vapor HF etch process mask and method A method of processing a semiconductor wafer provides a wafer, and then forms an organic mask on at least a portion of the wafer. The method then applies a vapor etching process to the wafer through holes in the organic mask. ... | 03/04/2008 |
| 7335593 | Method of fabricating semiconductor device A gate metal is formed in a film, the foregoing gate metal is partially etched per each TFT having a different property, and a gate electrode is fabricated. Specifically, a resist mask is fabricated by exposing a resist to light per each TFT having a different prope... | 02/26/2008 |
| 7320927 | In situ hardmask pullback using an in situ plasma resist trim process The present invention provides a process of manufacturing an isolation structure for use in a semiconductor device. The process includes forming an opening in a substrate through a patterned photoresist layer 225 and a hardmask layer 215 located over t... | 01/22/2008 |
| 7311850 | Method of forming patterned thin film and method of fabricating micro device In a method of forming a patterned thin film, first, an etching stopper film and a film to be patterned are formed in this order on a base layer. Next, a patterned first film is formed on the film to be patterned. Next, a second film is formed over an entire surface... | 12/25/2007 |
| 7303648 | Via etch process Systems and techniques relating to etching vias in integrated circuit devices, in one implementation, include: providing a dielectric material and a conductive material, removing a first portion of the dielectric material to form a hole in the dielectric material, p... | 12/04/2007 |
| 7300882 | Etching method and semiconductor device fabricating method An etching method for plasma-etching a low-k film, wherein the plasma etching is conducted under an etching gas atmosphere including a fluorocarbon gas, O2 gas and Ar gas, and under the conditions of a pressure of 60 mTorr (7999.32 mPa) or higher and a hi... | 11/27/2007 |
| 7297568 | Three-dimensional structural body composed of silicon fine wire, its manufacturing method, and device using same A three-dimensional structure composed of highly-reliable silicon ultrafine wires, a method for producing the three-dimensional structure, and a device including the same are provided. The three-dimensional structure composed of silicon fine wires includes wires ( | 11/20/2007 |
| 7294579 | Method for forming contact opening The present invention relates to a method for forming a contact opening. First, a substrate having at least a dielectric layer formed thereon is provided. Then, a photoresist layer having a first opening is formed on the dielectric layer. A plasma etching operation ... | 11/13/2007 |
| 7288442 | Method for manufacturing contact structures of wirings First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 m... | 10/30/2007 |
| 7282802 | Modified via bottom structure for reliability enhancement The present invention provides an interconnect structure that can be made in the BEOL which exhibits good mechanical contact during normal chip operations and does not fail during various reliability tests as compared with the conventional interconnect structures de... | 10/16/2007 |
| 7282434 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor integrated circuit device is provided including forming a first insulating film comprised of fluorine-containing silicon oxide over a main surface of a semiconductor substrate is formed together with forming a second insulat... | 10/16/2007 |
| 7271101 | High density plasma chemical vapor deposition process A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric materia... | 09/18/2007 |
| 7259102 | Etching technique to planarize a multi-layer structure The present invention is directed to a method of etching a multi-layer structure formed from a layer of a first material and a layer of a second material differing from the first material to obtain a desired degree of planarization. To that end, the method includes ... | 08/21/2007 |
| 7255801 | Deep submicron CMOS compatible suspending inductor A new method is provided for the creation of an inductor. Layers of pad oxide, a thick layer of dielectric and an etch stop layer are successively created over the surface of a substrate. The layers of etch stop material and dielectric are patterned and etched, crea... | 08/14/2007 |
| 7245341 | Laminated structure, display device and display unit employing same A laminated structure which can reduce defect by preventing deposition failure or holes of an insulating film, manufacturing method, and a display unit that employ same are provided. The laminated structure as an anode for organic light-emitting devices is provided ... | 07/17/2007 |
| 7241679 | Method of manufacturing semiconductor device This invention provides an etching method for preventing deformation of an opening without extremely lowering productivity. This invention has a process for bonding a supporting board on a front surface of a semiconductor substrate to cover a pad electrode formed on... | 07/10/2007 |
| 7238609 | Method for fabricating semiconductor device A method for fabricating a semiconductor device has the steps of forming a conductive film on a substrate, forming an insulating film such that the conductive film is covered with the insulating film, forming, in the insulating film, a hole having a bottom portion n... | 07/03/2007 |
| 7238604 | Forming thin hard mask over air gap or porous dielectric A thin hard mask is formed over a semiconductor substrate. The thin hard mask allows diffusion of a sacrificial material or pore-forming agent therethrough to form an underlying air gap or porous dielectric region. The thin hard mask may be a polymer or an initially... | 07/03/2007 |
| 7217334 | Method for forming film, method for forming wiring pattern, method for manufacturing semiconductor device, electro-optical device, and electronic device Exemplary embodiments of the invention to provide an efficient and productive method to form a reliable film. A method to form a film according to exemplary embodiments of the present invention, in which a transferring layer formed on a substrate is transferred to a... | 05/15/2007 |
| 7211517 | Semiconductor device and method that includes reverse tapering multiple layers A method of manufacturing a semiconductor device of the present invention includes (a) sequentially forming a gate insulating film 14, a first conductive layer 15 and a first insulating film 16 on a semiconductor layer 13 provided on an i... | 05/01/2007 |
| 7199053 | Method for detecting end-point of chemical mechanical polishing process Disclosed is a method for detecting an end-point of a CMP process of a semiconductor device. More specifically, when all polishing processes are performed using a nitride film as a polishing barrier film, a buffer layer including nitrogen is formed on the nitride fi... | 04/03/2007 |
