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| Number | Title | Issue Date |
| 8183160 | Method for manufacturing a semiconductor device and semiconductor device obtainable with such a method A method for manufacturing a semiconductor device includes providing a patterned hard-mask layer. The hard-mask layer is provided on an exposed surface of one or more layers to be patterned of a semiconductor intermediate product. The hard-mask layer covers the expo... | 05/22/2012 |
| 8168543 | Methods of forming a layer for barrier applications in an interconnect structure Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD chamber, sputtering a source material fr... | 05/01/2012 |
| 8143168 | Etching method and manufacturing method of semiconductor device The present invention discloses technique of etching selectively a layer containing siloxane. The present invention provides a semiconductor device with reduced operation deterioration due to etching failure. A method for manufacturing a semiconductor device compris... | 03/27/2012 |
| 8124533 | Method of manufacturing power semiconductor device A mask layer having a plurality of openings is formed on the first layer. A second layer having a second conductivity type different from the first conductivity type is formed on the first layer by introducing impurities using the mask layer. A third layer having th... | 02/28/2012 |
| 8114779 | Silicon dioxide cantilever support and method for silicon etched structures An apparatus includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant openings (24) extend through the dielectric layer for passage of etchant for ... | 02/14/2012 |
| 8114778 | Method of forming minute patterns in semiconductor device using double patterning A method of forming minute patterns in a semiconductor device, and more particularly, a method of forming minute patterns in a semiconductor device having an even number of insert patterns between basic patterns by double patterning including insert patterns between... | 02/14/2012 |
| 8097539 | Imprint mask manufacturing method for nanoimprinting A pattern is formed on a mask substrate. Positional deviation information between an actual position of the pattern formed on the mask substrate and a design position decided at the time of designing the pattern is calculated. A heterogeneous layer of which a volume... | 01/17/2012 |
| 8093152 | Trench forming method A trench forming method for forming trenches without creating gouges at the boundary between a masking oxide film and a semiconductor layer and at the boundary between an oxide film insulating layer and the semiconductor layer, includes at least three etching steps ... | 01/10/2012 |
| 8084365 | Method of manufacturing a nano structure by etching, using a substrate containing silicon A method of manufacturing a nano structure by etching, using a substrate containing Si. A focused Ga ion or In ion beam is irradiated on the surface of the substrate containing Si. The Ga ions or the In ions are injected while sputtering away the surface of the subs... | 12/27/2011 |
| 8071481 | Method for forming highly strained source/drain trenches A multi-step etching process produces trench openings in a silicon substrate that are immediately adjacent transistor structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a ... | 12/06/2011 |
| 8058176 | Methods of patterning insulating layers using etching techniques that compensate for etch rate variations Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second openings of different size therein, on the electrically in... | 11/15/2011 |
| 8053369 | Process for forming opening portion in interlayer insulation film on metallic layer of semiconductor device A manufacturing method for a semiconductor device, including: forming a metallic layer and an interlayer insulation film on a semiconductor substrate sequentially; etching on the interlayer insulation film using fluorine-based etching gas to form an opening portion ... | 11/08/2011 |
| 8039401 | Structure and method for forming hybrid substrate A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selecti... | 10/18/2011 |
| 8034719 | Method of fabricating high aspect ratio metal structures To fabricate high aspect ratio metal structures, a two-layer structure is provided on a conductive layer. The two-layer structure includes a first layer adjacent the conductive layer and a second layer adjacent the first layer where the second layer is etchable by a... | 10/11/2011 |
| 8030215 | Method for creating ultra-high-density holes and metallization Methods and apparatuses directed to high density holes and metallization are described herein. A method may include providing a dielectric layer including a plurality of holes, forming a fill material over a top surface of the dielectric layer and in the plurality o... | 10/04/2011 |
| 8026177 | Silicon dioxide cantilever support and method for silicon etched structures A semiconductor device includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant openings (24) extend through the dielectric layer for passage of et... | 09/27/2011 |
| 8021984 | Method for manufacturing semiconductor A method for manufacturing a semiconductor includes forming an active region for an ESD device, an active region for a first polygate and the semiconductor, and a second polygate having a form of a blanket trench on a substrate, forming an interlayer dielectric laye... | 09/20/2011 |
| 8012879 | Etching method using an at least semi-solid media An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively etch a surface layer (106, 218, 222). The etch reactant media may be applied to remove meta... | 09/06/2011 |
| 7998870 | Semiconductor device and method for forming using the same A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a plurality of bit lines having a uniform width on a semiconductor substrate, an active region obliquely arranged to have a predetermined angle with respect to ... | 08/16/2011 |
| 7998869 | Contact patterning method with transition etch feedback A method for forming a contact hole in a semiconductor device and related computer-readable storage medium are provided, the method and program steps of the medium including measuring a percentage of oxygen in an etching chamber, and controlling the percentage of ox... | 08/16/2011 |
| 7994062 | Selective silicon etch process A process for etching a silicon layer disposed on a substrate, including anisotropically etching a first trench in the silicon layer; selectively anisotropic wet etching silicon surfaces in the first trench, the wet etching comprising exposing the silicon surfaces t... | 08/09/2011 |
| 7994061 | Mask layout and method for forming vertical channel transistor in semiconductor device using the same A method for forming a vertical channel transistor in a semiconductor memory device includes: forming a plurality of pillars over a substrate so that the plurality of pillars are arranged in a first direction and a second direction crossing the first direction, and ... | 08/09/2011 |
| 7985685 | Method of manufacturing semiconductor device A method for manufacturing a semiconductor device is provided, the method includes forming a coated film by coating a solution containing a solvent and an organic component above an insulating film located above a semiconductor substrate and having a recess, baking ... | 07/26/2011 |
| 7977244 | Semiconductor manufacturing process Disclosed is a semiconductor manufacturing process, in which a fluorine radical-containing plasma is used to etch a hard mask and a layer therebeneath; and a treatment is carried out using a gas reactive to fluorine radicals for reacting with residual fluorine radic... | 07/12/2011 |
| 7972964 | Semiconductor device with contact structure and manufacturing method thereof A plurality of gate lines are formed on a substrate. After depositing a gate insulating layer, a semiconductor layer and a doped amorphous silicon layer are sequentially formed thereon. A lower insulating layer made of silicon nitride and an upper insulating layer m... | 07/05/2011 |
| 7972965 | Process for interfacial adhesion in laminate structures through patterned roughing of a surface The present invention relates to a process for improved interfacial adhesion of dielectrics using patterned roughing. Improved adhesion strength between layers and substrates can be achieved through increasing the roughness of the interface between the materials. Ro... | 07/05/2011 |
| 7960285 | Method for the production of a component structure A method for the production of a component structure. On embodiment provides a semiconductor body having a first side. A first trench and a second trench are produced, which extend into the semiconductor body proceeding from the first side and are arranged at a dist... | 06/14/2011 |
| 7960286 | Narrow channel width effect modification in a shallow trench isolation device A method of manufacturing a semiconductor structure is provided. The method includes forming a hard mask pattern on a semiconductor substrate, wherein the hard mask pattern covers active regions; forming a trench in the semiconductor substrate within an opening defi... | 06/14/2011 |
| 7947606 | Methods of forming conductive features and structures thereof Methods of forming features and structures thereof are disclosed. In one embodiment, a method of forming a feature includes forming a first material over a workpiece, forming a first pattern for a lower portion of the feature in the first material, and filling the f... | 05/24/2011 |
| 7947608 | Positive tone bi-layer method Methods of imprint lithography are described. Generally, the methods include imprinting, via a patterned mold, a pattern into a polymerizable fluid composition on a substrate to form a patterned imprinting layer. A conformal layer is overlayed on the patterned impri... | 05/24/2011 |
| 7947607 | Apparatus and associated method for making a virtual ground array structure that uses inversion bit lines A virtual ground array structure uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities and smaller packaging. ... | 05/24/2011 |
| 7939449 | Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. Thi... | 05/10/2011 |
| 7932182 | Creating novel structures using deep trenching of oriented silicon substrates A potassium hydroxide (KOH) etch process can produce deep high aspect ratio trenches in (110) oriented silicon substrates. The trenches, however, are perpendicular to the (111) direction of the silicon substrate's crystal lattice. The trenches are used to produce th... | 04/26/2011 |
| 7915173 | Shallow trench isolation structure having reduced dislocation density A method for manufacturing a shallow trench isolation structure comprises etching a plurality of trenches into a silicon substrate. The trenches have an upright wall portion, a bottom floor portion, and a corner portion connecting the upright wall portion and the bo... | 03/29/2011 |
| 7910486 | Method for forming nanotube semiconductor devices A method for forming a semiconductor device includes forming a nanotube region using a thin epitaxial layer formed on the sidewall of a trench in the semiconductor body. The thin epitaxial layer has uniform doping concentration. In another embodiment, a first thin e... | 03/22/2011 |
| 7888266 | Band gap modulated optical sensor A complementary metal-oxide-semiconductor (CMOS) optical sensor structure includes a pixel containing a charge collection well of a same semiconductor material as a semiconductor layer in a semiconductor substrate and at least another pixel containing another charge... | 02/15/2011 |
| 7879727 | Method of fabricating a semiconductor device including a pattern of line segments A method of fabricating a semiconductor device including depositing a hardmask layer on a layer of the semiconductor device, selectively etching a pattern of continuous lines in the hardmask layer, depositing an antireflective coating over remaining portions of the ... | 02/01/2011 |
| 7879726 | Methods of forming semiconductor devices using selective etching of an active region through a hardmask A method of fabricating a semiconductor device is provided. The method can include forming a hard mask film including lower and upper hard mask films on a substrate in which an active region and an isolation region are defined and patterning the hard mask film to pr... | 02/01/2011 |
| 7867910 | Method of accessing semiconductor circuits from the backside using ion-beam and gas-etch The invention generally relates to semiconductor device processing, and more particularly to methods of accessing semiconductor circuits from the backside using ion-beam and gas-etch to mill deep vias through full-thickness silicon. A method includes creating a pock... | 01/11/2011 |
| 7858528 | Positive tone bi-layer method Methods of patterning a substrate including creating a multi-layered structure by forming, on the substrate, a patterned layer having protrusions and recessions are described. A polymerizable material composition is dispense on the patterned layer defining a conform... | 12/28/2010 |
