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| Number | Title | Issue Date |
| 8445380 | Semiconductor having a high aspect ratio via The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a method for forming a via structure includes forming a via in a semiconductor substrate, wherein via sidewalls of the via are defined by the semi... | 05/21/2013 |
| 8435892 | Method of manufacturing semiconductor device comprising the step of doping semiconductor film through contact hole It is an object of an invention disclosed in the present specification to provide a transistor having low contact resistance. In the transistor, a semiconductor film including an impurity element imparting P-type or N-type conductivity, an insulating film formed the... | 05/07/2013 |
| 8431488 | Damascene process using cleaning solution A cleaning solution is provided. The cleaning solution includes a fluorine containing compound, an inorganic acid, a chelating agent containing a carboxylic group and water for balance. The content of the fluorine containing compound is 0.01-0.5 wt % of. The content... | 04/30/2013 |
| 8431487 | Method for forming a plug structure A method for forming a plug structure includes the following steps. A substrate is provided. The substrate includes a MOS device with a source/drain region, a dielectric layer disposed on the MOS device, an opening defined in the dielectric layer, and a first glue l... | 04/30/2013 |
| 8426310 | Method of forming a shared contact in a semiconductor device A method for forming a shared contact in a semiconductor device having a gate electrode corresponding to a first transistor and a source/drain region corresponding to a second transistor is provided. The method includes forming a first opening in a dielectric layer ... | 04/23/2013 |
| 8404588 | Method of manufacturing via electrode Provided is a method of manufacturing a via electrode by which productivity and production yield can be augmented or maximized. The method of the present invention includes: forming a via hole at a substrate; forming a catalyst layer at a sidewall and a bottom of th... | 03/26/2013 |
| 8399358 | Establishing a hydrophobic surface of sensitive low-k dielectrics of microstructure devices by in situ plasma treatment Silicon oxide based low-k dielectric materials may receive superior hydrophobic surface characteristics on the basis of a plasma treatment using hydrogen and carbon containing radicals. For this purpose, the surface of the low-k dielectric material may be exposed to... | 03/19/2013 |
| 8389406 | Method of manufacturing semiconductor device There is provided a method of manufacturing a semiconductor device including: preparing a semiconductor substrate, forming a first insulating layer, a first redistribution layer, a second insulating layer, a second redistribution layer, and at least one of first pro... | 03/05/2013 |
| 8389407 | Methods of patterning materials Some embodiments include methods of forming openings. For instance, a construction may have a material over a plurality of electrically conductive lines. A plurality of annular features may be formed over the material, with the annular features crossing the lines. A... | 03/05/2013 |
| 8367546 | Methods for forming all tungsten contacts and lines Novel low-resistivity tungsten film stack schemes and methods for depositing them are provided. The film stacks include a mixed tungsten/tungsten-containing compound (e.g., WC) layer as a base for deposition of tungsten nucleation and/or bulk layers. According to va... | 02/05/2013 |
| 8367547 | Method for creating a metal crystalline region, in particular in an integrated circuit The method comprises affixing a thin sheet of crystal (8) onto metal (6) of same type as the sheet but amorphous or of small grain size, deposited in trenches of a substrate (1) to form interconnect lines for example. Annealing progressively imp... | 02/05/2013 |
| 8324102 | Techniques for impeding reverse engineering Anti-reverse engineering techniques are provided. In one aspect, a method for forming at least one feature in an insulating layer is provided. The method comprises the following steps. Ions are selectively implanted in the insulating layer so as to form at least one... | 12/04/2012 |
| 8318602 | Nonvolatile semiconductor storage apparatus and method for manufacturing the same According to an aspect of the present invention, there is provided a nonvolatile semiconductor storage apparatus including: a substrate; a columnar semiconductor disposed perpendicular to the substrate; a charge storage laminated film disposed around the columnar se... | 11/27/2012 |
| 8309463 | Method for forming fine pattern in semiconductor device A method for forming a contact hole of a semiconductor device according to the present invention forms a contact hole which is defined as a new contact hole region (a second contact hole region), between spacers as well as a contact hole defined within the spacer (a... | 11/13/2012 |
| 8293644 | Methods of manufacturing a semiconductor memory device Methods of forming a semiconductor include forming an insulation layer over a semiconductor substrate in which a first region and a second region are defined. A storage node contact (SNC) that passes through the insulation layer is formed and is electrically connect... | 10/23/2012 |
| 8293645 | Method for forming photovoltaic cell A photovoltaic cell manufacturing method is disclosed. Methods include manufacturing a photovoltaic cell having a selective emitter and buried contact (electrode) structure utilizing nanoimprint technology. The methods include providing a semiconductor substrate hav... | 10/23/2012 |
| 8252684 | Method of forming a trench by a silicon-containing mask A method of forming a trench by a silicon-containing mask is provided in the present invention. The method includes providing a substrate covered with a silicon-containing mask. Then, anti-etch dopants are implanted into the silicon-containing mask to transform the ... | 08/28/2012 |
| 8236691 | Method of high aspect ratio plug fill A method of plug fill for high aspect ratio plugs wherein a nucleation layer is formed at a bottom of a via and not on the sidewalls. The plug fill is in the direction from bottom to top of the via and not inwards from the sidewalls. The resulting plug is voidless a... | 08/07/2012 |
| 8232204 | Method of forming borderless contact for transistor Embodiments of the present invention provide a method of forming borderless contact for transistor. The method may include forming a gate of a transistor, on top of a substrate, and spacers adjacent to sidewalls of the gate; forming a sacrificial layer surrounding t... | 07/31/2012 |
| 8216939 | Methods of forming openings Some embodiments include methods of forming openings. For instance, a construction may have a material over a plurality of electrically conductive lines. A plurality of annular features may be formed over the material, with the annular features crossing the lines. A... | 07/10/2012 |
| 8153522 | Patterning mask and method of formation of mask using step double patterning A method of forming a mask for use in fabricating an integrated circuit includes forming first non-removable portions of a photoresist material through a mask having a plurality of apertures, shifting the mask, forming second non-removable second portions of the pho... | 04/10/2012 |
| 8143160 | Method of forming a contact plug of a semiconductor device In a method of forming a contact plug of a semiconductor device, a nitride layer is prevented from being broken by forming a passivation layer over the nitride layer when contact holes are formed by etching an insulating layer between select lines formed over a semi... | 03/27/2012 |
| 8129276 | Void sealing in a dielectric material of a contact level of a semiconductor device comprising closely spaced transistors In sophisticated semiconductor devices, a contact structure may be formed on the basis of a void positioned between closely spaced transistor elements wherein disadvantageous metal migration along the void may be suppressed by sealing the voids after etching a conta... | 03/06/2012 |
| 8114773 | Cleaning solution, cleaning method and damascene process using the same A cleaning solution is provided. The cleaning solution includes (a) 0.01-0.1 wt % of hydrofluoric acid (HF); (b) 1-5 wt % of a strong acid, wherein the strong acid is an inorganic acid; (c) 0.05-0.5 wt % of ammonium fluoride (NH4F); (d) a chelating agent ... | 02/14/2012 |
| 8067312 | Coaxial through chip connection An integrated circuit chip includes devices formed by doping of a semiconductor on a substrate and at least one post-device formation through-chip via made up of an annulus of insulating material, an annulus of metallization bounding an outer surface of the annulus ... | 11/29/2011 |
| 8053365 | Methods for forming all tungsten contacts and lines Novel low-resistivity tungsten film stack schemes and methods for depositing them are provided. The film stacks include a mixed tungsten/tungsten-containing compound (e.g., WC) layer as a base for deposition of tungsten nucleation and/or bulk layers. According to va... | 11/08/2011 |
| 8048804 | Method of manufacturing semiconductor package A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a portion of a first substrate; a step B that joins together the first substrate and a second substrate in ... | 11/01/2011 |
| 8026174 | Sequential station tool for wet processing of semiconductor wafers Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wa... | 09/27/2011 |
| 8008197 | Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming in order a barrier film, an insulating film, a first mask, and a second mask having etching properties different from those of the first mask on a substrate, removing the insulating film, the first m... | 08/30/2011 |
| 7998863 | High efficiency solar cell fabrication A method of forming a contact structure and a contact structure so formed is described. The structure contacts an underlying layer of a semiconductor junction, wherein the junction comprises the underlying layer of a semiconductor material and is separated from an o... | 08/16/2011 |
| 7981798 | Method of manufacturing substrate The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to co... | 07/19/2011 |
| 7981797 | Phase-change random access memory device and method of manufacturing the same A method of manufacturing a phase-change random access memory device includes forming an interlayer insulating film on a semiconductor substrate, on which a bottom structure is formed, and patterning the interlayer insulating film to form a contact hole, forming a s... | 07/19/2011 |
| 7906431 | Semiconductor device fabrication method Methods of fabricating a semiconductor device including a through-silicon via that is electrically insulated from the semiconductor substrate. An exemplary method includes preparing a semiconductor wafer including a semiconductor substrate, a semiconductor element, ... | 03/15/2011 |
| 7892974 | Method of forming vias in silicon carbide and resulting devices and circuits A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon... | 02/22/2011 |
| 7892975 | Method for selectively forming electric conductor and method for manufacturing semiconductor device A method for selectively forming an electric conductor, the method including disposing a processing target and a metal compound in an atmosphere including a supercritical fluid, the processing target having formed thereon at least one recess for providing an electri... | 02/22/2011 |
| 7875553 | Method of manufacturing semiconductor package A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a portion of a first substrate; a step B that joins together the first substrate and a second substrate in ... | 01/25/2011 |
| 7867903 | Passivated thin film and method of producing same A method of producing a passivated thin film material is disclosed wherein an insulating thin film layer (10), having pinholes (12) therein, is positioned upon an underlying electrically conductive substrate (11). The thin film layer is then ele... | 01/11/2011 |
| 7816265 | Method for forming vias in a substrate A method for forming vias in a substrate, including the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a groove on the substrate; (c) filling the groove with a conductive metal; (d) removing part of the substrate ... | 10/19/2010 |
| 7816264 | Wafer processing method A wafer processing method having a step of reducing the thickness of a wafer in only a device forming area where semiconductor chips are formed by grinding and etching the back side of the wafer to thereby form a recess on the back side of the wafer. At the same tim... | 10/19/2010 |
| 7790615 | Electronic component packaging The invention relates to a method to seal a cavity, comprising a hole (6), comprising: the deposition on at least part of the cover, or an electrically conductive material (4, 5), the conveyance of pa... | 09/07/2010 |
