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| Number | Title | Issue Date |
| 8158516 | Method for manufacturing semiconductor device According to one embodiment, a method is described for manufacturing a semiconductor device. The method can form a conductive layer including tungsten on a foundation layer. The method can form a trench by selectively etching the conductive layer. The trench is shal... | 04/17/2012 |
| 8143159 | Fabrication of interconnects in a low-k interlayer dielectrics A method for forming deep lithographic interconnects between a first metal and a second metal is provided. The method comprises depositing a first insulator layer on a semiconductor substrate; etching the first insulator layer at a selected location to provide at le... | 03/27/2012 |
| 8129275 | Process for manufacturing semiconductor integrated circuit device In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of... | 03/06/2012 |
| 8076239 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device, includes the steps of forming an insulating film on a semiconductor substrate having a silicide layer, forming a hole in the insulating film on the silicide layer, cleaning an inside of the hole and a surface of the ... | 12/13/2011 |
| 8048803 | Method for forming contact plug in a semiconductor device A method for forming a contact plug in a semiconductor device includes providing a substrate having an insulation layer. A hard mask pattern is formed over the insulation layer. The insulation layer is etched using the hard mask pattern to form a contact hole. A plu... | 11/01/2011 |
| 8030211 | Methods for forming bit line contacts and bit lines during the formation of a semiconductor device A method for forming a semiconductor device comprises forming first and second bit lines at different levels. Forming the bit lines at different levels increases processing latitude, particularly the spacing between the bit lines which, with conventional processes, ... | 10/04/2011 |
| 7994054 | Semiconductor device having oxidized metal film and manufacture method of the same A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in ... | 08/09/2011 |
| 7955976 | Methods of forming semiconductor structures The present invention relates to methods of forming semiconductor structures. The methods may include disposing electrically conductive material within an opening in a first dielectric material, passivating an upper surface of the electrically conductive material an... | 06/07/2011 |
| 7915164 | Method for forming doped polysilicon via connecting polysilicon layers The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory array of charge storage transistors. Polysilicon vias according to the... | 03/29/2011 |
| 7915163 | Method for forming doped polysilicon via connecting polysilicon layers The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory array of charge storage transistors. Polysilicon vias according to the... | 03/29/2011 |
| 7910481 | Method for fabricating semiconductor device A method for fabricating a semiconductor device includes forming an interlayer dielectric layer having a plurality of contact holes over a substrate, forming a conductive layer by filling the contact holes to cover the interlayer dielectric layer, performing a first... | 03/22/2011 |
| 7910480 | Method for insulating wires of semiconductor device Disclosed herein is a method for insulating wires of a semiconductor device. One embodiment of the method includes forming first bit line stacks over a cell region of a semiconductor substrate and second bit line stacks over a peripheral region of the semiconductor ... | 03/22/2011 |
| 7897512 | Methods of forming integrated circuit devices including a multi-layer structure with a contact extending therethrough Integrated circuit devices have a first substrate layer and a first transistor on the first substrate layer. A first interlayer insulating film covers the first transistor. A second substrate layer is on the first interlayer insulating film and a second transistor i... | 03/01/2011 |
| 7897511 | Wafer-level stack package and method of fabricating the same A method of manufacturing a semiconductor device includes forming an integrated circuit region on a semiconductor wafer. A first metal layer pattern is formed over the integrated circuit region. A via hole is formed to extend through the first metal layer pattern an... | 03/01/2011 |
| 7867902 | Methods of forming a contact structure In a method of forming a contact structure, a first insulation layer including a first contact hole is formed on a substrate. A metal layer including tungsten is formed to fill the first contact hole. A planarization process is performed on the metal layer until the... | 01/11/2011 |
| 7858520 | Semiconductor package with improved size, reliability, warpage prevention, and heat dissipation and method for manufacturing the same The semiconductor package includes a semiconductor package module with circuit patterns formed on an insulation substrate, at least two semiconductor chips electrically connected to each of the circuit patterns using bumps, and an insulation member filled in any ope... | 12/28/2010 |
| 7855145 | Gap filling method and method for forming semiconductor memory device using the same A gap filling method and a method for forming a memory device, including forming an insulating layer on a substrate, forming a gap region in the insulating layer, and repeatedly forming a phase change material layer and etching the phase change material layer to for... | 12/21/2010 |
| 7838420 | Method for forming a packaged semiconductor device A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side o... | 11/23/2010 |
| 7838421 | Method of forming metal line of semiconductor device A method of forming metal lines of a semiconductor device, comprising providing a semiconductor substrate in which a plurality of gates and junctions formed between the gates are included in a cell area and a peripheral area; forming an insulating layer over the sem... | 11/23/2010 |
| 7811935 | Isolation regions and their formation A dielectric liner is formed in first and second trenches respectively in first and second portions of a substrate. A layer of material is formed overlying the dielectric liner so as to substantially concurrently substantially fill the first trench and partially fil... | 10/12/2010 |
| 7795142 | Method for fabricating a semiconductor device A method for fabricating a semiconductor device includes forming a dielectric film containing a porogen material above a substrate; removing a portion of the porogen material contained in the dielectric film so as to make a concentration of the porogen material high... | 09/14/2010 |
| 7795141 | Method of manufacturing semiconductor device suitable for forming wiring using damascene method (a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Condu... | 09/14/2010 |
| 7790613 | Semiconductor device and method of manufacturing the same A semiconductor device includes: a semiconductor substrate; a memory cell selection transistor that is formed on the semiconductor substrate and has a source and a drain; a contact plug; a polysilicon interlayer film that is formed above the memory cell selection tr... | 09/07/2010 |
| 7790614 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device includes forming on a lower insulating layer first to third electrically conducting layers sequentially, forming a mask pattern on the third conducting layer, dry-etching the first to third conducting layers with the ... | 09/07/2010 |
| 7749904 | Method of forming a dual damascene structure An improved method of forming an integrated circuit that includes a dual damascene interconnect is described. A contact via hole is formed in a dielectric layer disposed above a semiconductor substrate. A protective layer is disposed on top of the dielectric layer a... | 07/06/2010 |
| 7745331 | Method for fabricating contact plug in semiconductor device An insulation layer including a landing plug is formed over a substrate. An amorphous carbon hard mask is formed over a certain portion of the insulation layer. The insulation layer is etched using the amorphous carbon hard mask to form a storage node contact hole e... | 06/29/2010 |
| 7713873 | Methods of forming contact structures semiconductor devices Methods of forming a contact structure in a semiconductor device include providing a semiconductor substrate including active regions and word lines crossing the active regions. A first interlayer dielectric layer is formed on the semiconductor substrate. Direct con... | 05/11/2010 |
| 7691748 | Through-silicon via and method for forming the same A method for forming a through-silicon via includes the steps of defining a groove in each chip of a wafer which has a plurality of semiconductor chips; applying liquid polymer on the wafer to fill the groove; forming an insulation layer on a sidewall of the groove ... | 04/06/2010 |
| 7682972 | Advanced multilayer coreless support structures and method for their fabrication A method of fabricating a free standing membrane including via array in a dielectric for use as a precursor in the construction of superior electronic support structures, includes the steps of fabricating a membrane of conductive vias in a dielectric surround on a s... | 03/23/2010 |
| 7666789 | Method of manufacturing a variable resistance structure and method of manufacturing a phase-change memory device using the same In methods of manufacturing a variable resistance structure and a phase-change memory device, after forming a first insulation layer on a substrate having a contact region, a contact hole exposing the contact region is formed through the first insulation layer. Afte... | 02/23/2010 |
| 7659201 | Process for manufacturing semiconductor integrated circuit device In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of... | 02/09/2010 |
| 7645700 | Dry etchback of interconnect contacts A method and structure for a composite stud contact interface with a decreased contact resistance and improved reliability. A selective dry etch is used which comprises a fluorine containing gas. The contact resistance is reduced by partially dry-etching back the tu... | 01/12/2010 |
| 7629255 | Method for reducing microloading in etching high aspect ratio structures A method for etching features of different aspect ratios in a conductive layer is provided. The method comprises: depositing over the conductive layer with an aspect ratio dependent deposition; etching features into the conductive layer with an aspect ratio dependen... | 12/08/2009 |
| 7608537 | Method for fabricating semiconductor device A method for fabricating a semiconductor device, includes forming an opening in a first film, embedding an alignment mark material for alignment with an upper layer in the opening, forming a second film on the first film in which the alignment mark material is embed... | 10/27/2009 |
| 7605081 | Sub-lithographic feature patterning using self-aligned self-assembly polymers A method for conducting sub-lithography feature patterning of a device structure is provided. First, a lithographically patterned mask layer that contains one or more mask openings of a diameter d is formed by lithography and etching over an upper surface of the dev... | 10/20/2009 |
| 7595267 | Method of forming contact hole of semiconductor device A method of forming a contact hole of a semiconductor device is disclosed. At the time of a hard mask formation process for forming a contact hole of a semiconductor device, first patterns are formed using a photoresist pattern employing an exposure process. Spacers... | 09/29/2009 |
| 7582561 | Method of selectively depositing materials on a substrate using a supercritical fluid A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a polymer film to at least a portion of a surface of the substrate; and exposing the semiconductor substrate ... | 09/01/2009 |
| 7557038 | Method for fabricating self-aligned contact hole Disclosed are: (i) a method for fabricating self-aligned contact hole in a semiconductor device, and (ii) a semiconductor device having a self-aligned contact. The method comprises the steps of: (a) forming an oxide layer covering a gate structure on a semiconductor... | 07/07/2009 |
| 7557039 | Method for fabricating contact hole of semiconductor device A method for forming a contact hole of a semiconductor device includes: forming a lower pattern over a substrate; forming a spin-on-glass (SOG) layer over the lower pattern; performing a first curing process on the SOG layer; forming an opening exposing a portion of... | 07/07/2009 |
| 7514362 | Integrated circuit including sub-lithographic structures A method which makes it possible to define in a patterning layer openings having a first dimension that is substantially less than the feature size that can be obtained lithographically includes applying a sacrificial layer made of a material that is different from ... | 04/07/2009 |
