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| Number | Title | Issue Date |
| 8080474 | Method for making electrode The present invention provides a method for making an electrode. Firstly, a conducting substrate is provided. Secondly, a plurality of nano-sized structures is formed on the conducting substrate by a nano-imprinting method. Thirdly, a coating is formed on the nano-s... | 12/20/2011 |
| 8048800 | Fabrication method of two-terminal semiconductor component using trench technology A method of fabricating a two-terminal semiconductor component using a trench technique is disclosed that includes forming a trench by etching an etching pattern formed on a substrate on which an active layer having impurities added is grown, forming a front metal l... | 11/01/2011 |
| 7727888 | Interconnect structure and method for forming the same An interconnect structure and a method for forming the same are described. Specifically, under the present invention, a gouge is created within a via formed in the interconnect structure before any trenches are formed. This prevents the above-mentioned trench damage... | 06/01/2010 |
| 7407862 | Method for manufacturing ferroelectric memory device A method for manufacturing a ferroelectric memory device includes the steps of forming an active element on a substrate; forming an interlayer dielectric film on the substrate; forming a contact hole in the interlayer dielectric film; forming, in the contact hole, a... | 08/05/2008 |
| 7329948 | Microelectronic devices and methods A microelectronic device is made of a semiconductor substrate, a heat generating component in a layer thereof, and a body within the remaining semiconductor substrate. The body is made of materials which have a high thermal inertia and/or thermal conductivity. When ... | 02/12/2008 |
| 7309650 | Memory device having a nanocrystal charge storage region and method A memory device having a metal nanocrystal charge storage structure and a method for its manufacture. The memory device may be manufactured by forming a first oxide layer on the semiconductor substrate, then disposing a porous dielectric layer on the oxide layer and... | 12/18/2007 |
| 7298002 | Hemispherical silicon grain capacitor with variable grain size A semiconductor device includes cylindrical capacitors each including corresponding cylindrical electrodes. Each cylindrical electrode includes hemispherical silicon grains. The hemispherical silicon grains protruding from an upper region of the cylindrical electrod... | 11/20/2007 |
| 7273791 | Methods for forming a conductive structure using oxygen diffusion through one metal layer to oxidize a second metal layer A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g. ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen through grain boun... | 09/25/2007 |
| 7271071 | Method of forming a catalytic surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms The invention includes methods of forming a substrate having a surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms. In one implementation, a substrate is provided which has a first substrate surface comprising at least o... | 09/18/2007 |
| 7253104 | Methods of forming particle-containing materials The invention includes methods of forming particle-containing materials, and also includes semiconductor constructions comprising particle-containing materials. One aspect of the invention includes a method in which a first monolayer is formed across at least a port... | 08/07/2007 |
| 7249411 | Methods for mounting surface-mounted electrical components Methods for mounting electrical components on a substrate and securely retaining the components are described. The methods include altering solder paste compositions, interposed between component retentive pins and retentive through holes, during a reflow process. E... | 07/31/2007 |
| 7220670 | Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by same A method for depositing a rough polysilicon film on a substrate is disclosed. The method includes introducing the reactant gases argon and silane into a deposition chamber and enabling and disabling a plasma at various times during the deposition process. ... | 05/22/2007 |
| 7214569 | Apparatus incorporating small-feature-size and large-feature-size components and method for making same An apparatus incorporating small-feature size and large-feature-size components. The apparatus comprise a strap including a substrate with an integrated circuit contained therein. The integrated circuit coupling to a first conductor disposed on the substrate. The fi... | 05/08/2007 |
| 7205192 | Semiconductor memory device capable of preventing oxidation of plug and method for fabricating the same A semiconductor device and a fabrication method thereof provides a plug structure composed of a diffusion barrier layer formed at the bottom and on the sides of a contact hole and an oxidation barrier layer formed on the diffusion barrier layer that fills up the ins... | 04/17/2007 |
| 7199043 | Method of forming copper wiring in semiconductor device Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper layer is polished by means of a chemical mechanical polishing proces... | 04/03/2007 |
| 7196000 | Method for manufacturing a wafer level chip scale package A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an emb... | 03/27/2007 |
| 7183196 | Multilayer interconnection board and production method thereof A multilayer interconnection board is disclosed that allows reliable electrical connection between an interconnection having a large width and a large area and a via provided in a via hole formed by pressing a tool against resin. A projecting portion for electrical ... | 02/27/2007 |
| 7170176 | Semiconductor device A technology for easily forming a multi-layer wiring structure that is fine and reliable. In the multi-layer wiring structure, the lower-layer wiring and the upper-layer wiring that are formed to sandwich an insulating layer are electrically connected to each other ... | 01/30/2007 |
| 7160744 | Fabrication method of light emitting diode incorporating substrate surface treatment by laser and light emitting diode fabricated thereby The present invention relates to a fabrication method of LEDs incorporating a step of surface-treating a substrate by a laser and an LED fabricated by such a fabrication method. The present invention can use a laser in order to implement finer surface treatment to a... | 01/09/2007 |
| 7160758 | Electronic packaging apparatus and method An electronic assembly includes a substrate, a device attached to the substrate, and a thermally conductive heat spreader covering the device and at least a portion of the substrate. A metal substantially fills the space between the device and the thermally conducti... | 01/09/2007 |
| 7157367 | Device structure having enhanced surface adhesion and failure mode analysis A substrate is provided having semiconductor device structures formed in and on the substrate. The semiconductor device structures comprise conductor layers embedded in openings in dielectric layers having a dielectric constant of less than 4.5. The dielectric layer... | 01/02/2007 |
| 7132345 | Method for fabricating flash memory device A flash memory device fabrication method is disclosed. A disclosed method comprises: depositing a first oxide layer on a substrate; depositing a first polysilicon layer on the first oxide layer; forming a second oxide layer on the entire surface of the first polysil... | 11/07/2006 |
| 7129590 | Stencil and method for depositing material onto a substrate A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die. ... | 10/31/2006 |
| 7122456 | Method for reduced input output area An input output ring for a semiconductor device is disclosed that uses power buffers having widths that vary from the widths of the input and output buffers. In one embodiment, the pitches between bond pads are the same, in another embodiment the pitches between the... | 10/17/2006 |
| 7105384 | Circuit device manufacturing method including mounting circuit elements on a conductive foil, forming separation grooves in the foil, and etching the rear of the foil A circuit device manufacturing method is provided, wherein contaminants attached to the top surfaces of conductive patterns 21 are removed using plasma to thereby improve the adhesion of conductive patterns 21 to a sealing resin 28. By selective... | 09/12/2006 |
| 7101760 | Charge trapping nanocrystal dielectric for non-volatile memory transistor A layer of nanocrystals for use in making EEPROMs is made by creating a matrix of silicon seeds in annealed silicon oxide atop a thin silicon dioxide layer. Then nanocrystals are grown on the seeds by vapor deposition of silane in a reactor until a time before agglo... | 09/05/2006 |
| 7078333 | Method to improve adhesion of dielectric films in damascene interconnects Method of improving adhesion of low dielectric constant films to other dielectric films and barrier metals in a damascene process are achieved. In one method, a low dielectric constant material layer is deposited on a substrate. Silicon ions are implanted into the l... | 07/18/2006 |
| 7067861 | Device and method for protecting against oxidation of a conductive layer in said device In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from bein... | 06/27/2006 |
| 7049191 | Method for protecting against oxidation of a conductive layer in said device In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from bein... | 05/23/2006 |
| 7041550 | Device and method for protecting against oxidation of a conductive layer in said device In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from bein... | 05/09/2006 |
| 7029985 | Method of forming MIS capacitor An MIS capacitor with low leakage and high capacitance is disclosed. A layer of hemispherical grained polysilicon (HSG) is formed as a lower electrode. Prior to the dielectric formation, the hemispherical grained polysilicon layer may be optionally subjected to a ni... | 04/18/2006 |
| 7022603 | Method for fabricating semiconductor device having stacked-gate structure A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon... | 04/04/2006 |
| 7022570 | Methods of forming hemispherical grained silicon on a template on a semiconductor work object The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by sil... | 04/04/2006 |
| 6995416 | Memory device for storing electrical charge and method for fabricating the same The invention provides a memory device for storing electrical charge, which has, as memory elements, tube elements applied on an electrode layer and connect-connected thereto. The tube elements are provided with a dielectric coating, a filling material for filling t... | 02/07/2006 |
| 6987070 | Method for forming low-k dielectric layer of semiconductor device Disclosed is a method for forming a low-k dielectric layer of a semiconductor device. The method includes a step providing a semiconductor substrate having a predetermined pattern, a step coating porous powders having a micro size on the semiconductor by spraying th... | 01/17/2006 |
| 6977213 | IC chip solder bump structure and method of manufacturing same Disclosed herein are a method of manufacturing a solder bump on a semiconductor device, a solder bump structure formed on a substrate, and an intermediate solder bump structure. In one embodiment, the method includes creating a bonding pad over a semiconductor subst... | 12/20/2005 |
| 6972452 | Device and method for protecting against oxidation of a conductive layer in said device In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from bein... | 12/06/2005 |
| 6949434 | Method of manufacturing a vertical semiconductor device A method of manufacturing a vertical semiconductor device includes preparing a semiconductor wafer which has a heavily doped semiconductor substrate and a lightly doped semiconductor layer disposed over the semiconductor substrate, forming a semiconductor element at... | 09/27/2005 |
| 6933176 | Ball grid array package and process for manufacturing same A ball grid array integrated circuit package is manufactured by mounting a semiconductor die, to a surface of a substrate such that bumps on the semiconductor die are electrically connected to conductive traces of the substrate. At least one collapsible spacer is mo... | 08/23/2005 |
| 6924523 | Semiconductor memory device and method for manufacturing the device A semiconductor memory device includes a semiconductor substrate and a support layer provided above the semiconductor substrate. Particles are formed on the support layer. A first electrode is provided on the support layer such that it covers the particles. The firs... | 08/02/2005 |
