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"That the automobile has practically reached the limit of its development is suggested by the fact that during the past year no improvements of a radical nature have been introduced."
Scientific American ; Jan. 2 edition, 1909
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| Number | Title | Issue Date |
| 8158512 | Atomic layer deposition method and semiconductor device formed by the same There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within a ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert p... | 04/17/2012 |
| 8124529 | Semiconductor device fabricated using a metal microstructure control process The invention provides a method for manufacturing a semiconductor device that comprises placing a metallic gate layer over a gate dielectric layer where the metallic gate layer has a crystallographic orientation, and re-orienting the crystallographic orientation of ... | 02/28/2012 |
| 8088688 | p+ polysilicon material on aluminum for non-volatile memory device and method A method of forming a non-volatile memory device. The method includes providing a substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring material comprising at least an aluminum material is formed overl... | 01/03/2012 |
| 7968458 | Electronic circuit board and its manufacturing method A production process for making an electronic circuit substrate comprising: a patterning step of forming a respectively anodically oxidizable conductor pattern and distribution pattern connected to the conductor pattern on a substrate; and an anodic oxidation step o... | 06/28/2011 |
| 7713869 | Manufacture method for semiconductor device suitable for forming wirings by damascene method and semiconductor device An interlayer insulating film having a concave portion is formed on a semiconductor substrate. A tight adhesion film is formed on the inner surface of the concave portion and the upper surface of the insulating film. The surface of the adhesion layer is covered with... | 05/11/2010 |
| 7645699 | Method of forming a diffusion barrier layer using a TaSiN layer and method of forming a metal interconnection line using the same The present invention provides a method of forming a diffusion barrier layer comprising a TaSiN layer. The method includes depositing a TaN layer into a via hole which penetrates an insulation layer exposing a first metal line layer, and transforming the TaN layer i... | 01/12/2010 |
| 7569482 | Method for the selective removal of an unsilicided metal An integrated circuit is silicided by depositing at least one metal on a silicon-containing region and forming a metal silicide. Residue metal that has not been silicided during the formation of the metal silicide is then removed. The removal of the residue metal in... | 08/04/2009 |
| 7442636 | Method of inhibiting copper corrosion during supercritical COcleaning A method for the pre-treatment of a wafer substrates with exposed metal surfaces is disclosed. The pre-treatment reduces oxidation of the exposed metal surfaces during subsequent supercritical cleaning processes. ... | 10/28/2008 |
| 7413985 | Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device By forming a copper/silicon/nitrogen alloy in a surface portion of a copper-containing region on the basis of a precursor layer, highly controllable and reliable process conditions may be established. The precursor layer may be formed on the basis of a liquid precur... | 08/19/2008 |
| 7396764 | Manufacturing method for forming all regions of the gate electrode silicided The technology which can improve the performance of a MOS transistor in which all the regions of the gate electrode were silicided is offered. A gate insulating film and a gate electrode of an nMOS transistor are laminated and formed in this order on a semico... | 07/08/2008 |
| 7381633 | Method of making a patterned metal oxide film A method of making a patterned metal oxide film includes jetting a sol-gel solution on a substrate. The sol-gel solution is dried to form a gel layer on the substrate. Portions of the gel layer are irradiated to pattern the gel layer and to form exposed portions. Ir... | 06/03/2008 |
| 7375024 | Method for fabricating metal interconnection line with use of barrier metal layer formed in low temperature The present invention relates to a method for fabricating a metal interconnection line with use of a barrier metal layer formed in a low temperature. The method includes the steps of: forming an inter-layer insulation layer on a substrate; etching predetermined regi... | 05/20/2008 |
| 7361586 | Preamorphization to minimize void formation Methods are described for eliminating void formation during the fabrication of and/or operation of memory cells/devices. According to one aspect of the present disclosure, the methods to eliminate voids include formation of an opening on a semiconductor structure, f... | 04/22/2008 |
| 7329607 | Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby A conductive connection forming method includes forming a first layer comprising a first metal on a substrate and forming a second layer comprising a second metal different from the first metal on the first layer. At least a part of the first layer may be transforme... | 02/12/2008 |
| 7320939 | Semiconductor device fabricated by a method of reducing the contact resistance of the connection regions A semiconductor device, fabricated by a method, having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate is disclosed. In one embodiment, the method includes i) forming, at least at the s... | 01/22/2008 |
| 7309651 | Method for improving reliability of copper interconnects Doping copper interconnects (100) with silicon (115) has been shown to improve Electromigration and Via Stress Migration reliability. After copper (118) is deposited by electrochemical deposition and chemically-mechanically polished back, doping... | 12/18/2007 |
| 7285496 | Hardening of copper to improve copper CMP performance A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity a... | 10/23/2007 |
| 7271038 | Methods of forming ruthenium film by changing process conditions during chemical vapor deposition and ruthenium films formed thereby A ruthenium (Ru) film is formed on a substrate as part of a two-stage methodology. During the first stage, the Ru film is formed on the substrate in a manner in which the Ru nucleation rate is greater than the Ru growth rate. During the second stage, the Ru film is ... | 09/18/2007 |
| 7259095 | Semiconductor device and manufacturing process therefor as well as plating solution A semiconductor device of improved stress-migration resistance and reliability includes an insulating film having formed therein a lower interconnection consisting of a barrier metal film and a copper-silver alloy film, on which is then formed an interlayer insulati... | 08/21/2007 |
| 7247554 | Method of making integrated circuits using ruthenium and its oxides as a Cu diffusion barrier The present invention generally relates to methods used for fabricating integrated circuits (“ICs”), using Ruthenium (“Ru”) and its oxides and/or Iridium (“Ir”) and its oxides as the diffusion barrier to contain and control copper (“Cu”) interconnect... | 07/24/2007 |
| 7247578 | Method of varying etch selectivities of a film A method of patterning a crystalline film. A crystalline film having a degenerate lattice comprising first atoms in a first region and a second region is provided. Dopants are substituted for said first atoms in said first region to form a non-degenerate crystalline... | 07/24/2007 |
| 7241677 | Process for producing integrated circuits including reduction using gaseous organic compounds This invention concerns a process for producing integrated circuits containing at least one layer of elemental metal which during the processing of the integrated circuit is at least partly in the form of metal oxide, and the use of an organic compound containing ce... | 07/10/2007 |
| 7235884 | Local control of electrical and mechanical properties of copper interconnects to achieve stable and reliable via The present invention is a novel method whereby voids or solid opens at the bottom of via can be avoided without drastically altering the resistivity or parasitic capacitances of the whole metal interconnect system. The invention includes in one embodiment a process... | 06/26/2007 |
| 7233071 | Low-k dielectric layer based upon carbon nanostructures A low-k dielectric material for use in the manufacture of semiconductor devices, semiconductor structures using the low-k dielectric material, and methods of forming such dielectric materials and fabricating such structures. The low-k dielectric material comprises c... | 06/19/2007 |
| 7229923 | Multi-step process for forming a barrier film for use in copper layer formation Methods for forming robust copper structures include steps for providing a substrate with an insulating layer with openings formed therein. At least two barrier layers are then formed followed by the deposition of a copper seed layer which is annealed. Bulk copper d... | 06/12/2007 |
| 7229918 | Nitrogen rich barrier layers and methods of fabrication thereof Methods of forming barrier layers and structures thereof are disclosed. A nitrogen rich region is formed at a top surface of a barrier layer by exposing the barrier layer to a nitridation treatment. The nitrogen rich region increases the oxidation resistance of the ... | 06/12/2007 |
| 7223691 | Method of forming low resistance and reliable via in inter-level dielectric interconnect A novel interlevel contact via structure having low contact resistance and improved reliability, and method of forming the contact via. The method comprises steps of: etching an opening through an interlevel dielectric layer to expose an underlying metal (Copper) la... | 05/29/2007 |
| 7220674 | Copper alloys for interconnections having improved electromigration characteristics and methods of making same Formation of copper alloy interconnect lines on integrated circuits includes introducing dopant elements into a copper layer. Copper alloy interconnect lines may be formed by providing a doping layer over a copper layer, driving dopant material into the copper layer... | 05/22/2007 |
| 7220672 | Semiconductor device comprising metal silicide films formed to cover gate electrode and source-drain diffusion layers and method of manufacturing the same The invention provides a semiconductor device, and a manufacturing method, comprising a semiconductor substrate, a gate insulating film, a gate electrode, and a source-drain diffusion layer. A silicide film is formed on the gate electrode and the source-drain diffus... | 05/22/2007 |
| 7220623 | Method for manufacturing silicide and semiconductor with the silicide The present invention is directed to a method of manufacturing silicide used to reduce a contact resistance at a contact of a semiconductor device and a semiconductor device with the silicide manufactured by the same method. The method comprises the steps of: (a) cl... | 05/22/2007 |
| 7220670 | Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by same A method for depositing a rough polysilicon film on a substrate is disclosed. The method includes introducing the reactant gases argon and silane into a deposition chamber and enabling and disabling a plasma at various times during the deposition process. ... | 05/22/2007 |
| 7199043 | Method of forming copper wiring in semiconductor device Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper layer is polished by means of a chemical mechanical polishing proces... | 04/03/2007 |
| 7192865 | Semiconductor device and process for producing the same A semiconductor device and a process for producing the same, the semiconductor device comprising two conductive layers provided as separate layers, and an insulating layer sandwiched by the two conductive layers, in which the two conductive layers are electrically c... | 03/20/2007 |
| 7186571 | Method of fabricating a compositionally modulated electrode in a magnetic tunnel junction device A magnetic tunnel junction device with a compositionally modulated electrode and a method of fabricating a magnetic tunnel junction device with a compositionally modulated electrode are disclosed. An electrode in electrical communication with a data layer of the mag... | 03/06/2007 |
| 7144808 | Integration flow to prevent delamination from copper The present invention provides, in one embodiment, method of forming a barrier layer 300 over a semiconductor substrate 110. The method comprises forming an opening 120 in an insulating layer 130 located over a substrate thereby uncovering an underlying copper layer... | 12/05/2006 |
| 7145244 | Hardening of copper to improve copper CMP performance A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity a... | 12/05/2006 |
| 7141495 | Methods and forming structures, structures and apparatuses for forming structures Methods of forming a contact structure, contact structures and apparatuses applied thereto are disclosed. The method of forming a contact structure forms a dielectric layer on a substrate. A metal contact with metal oxide thereon is formed in the dielectric layer. T... | 11/28/2006 |
| 7125797 | Contact structure of semiconductor device and method of forming the same A contact structure of a semiconductor includes a substrate, a conductive doping layer having an opposite polarity to that of the substrate, the conductive doping layer being formed in the substrate, a conductive layer formed on the conductive doping layer, and an i... | 10/24/2006 |
| 7126224 | Semiconductor substrate-based interconnection assembly for semiconductor device bearing external connection elements The present invention relates to a method of forming interconnections for a temporary package, wherein the interconnections are capable of receiving solder balls on a die, partial wafer or wafer under test for testing and burn-in. The interconnections are formed in ... | 10/24/2006 |
| 7119000 | Method of manufacturing semiconductor device The resist film is provided on the surface of the substrate having electrodes, and openings are provided in the resist film at positions of the electrodes on the substrate. The first metal is supplied into the openings. The first metal is then heated to melt and coa... | 10/10/2006 |
