Did You Know...
...that while attempting to develop a super strong glue, 3M employee Spencer Silver accidentally developed a glue that was so weak it would barely hold two pieces of paper together? However, his colleague Art Fry needed the glue. Fry sang with his church choir and marked the pages of his hymnal with small scraps of paper that often fell out. He used Silver's glue to hold the papers in place. Today we call this invention Post-it Notes.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8129270 | Method for depositing tungsten film having low resistivity, low roughness and high reflectivity Top-down methods of increasing reflectivity of tungsten films to form films having high reflectivity, low resistivity and low roughness are provided. The methods involve bulk deposition of tungsten followed by a removing a top portion of the deposited tungsten. In p... | 03/06/2012 |
| 8129271 | Film forming method, film forming apparatus and storage medium A film forming method is provided with a substrate placing step wherein a substrate is placed in a process chamber in an airtight status; a first film forming step wherein the process chamber is supplied with water vapor and a material gas including an organic compo... | 03/06/2012 |
| 8124528 | Method for forming a ruthenium film Methods for forming ruthenium films and semiconductor devices such as capacitors that include the films are provided. ... | 02/28/2012 |
| 7838418 | Spray dispensing method for applying liquid metal Embodiments of a method for applying a thermal-interface material are described. During this method, a first surface of a heat-removal device and a second surface of a semiconductor die are prepared. Next, a region on a given surface, which is at least one of the fi... | 11/23/2010 |
| 7816259 | Method of forming a contact in a semiconductor device Deterioration of yield may be prevented when a contact in a semiconductor device is made by a method including forming a contact hole by selectively removing an insulating layer from a semiconductor substrate, depositing a barrier layer on the insulating layer and o... | 10/19/2010 |
| 7635646 | Method for fabricating semiconductor device A method for fabricating a semiconductor device, includes forming a first dielectric film above a substrate, forming an opening in the first dielectric film, forming a catalytic characteristic film using at least one of a metal having catalytic characteristics and a... | 12/22/2009 |
| 7605078 | Integration of a variable thickness copper seed layer in copper metallization A method for forming a variable thickness Cu seed layer on a substrate for a subsequent Cu electrochemical plating process, where the Cu seed layer thickness profile improves uniformity of the electroplated Cu layer compared to when using a constant thickness Cu see... | 10/20/2009 |
| 7601637 | Atomic layer deposited tantalum containing adhesion layer Apparatus and methods of fabricating an atomic layer deposited tantalum containing adhesion layer within at least one dielectric material in the formation of a metal, wherein the atomic layer deposition tantalum containing adhesion layer is sufficiently thin to mini... | 10/13/2009 |
| 7514359 | Adhering layers to metals with dielectric adhesive layers The present invention provides a method for adhering dielectric layers to metals, in particular inert metals, using an adhesive layer comprising silicon-rich silicon nitride. Good adhesion is achieved at temperatures of less than 300° C., thereby facilitating the f... | 04/07/2009 |
| 7435678 | Method of depositing noble metal electrode using oxidation-reduction reaction Provided is a method of depositing a noble metal layer using an oxidation-reduction reaction. The method includes flowing a noble metal source gas, an oxidizing gas, and a reducing gas into a reaction chamber; and generating plasma in the reaction chamber to form a ... | 10/14/2008 |
| 7432195 | Method for integrating a conformal ruthenium layer into copper metallization of high aspect ratio features A method of integrated processing of a patterned substrate for copper metallization. The method includes providing the patterned substrate containing a via and a trench in a vacuum processing tool, and performing an integrated process on the patterned substrate in t... | 10/07/2008 |
| 7365007 | Interconnects with direct metalization and conductive polymer Embodiments include an interconnect or trace of electrically conductive material with a contact surface, and a dielectric layer overlying the contact surface with a via formed on the dielectric layer and to the contact surface. The via sidewalls and perimeter are la... | 04/29/2008 |
| 7358618 | Semiconductor device and manufacturing method thereof A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce s... | 04/15/2008 |
| 7354848 | Poly-silicon-germanium gate stack and method for forming the same A CMOS gate stack that increases the inversion capacitance compared to a conventional CMOS gate stack has been described. Using a poly-SiGe gate, instead of the conventional poly-Si gate near the gate dielectric layer, increases the amount of implanted dopant that c... | 04/08/2008 |
| 7348268 | Controlled breakdown phase change memory device A phase change memory material may be deposited over an electrode in a pore through an insulator. The adherence of the memory material to the insulator may be improved by using a glue layer. At the same time, a breakdown layer may be formed in the pore between the m... | 03/25/2008 |
| 7329603 | Semiconductor device and manufacturing method thereof A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce s... | 02/12/2008 |
| 7329563 | Method for fabrication of wafer level package incorporating dual compliant layers A method is provided for forming wafer level package that incorporates dual compliant layers and a metal cap layer on top of I/O pads. The wafer level package includes a plurality of metal cap layers formed on top of a plurality of I/O pads to function as stress buf... | 02/12/2008 |
| 7323421 | Silicon wafer etching process and composition A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions. ... | 01/29/2008 |
| 7312535 | Semiconductor device having an anti-oxidizing layer that inhibits corrosion of an interconnect layer The objects of the present invention is to improve the impact resistance of the semiconductor device against the impact from the top surface direction, to improve the corrosion resistance of the surface of the top layer interconnect, to inhibit the crack occurred in... | 12/25/2007 |
| 7282408 | Surface treatment of an oxide layer to enhance adhesion of a ruthenium metal layer A method for forming a ruthenium metal layer on a dielectric layer comprises forming a silicon dioxide layer, then treating the silicon dioxide with a silicon-containing gas, for example silicon hydrides such as silane, disilane, or methylated silanes. Subsequently,... | 10/16/2007 |
| 7282445 | Multiple seed layers for interconnects One embodiment of the present invention is a method for depositing two or more seed layers over a substrate, the substrate includes a patterned insulating layer which comprises at least one opening surrounded by a field, the at least one opening and the field being ... | 10/16/2007 |
| 7276386 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device includes the steps of forming barrier metals on first electrodes provided on a chip of the semiconductor device, implementing a predetermined test on the semiconductor device by applying a signal to the semiconductor ... | 10/02/2007 |
| 7276441 | Dielectric barrier layer for increasing electromigration lifetimes in copper interconnect structures Embodiments of the invention include a copper interconnect structure having increased electromigration lifetime. Such structures can include a semiconductor substrate having a copper layer formed thereon. A dielectric barrier stack is formed on the copper layer. The... | 10/02/2007 |
| 7271071 | Method of forming a catalytic surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms The invention includes methods of forming a substrate having a surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms. In one implementation, a substrate is provided which has a first substrate surface comprising at least o... | 09/18/2007 |
| 7265049 | Ultrathin chemically grown oxide film as a dopant diffusion barrier in semiconductor devices The invention is a chemically grown oxide layer which prevents dopant diffusion between semiconductor layers. The chemically grown oxide layer may be so thin that it does not form a barrier to electrical conduction, and thus may be formed within active devices such ... | 09/04/2007 |
| 7265431 | Imageable bottom anti-reflective coating for high resolution lithography A semiconductor wafer may be coated with an imageable anti-reflective coating. As a result, the coating may be removed using the same techniques used to remove overlying photoresists. This may overcome the difficulty of etching anti-reflective coatings using standar... | 09/04/2007 |
| 7259096 | Method for forming aluminum interconnect A method for forming an Al interconnect is disclosed. A disclosed method comprises: depositing a Ti layer on a substrate having predetermined devices; depositing a TiN layer on the entire surface of the Ti layer by performing a CVD process; performing a plasma treat... | 08/21/2007 |
| 7247524 | Manufacturing method of wiring substrate After a first adhesive layer having high adhesion to a supporting base is locally formed, a second adhesive layer having low adhesion to the supporting base is formed all over the supporting base so as to cover the first adhesive layer. When a wiring structure is se... | 07/24/2007 |
| 7238421 | Pressure sensitive adhesive film for protection of semiconductor wafer surface and method of protecting semiconductor wafer with the pressure sensitive adhesive film The present invention relates to a surface protecting adhesive film for a semiconductor wafer in which an adhesive layer having a storage elastic modulus from 1×105 Pa to 1×107 Pa at 150° C. and a thickness of from 3 μm to 100 μm is formed... | 07/03/2007 |
| 7229929 | Multi-layer gate stack A method of making a semiconductor structure, comprises etching a nitride layer with a plasma to form a patterned nitride layer. The nitride layer is on a semiconductor substrate, a photoresist layer is on the nitride layer, and the plasma is prepared from a gas mix... | 06/12/2007 |
| 7229913 | Stitched micro-via to enhance adhesion and mechanical strength A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conduct... | 06/12/2007 |
| 7223685 | Damascene fabrication with electrochemical layer removal The present application discloses process comprising providing a wafer, the wafer comprising an inter-layer dielectric (ILD) having a feature therein, an under-layer deposited on the ILD, and a barrier layer deposited on the under-layer, and a conductive layer depos... | 05/29/2007 |
| 7220665 | H plasma treatment Electronic devices are constructed by a method that includes forming a first conductive layer in an opening in a multilayer dielectric structure supported by a substrate, forming a core conductive layer on the first conductive layer, subjecting the core conductive l... | 05/22/2007 |
| 7217652 | Method of forming highly conductive semiconductor structures via plasma etch A process for making semiconductor structures uses a decoupled plasma source to produce a highly selective plasma etchant to form a structure with a thin adhesive layer and overlaying conductive layer. The preferred plasma is formed from chlorine and oxygen feed gas... | 05/15/2007 |
| 7217656 | Structure and method for bond pads of copper-metallized integrated circuits A metal structure for a contact pad of a wafer or substrate (101), which have copper interconnecting traces (102) surrounded by a barrier metal layer (103). The wafer or substrate is protected by an insulating overcoat (104). In the struc... | 05/15/2007 |
| 7217945 | Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory cell and structures obtained thereby The present invention relates to a process of forming a phase-change memory. A lower electrode is disposed in a first dielectric film. The lower electrode comprises an upper section and a lower section. The upper section extends beyond the first dielectric film. Res... | 05/15/2007 |
| 7214569 | Apparatus incorporating small-feature-size and large-feature-size components and method for making same An apparatus incorporating small-feature size and large-feature-size components. The apparatus comprise a strap including a substrate with an integrated circuit contained therein. The integrated circuit coupling to a first conductor disposed on the substrate. The fi... | 05/08/2007 |
| 7214602 | Method of forming a conductive structure A method of forming a conductive structure is disclosed. The method includes forming an interconnect in a substrate, and forming a layer of iridium on the interconnect. The layer of iridium has a thickness of less than six hundred angstroms. The method further inclu... | 05/08/2007 |
| 7208805 | Structures comprising a layer free of nitrogen between silicon nitride and photoresist The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first ma... | 04/24/2007 |
| 7199052 | Seed layers for metallic interconnects One embodiment of the present invention is a method for making copper or a copper alloy interconnects, which method includes: (a) forming a patterned insulating layer over a substrate, the patterned insulating layer including at least one opening and a field surroun... | 04/03/2007 |
