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Class 438/651 - Silicide


Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes for forming a contact using the chemical combination
No. of patents: 152
Last issue date: 12/29/2009


1        
NumberTitleIssue Date
7638428Semiconductor structure and method of forming the same
A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a layer of a dielectric material. A recess is provided in the layer of dielectric material. The recess is filled with a material comprising silver. ...
12/29/2009
7528067MOSFET structure with multiple self-aligned silicide contacts
A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field eff...
05/05/2009
7425482Non-volatile memory device and method for fabricating the same
A non-volatile memory device and a method for fabricating the same are provided. The method includes: forming a plurality of gate structures on a substrate, each gate structure including a first electrode layer for a floating gate; forming a first insulation layer c...
09/16/2008
7396764Manufacturing method for forming all regions of the gate electrode silicided
The technology which can improve the performance of a MOS transistor in which all the regions of the gate electrode were silicided is offered. A gate insulating film and a gate electrode of an nMOS transistor are laminated and formed in this order on a semico...
07/08/2008
7375013Semiconductor integrated circuit device and process for manufacturing the same
Formation of an WNX film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNX f...
05/20/2008
7371333Methods of etching nickel silicide and cobalt silicide and methods of forming conductive lines
The invention includes methods of etching nickel silicide and cobalt silicide, and methods of forming conductive lines. In one implementation, a substrate comprising nickel silicide is exposed to a fluid comprising H3PO4 and H2O at a...
05/13/2008
7358188Method of forming conductive metal silicides by reaction of metal with silicon
The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising an exposed elemental silicon containing surface. At least one of a ni...
04/15/2008
7348265Semiconductor device having a silicided gate electrode and method of manufacture therefor
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device (100), among other possible elements, includes a gate oxide (140) located ov...
03/25/2008
7344985Nickel alloy silicide including indium and a method of manufacture therefor
The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate ...
03/18/2008
7338888Method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same
The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device (100), among other possible steps, ...
03/04/2008
7303990Nickel-silicon compound forming method, semiconductor device manufacturing method, and semiconductor device
A nickel-silicon compound forming method is disclosed which comprises forming nickel on at least one of only silicon and a compound containing silicon, and performing stepwise-heating of the nickel together with the at least one of only silicon and the compound cont...
12/04/2007
7285491Salicide process
A salicide process is provided. A metal layer selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed at 300˜400 degrees centigrade for 10˜60 seconds and the second ste...
10/23/2007
7273777Formation of fully silicided (FUSI) gate using a dual silicide process
A method for forming a semiconductor device structure, comprising the steps of independently forming source/drain surface metal silicide layers and a fully silicided metal gate in a polysilicon gate stack. Specifically, one or more sets of spacer structures are prov...
09/25/2007
7268048Methods for elimination of arsenic based defects in semiconductor devices with isolation regions
Methods of preparing conductive regions such as source/drain regions for silicidation procedures, has been developed. The methods feature removal of native oxide as well as removal of deposited arsenic based defects from conductive surfaces prior to deposition of a ...
09/11/2007
7238611Salicide process
A salicide process is provided. A metal layer selected from a group consisting of titanium, cobalt, platinum, palladium and an alloy thereof is formed over a silicon layer. A first thermal process is performed. Next, a second thermal process is performed, wherein th...
07/03/2007
7229921Semiconductor device and manufacturing method for the same
In a method of manufacturing a semiconductor device, a first wiring line composed of a copper containing metal film is formed on or above a semiconductor substrate. A first interlayer insulating film is formed on a whole surface of the semiconductor substrate to cov...
06/12/2007
7229920Method of fabricating metal silicide layer
A method of fabricating a metal silicide layer over a substrate is provided. First, a hard mask layer is formed over a gate formed on a substrate and a portion of the substrate is exposed. Thereafter, a first metal silicide layer, which is a cobalt silicide or a tit...
06/12/2007
7223689Methods for forming a metal contact in a semiconductor device in which an ohmic layer is formed while forming a barrier metal layer
A metal contact in a semiconductor device is formed by forming an insulating layer having a contact hole therein on a silicon substrate. A cobalt layer is formed on a bottom and inner walls of the contact hole. A cobalt silicide layer is formed at the bottom of the ...
05/29/2007
7220623Method for manufacturing silicide and semiconductor with the silicide
The present invention is directed to a method of manufacturing silicide used to reduce a contact resistance at a contact of a semiconductor device and a semiconductor device with the silicide manufactured by the same method. The method comprises the steps of: (a) cl...
05/22/2007
7214577Method of fabricating semiconductor integrated circuit device
A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target ha...
05/08/2007
7211516Nickel silicide including indium and a method of manufacture therefor
The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nicke...
05/01/2007
7202095Method for measuring silicide proportion, method for measuring annealing temperature, method for fabricating semiconductor device and x-ray photo receiver
A measurement substrate 100 in which a silicon oxide film 102, a polysilicon layer 103 and a titanium silicide layer 104 are formed over a silicon substrate 101 in this order is prepared. The measurement substrate 100 is irr...
04/10/2007
7199043Method of forming copper wiring in semiconductor device
Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper layer is polished by means of a chemical mechanical polishing proces...
04/03/2007
7183780Electrical open/short contact alignment structure for active region vs. gate region
An apparatus for measuring alignment of polysilicon shapes to a silicon area. Each polysilicon shape in a first plurality of polysilicon shapes has a bridging vertex positioned near the silicon area. Each polysilicon shape in a second plurality of polysilicon shapes...
02/27/2007
7153731Method of forming a field effect transistor with halo implant regions
A method of forming a field effect transistor includes forming a channel region within bulk semiconductive material of a semiconductor substrate. Source/drain regions are formed on opposing sides of the channel region. An insulative dielectric region is formed withi...
12/26/2006
7148546MOS transistor gates with doped silicide and methods for making the same
Semiconductor devices and fabrication methods are presented, in which transistor gate structures are created using doped metal silicide materials. Upper and lower metal silicides are formed above a gate dielectric, wherein the lower metal silicide is doped with n-ty...
12/12/2006
7125787Method of manufacturing insulated gate semiconductor device
A gate electrode includes a first polysilicon film remaining on a first oxide film, a part of a second polysilicon layer 8 superimposed on the polysilicon layer, and a part of the second polysilicon layer partially extending over second gate oxide films. Thus...
10/24/2006
7122410Polysilicon line having a metal silicide region enabling linewidth scaling including forming a second metal silicide region on the substrate
By maintaining the gate electrode covered during the process flow for forming metal silicide regions in the drain and source of a field effect transistor, an appropriate metal silicide may be formed on the gate electrode which meets the requirement for aggressive ga...
10/17/2006
7119440Back end IC wiring with improved electro-migration resistance
A multi-level semiconductor device wiring interconnect structure and method of forming the same to improve electrical properties and reliability of wiring interconnects including an electromigration resistance and electrical resistance, the method including forming ...
10/10/2006
7112530Method of forming contact hole
A method of forming a contact hole in a semiconductor device, by which a PMD layer as an insulating interlayer is prevented from being overetched by wet cleaning for removing polymer and photoresist after forming a contact hole perforating the PMD layer in a manner ...
09/26/2006
7112535Precision polysilicon resistor process
A process is disclosed for fabricating precision polysilicon resistors which more precisely control the tolerance of the sheet resistivity of the produced polysilicon resistors. The process generally includes performing an emitter/FET activation rapid thermal anneal...
09/26/2006
7067391Method to form a metal silicide gate device
A new method to form metal silicide gates in the fabrication of an integrated circuit device is achieved. The method comprises forming polysilicon lines overlying a substrate with a dielectric layer therebetween. A first isolation layer is formed overlying the subst...
06/27/2006
7060616Method of manufacturing semiconductor device
The present invention is provided to manufacture a semiconductor device capable of preventing loss of dopants due to external diffusion thereof from a junction area by forming a cobalt mono-silicide film through a first RTP process, implanting ions not serving as a ...
06/13/2006
7056794FET gate structure with metal gate electrode and silicide contact
A method is provided for fabricating a single-metal or dual metal replacement gate structure for a semiconductor device; the structure includes a silicide contact to the gate region. A dummy gate structure and sacrificial gate dielectric are removed to expose a port...
06/06/2006
7045456MOS transistor gates with thin lower metal silicide and methods for making the same
Methods are presented for fabricating transistor gate structures, wherein upper and lower metal suicides are formed above a gate dielectric. In one example, the lower silicide is formed by depositing a thin first silicon-containing material over the gate dielectric,...
05/16/2006
7045457Film forming material, film forming method, and silicide film
A technique is provided of forming silicide films usable for next-generation transistors through a CVD process. In the technique of forming a silicide film formed of Ni and Si, where one or more chemical compounds represented with the following general formula [I] a...
05/16/2006
7026243Methods of forming conductive material silicides by reaction of metal with silicon
A method of forming a conductive metal silicide by reaction of metal with silicon is described. A method includes providing a semiconductor substrate with an exposed elemental silicon-containing surface. At least one of a nitride, boride, carbide, or oxide-comprisin...
04/11/2006
7015140Selective salicidation methods
Methods for selective salicidation of a semiconductor device. The invention implements a chemical surface pretreatment by immersion in ozonated water H2O prior to metal deposition. The pretreatment forms an interfacial layer that prevents salicidation ove...
03/21/2006
6908837Method of manufacturing a semiconductor integrated circuit device including a gate electrode having a salicide layer thereon
A method of manufacturing a semiconductor integrated circuit device includes the steps of depositing a first insulating film over a first conductive layer, patterning the first insulating film by using a resist film as a mask to form a cap film, and removing the res...
06/21/2005
6884716Method of forming a crystalline phase material
Methods of forming an electrically conductive line include providing a stress inducing material within or a compressive stress inducing layer operatively adjacent a crystalline material of a first crystalline phase. In addition, such methods include annealing the cr...
04/26/2005
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