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| Number | Title | Issue Date |
| 8178438 | Manufacturing method of semiconductor device and electronic device Silicide films with high quality are formed with treatment of laser light irradiation, so that miniaturization and higher performance is achieved in a field-effect transistor that is formed over an insulating substrate and has little variation in electric characteri... | 05/15/2012 |
| 8173540 | Methods of forming silicide regions and resulting MOS devices A semiconductor device with improved roll-off resistivity and reliability are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a gate electrode overlying the gate dielectric, a gate silicide region on the gate electr... | 05/08/2012 |
| 8053356 | Interconnect structure for semiconductor devices A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, t... | 11/08/2011 |
| 8039388 | Main spacer trim-back method for replacement gate process The embodiments of methods described in this disclosure for trimming back nitride spacers for replacement gates allows the hard mask layers (or hard mask) to protect the polysilicon above the high-K dielectric during trim back process. The process sequence also allo... | 10/18/2011 |
| 8003520 | Air gap structure having protective metal silicide pads on a metal feature A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and ... | 08/23/2011 |
| 7998858 | Vertical interconnect structure, memory device and associated production method The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region... | 08/16/2011 |
| 7989340 | Methods of forming CoSi, methods of forming field effect transistors, and methods of forming conductive contacts The invention included to methods of forming CoSi2, methods of forming field effect transistors, and methods of forming conductive contacts. In one implementation, a method of forming CoSi2 includes forming a substantially amorphous layer compr... | 08/02/2011 |
| 7977236 | Method of forming a transistor gate of a recessed access device, method of forming a recessed transistor gate and a non-recessed transistor gate, and method of fabricating an integrated circuit Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and anoth... | 07/12/2011 |
| 7851353 | Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for the devices Methods of forming metal silicide layers. The methods include: forming a silicon-rich layer between dielectric layers; contacting the silicon-rich layer with a metal layer and heating the silicon rich-layer and the metal layer to diffuse metal atoms from the metal l... | 12/14/2010 |
| 7851352 | Manufacturing method of semiconductor device and electronic device Silicide films with high quality are formed with treatment of laser light irradiation, so that miniaturization and higher performance is achieved in a field-effect transistor that is formed over an insulating substrate and has little variation in electric characteri... | 12/14/2010 |
| 7820546 | Method for manufacturing semiconductor device preventing loss of junction region A method for manufacturing a semiconductor device includes forming an insulation layer having a contact hole on a semiconductor substrate. A metal silicide layer is deposited on a surface of the contact hole and the insulation layer to have a concentration gradient ... | 10/26/2010 |
| 7811928 | Semiconductor devices and fabrication methods thereof Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer... | 10/12/2010 |
| 7786004 | Method of treating an exposed conductive film prior to forming a silicide A method of manufacturing a semiconductor device includes forming a first conductive film on a semiconductor substrate via a first insulating film; forming a second conductive film on the first conductive film via a second insulating film; patterning the first and t... | 08/31/2010 |
| 7786003 | Buried silicide local interconnect with sidewall spacers and method for making the same A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into t... | 08/31/2010 |
| 7767577 | Nested and isolated transistors with reduced impedance difference A processing layer, such as silicon, is formed on a metal silicide contact followed by a metal layer. The silicon and metal layers are annealed to increase the thickness of the metal silicide contact. By selectively increasing the thickness of silicide contacts, R | 08/03/2010 |
| 7754600 | Methods of forming nanostructures on metal-silicide crystallites, and resulting structures and devices Various embodiments of the present invention are directed to methods of forming nanostructures on non-single crystal substrates, and resulting nanostructures and nanoscale functional devices. In one embodiment of the present invention, a method of forming nanostruct... | 07/13/2010 |
| 7709372 | Semiconductor device and method for manufacturing the same A method of manufacturing a metal wiring in a semiconductor device includes: forming a via hole by selectively etching an interlayer insulating layer formed on a first metal layer; sequentially forming a first barrier metal layer and a second metal layer on the inte... | 05/04/2010 |
| 7655556 | Interconnect structures for semiconductor devices A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, t... | 02/02/2010 |
| 7655557 | CMOS silicide metal gate integration The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present inve... | 02/02/2010 |
| 7625819 | Interconnection process An interconnection process is provided. The process includes the following steps. Firstly, a semiconductor base having at least a electrical conductive region is provided. Next, a dielectric layer with a contact hole is formed to cover the semiconductor base, wherei... | 12/01/2009 |
| 7622381 | Semiconductor structure and the forming method thereof The present invention provides a semiconductor structure and the forming method thereof. The structure includes a substrate having a plurality of stacks; a conformal layer on the substrate and a portion of sidewalls of the plurality of the stacks; and a plurality of... | 11/24/2009 |
| 7601634 | Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulat... | 10/13/2009 |
| 7560379 | Semiconductive device fabricated using a raised layer to silicide the gate In one aspect, the invention provides a method of fabricating a semiconductive device 200 that comprises forming a raised layer [510] adjacent a gate [340] and over a source/drain [415], depositing a silicidation layer [915] over t... | 07/14/2009 |
| 7557032 | Silicided recessed silicon Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and anoth... | 07/07/2009 |
| 7485572 | Method for improved formation of cobalt silicide contacts in semiconductor devices A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at a temperature of about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, d... | 02/03/2009 |
| 7456096 | Method of manufacturing silicide layer for semiconductor device It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impu... | 11/25/2008 |
| 7456095 | Method and apparatus for forming nickel silicide with low defect density in FET devices A method and apparatus are provided in which non-directional and directional metal (e.g. Ni) deposition steps are performed in the same process chamber. A first plasma is formed for removing material from a target; a secondary plasma for increasing ion density in th... | 11/25/2008 |
| 7449410 | Methods of forming CoSi, methods of forming field effect transistors, and methods of forming conductive contacts The invention included to methods of forming CoSi2, methods of forming field effect transistors, and methods of forming conductive contacts. In one implementation, a method of forming CoSi2 includes forming a substantially amorphous layer compr... | 11/11/2008 |
| 7432181 | Method of forming self-aligned silicides A method of forming self-aligned silicides is described and applied to a substrate having an isolation area, which divides the substrate into a first area and a second area. A resist protective oxide layer is formed on the substrate, and subsequently a mask layer is... | 10/07/2008 |
| 7425482 | Non-volatile memory device and method for fabricating the same A non-volatile memory device and a method for fabricating the same are provided. The method includes: forming a plurality of gate structures on a substrate, each gate structure including a first electrode layer for a floating gate; forming a first insulation layer c... | 09/16/2008 |
| 7422942 | Method for fabricating a semiconductor device having an insulation film with reduced water content A semiconductor device having a self-aligned contact hole is formed by providing a side wall oxide film on a gate electrode, covering the gate electrode and the side wall oxide film by an oxide film and further covering the oxide film by a nitride film, wherein the ... | 09/09/2008 |
| 7407880 | Semiconductor device and manufacturing process therefore A semiconductor device which can prevent a leak current between a silicide layer on a polysilicon and another part, as well as a manufacturing process therefor. The semiconductor device includes neighboring n- and p-type polysilicons; and a silicide layer thereon ex... | 08/05/2008 |
| 7405112 | Low contact resistance CMOS circuits and methods for their fabrication A low contact resistance CMOS integrated circuit and method for its fabrication are provided. The CMOS integrated circuit comprises a first transition metal electrically coupled to the N-type circuit regions and a second transition metal different than the first tra... | 07/29/2008 |
| 7405154 | Structure and method of forming electrodeposited contacts A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the diel... | 07/29/2008 |
| 7396764 | Manufacturing method for forming all regions of the gate electrode silicided The technology which can improve the performance of a MOS transistor in which all the regions of the gate electrode were silicided is offered. A gate insulating film and a gate electrode of an nMOS transistor are laminated and formed in this order on a semico... | 07/08/2008 |
| 7396570 | Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers Chemical vapor deposition methods of forming titanium silicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period o... | 07/08/2008 |
| 7378344 | Method of manufacturing a semiconductor device including a silicide layer having an NiSi phase provided on source and drain regions A method for manufacturing a MOSFET equipped with a silicide layer over shallow source and drain junctions without leakage generation is provided. By restricting the temperature of manufacturing steps after the silicide formation below a critical temperature Tc, whi... | 05/27/2008 |
| 7375025 | Method for forming a metal silicide layer in a semiconductor device On first and second regions of a substrate are formed a first gate structure including a first gate electrode and a first spacer, and a second gate structure including a second gate electrode and a second spacer, respectively. The first and second spacers are remove... | 05/20/2008 |
| 7375013 | Semiconductor integrated circuit device and process for manufacturing the same Formation of an WNX film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNX f... | 05/20/2008 |
| 7361597 | Semiconductor device and method of fabricating the same A semiconductor device incorporating an alloy layer formed on a substrate; a gate electrode, a source electrode, and a drain electrode formed on the alloy layer at predetermined intervals therebetween; a gate insulating layer formed on the gate electrode in a gate e... | 04/22/2008 |