Did You Know...
...that in 1800 ether was first used by partyers as a fun diversion? Sniffing the gas led to hilarious and raucous laughter as people watched each other become more and more intoxicated and silly. Several doctors independently realized the value ether would have to anesthetize surgery patients. Of those who claimed rights to the "discovery," none had a happy ending. One had a seizure and died defending his rights. Another spent his life in an asylum because he had been denied acclaim. A third became addicted to chloroform and, in a New York City jail, he soaked a cloth in the drug, severed an artery and bled to death.
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| Number | Title | Issue Date |
| 8389393 | Nanoparticle synthesis A noble metal nanoparticle can be grown on a semiconductor substrate by contacting a predetermined region of the substrate with a solution including noble metal ions. The predetermined region of the semiconductor substrate can be exposed by applying a polymeric laye... | 03/05/2013 |
| 8354336 | Forming an electrode having reduced corrosion and water decomposition on surface using an organic protective layer Accordingly, the present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A substrate which has a conductive layer disposed thereon is provided and the conductive layer has an oxide layer with... | 01/15/2013 |
| 8143154 | Relaxed InGaN/AlGaN templates A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at ... | 03/27/2012 |
| 7420226 | Method for integrating silicon CMOS and AlGaN/GaN wideband amplifiers on engineered substrates High-speed silicon CMOS circuits and high-power AlGaN/GaN amplifiers are integrated on the same wafer. A thin layer of high resistivity silicon is bonded on a substrate. Following the bonding, an AlGaN/GaN structure is grown over the bonded silicon layer. A silicon ... | 09/02/2008 |
| 7358539 | Flip-chip light emitting diode with indium-tin-oxide based reflecting contacts A flip chip light emitting diode die (12) includes a light-transmissive substrate (20) and a plurality of semiconductor layers (22) are disposed on the light-transmissive substrate (20). The semiconductor layers (22) define a light... | 04/15/2008 |
| 7354816 | Field effect transistor with gate spacer structure and low-resistance channel coupling Spacer structures of field effect transistor structures are enhanced at least in sections with immobile charge carriers. The charge accumulated in the spacer structures induces an enhancement zone of mobile charge carriers in the underlying semiconductor substrate. ... | 04/08/2008 |
| 7354820 | Heterojunction bipolar transistor with dielectric assisted planarized contacts and method for fabricating A method for fabricating an HBT is disclosed, wherein successive emitter, base, collector and sub-collector epitaxial layers are deposited on a substrate, with the substrate being adjacent to the sub-collector layer. The epitaxial layers are etched to provide locati... | 04/08/2008 |
| 7348195 | Semiconductor light-emitting device and method for fabricating the device An n-type AlAs/n-type Al0.5Ga0.5As DBR layer and a p-type (Al0.2Ga0.8)0.5In0.5P/p-type Al0.5In0.5P DBR layer are formed on an n-type GaAs substrate at specified intervals so that... | 03/25/2008 |
| 7319275 | Adhesion by plasma conditioning of semiconductor chip A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method c... | 01/15/2008 |
| 7311850 | Method of forming patterned thin film and method of fabricating micro device In a method of forming a patterned thin film, first, an etching stopper film and a film to be patterned are formed in this order on a base layer. Next, a patterned first film is formed on the film to be patterned. Next, a second film is formed over an entire surface... | 12/25/2007 |
| 7312150 | Method of forming cobalt disilicide layer and method of manufacturing semiconductor device using the same A method of forming a cobalt disilicide layer and a method of manufacturing a semiconductor device using the same are provided. The method of forming a cobalt disilicide layer includes forming a cobalt layer on at least a silicon surface of a semiconductor device us... | 12/25/2007 |
| 7303933 | Process of manufacturing a semiconductor device A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In.... | 12/04/2007 |
| 7259084 | Growth of GaAs epitaxial layers on Si substrate by using a novel GeSi buffer layer This invention provides a process for growing Ge epitaxial layers on Si substrate by using ultra-high vacuum chemical vapor deposition (UHVCVD), and subsequently growing a GaAs layer on Ge film of the surface of said Ge epitaxial layers by using metal organic chemic... | 08/21/2007 |
| 7220636 | Process for controlling performance characteristics of a negative differential resistance (NDR) device A variety of processes are disclosed for controlling NDR characteristics for an NDR element, such as peak-to-valley ratio (PVR), NDR onset voltage (VNDR) and related parameters. The processes are based on conventional semiconductor manufacturing operation... | 05/22/2007 |
| 7186619 | Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET A semiconductor device is disclosed that includes integrated insulated-gate field-effect transistor (IGFET) elements and one or more negative differential resistance (NDR) field-effect transistor elements, combined and formed on a common substrate. Thus, a variety o... | 03/06/2007 |
| 7176098 | Semiconductor element and method for fabricating the same A heterojunction bipolar transistor comprises a collector layer, a base layer formed on the collector layer and an emitter layer formed on the base layer. The emitter layer includes a first semiconductor layer covering the entire top surface of the base layer and a ... | 02/13/2007 |
| 7172967 | Methods for forming cobalt layers including introducing vaporized cobalt precursors and methods for manufacturing semiconductor devices using the same The present invention provides methods for forming cobalt silicide layers, including introducing a vaporized cobalt precursor onto a silicon substrate to form a cobalt layer. The vaporized cobalt precursor has the formula Co2(CO)6(R1... | 02/06/2007 |
| 7154778 | Nanocrystal write once read only memory for archival storage Structures and methods for write once read only memory employing charge trapping are provided. The write once read only memory cell includes a metal oxide semiconductor field effect transistor (MOSFET) in a substrate. The MOSFET has a first source/drain region, a se... | 12/26/2006 |
| 7118929 | Process for producing an epitaxial layer of gallium nitride The present invention relates to a process for producing an epitaxial layer of gallium nitride (GaN) as well as to the epitaxial layers of gallium nitride (GaN) which can be obtained by said process. Such a process makes it possible to obtain gallium nitride layers ... | 10/10/2006 |
| 7105443 | Method for fabricating epitaxial cobalt-disilicide layers using cobalt-nitride thin film A method for fabricating epitaxial cobalt disilicide layers uses a cobalt-nitride thin film. Epitaxial cobalt disilicide (CoSi2) layers are fabricated using a cobalt-nitride thin film in a salicide process, wherein a silicide is formed on source/drain reg... | 09/12/2006 |
| 7101780 | Method for manufacturing Group-III nitride compound semiconductor device After a p-seat electrode-forming layer is laminated onto a light-transmissive electrode-forming layer, a first heating step and a second heating step are carried out for alloying the two layers. In the first heating step, heat treatment is performed at a relatively ... | 09/05/2006 |
| 7101444 | Defect-free semiconductor templates for epitaxial growth A semiconductor device includes at least one defect-free epitaxial layer. At least a part of the device is manufactured by a method of fabrication of defect-free epitaxial layers on top of a surface of a first solid state material having a first thermal evaporation ... | 09/05/2006 |
| 7098503 | Circuitry and capacitors comprising roughened platinum layers In one aspect, the invention includes a method of forming a roughened layer of platinum, comprising: a) providing a substrate within a reaction chamber; b) flowing an oxidizing gas into the reaction chamber; c) flowing a platinum precursor into the reaction chamber ... | 08/29/2006 |
| 7096873 | Method for manufacturing a group III nitride compound semiconductor device A method for manufacturing a group III nitride compound semiconductor device includes irradiating a surface of a wafer with ultraviolet rays to thereby clean a resist residue from the surface of the wafer, the surface including a group III nitride compound semicondu... | 08/29/2006 |
| 7087931 | High luminance indium gallium aluminum nitride light emitting device and manufacture method thereof A high luminance indium gallium aluminum nitride light emitting diode (LED) is disclosed, including a substrate, a first conductive type nitride layer, an active layer, a second conductive type nitride layer, a first contact layer, a second contact layer, and a cond... | 08/08/2006 |
| 7087969 | Complementary field effect transistor and its manufacturing method A complementary field effect transistor comprises: a semiconductor substrate; an n-type field effect transistor provided on the semiconductor substrate; and a p-type field effect transistor provided on the semiconductor substrate. The n-type field effect transistor ... | 08/08/2006 |
| 7015124 | Use of amorphous carbon for gate patterning A method of producing an integrated circuit includes providing a mask definition structure above a layer of conductive material and providing a mask above the layer of conductive material and in contact with at least a portion of the mask definition structure. The m... | 03/21/2006 |
| 7015054 | Semiconductor light emitting device and method A light-emitting device includes: a semiconductor structure formed on one side of a substrate, the semiconductor structure having a plurality of semiconductor layers and an active region within the layers; and first and second conductive electrodes contacting respec... | 03/21/2006 |
| 7005711 | N-channel pull-up element and logic circuit An n-channel field effect transistor (FET) includes a switchable negative differential resistance (SNDR) characteristic. The n-channel SNDR FET is configured as a depletion mode device, and biased so that it operates essentially as a p-channel device. The device is ... | 02/28/2006 |
| 6995403 | Light emitting device A light emitting device is disclosed. The light emitting device comprises a contact layer and an oxide transparent layer located directly on the contact layer. The contact layer has a stacked structure formed by alternately stacking a plurality of nitride semiconduc... | 02/07/2006 |
| 6980467 | Method of forming a negative differential resistance device A negative differential resistance (NDR) field-effect transistor element is disclosed, formed on a silicon-based substrate using conventional MOS manufacturing operations. Methods for improving a variety of NDR characteristics for an NDR element, such as peak-to-val... | 12/27/2005 |
| 6956127 | Alkyl group VA metal compounds Disclosed are methods of preparing monoalkyl Group VA metal dihalide compounds in high yield and high purity by the reaction of a Group VA metal trihalide with an organo lithium reagent or a compound of the formula RnM1X3−n, where ... | 10/18/2005 |
| 6955980 | Reducing the migration of grain boundaries A method of forming a semiconductor device includes implanting a precipitate into a gate conductor of an at least partially formed semiconductor device. The gate conductor including a plurality of semiconductor grains. The boundaries of adjacent grains forming a dop... | 10/18/2005 |
| 6956241 | Semiconductor light emitting element with improved light extraction efficiency A high-luminance light emitting element is manufactured by a method comprising: forming a light emitting layer on a first surface of a GaP substrate including the first surface and a second surface opposed to the first surface and having an area smaller than the fir... | 10/18/2005 |
| 6946372 | Method of manufacturing gallium nitride based semiconductor light emitting device A method of manufacturing a gallium nitride (GaN)-based semiconductor light emitting device includes forming a contact resistance improved layer on a p-type GaN-based semiconductor layer with at least one metal selected from the group of Au, Mg, Mn, Mo, Pd, Pt, Sn, ... | 09/20/2005 |
| 6933220 | Thyristor switch for microwave signals A thyristor for switching microwave signals includes semiconductor layers disposed on a substrate. A first surface of the thyristor defines an anode, and a second surface of the thyristor defines a cathode. The semiconductor layers include at least one semi-insulati... | 08/23/2005 |
| 6924162 | Process of manufacturing a semiconductor device A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In.... | 08/02/2005 |
| 6920167 | Semiconductor laser device and method for fabricating thereof A semiconductor laser device has on a compound semiconductor substrate at least a lower cladding layer, an active layer, an upper cladding layer and a contact layer. An upper part of the upper cladding layer and the contact layer are formed as a mesa-structured port... | 07/19/2005 |
| 6897139 | Group III nitride compound semiconductor device A titanium layer and a titanium nitride layer are successively laminated on a substrate and a group III nitride compound semiconductor layer is further formed thereon. When the titanium layer is removed in the condition that a sufficient film thickness is given to t... | 05/24/2005 |
| 6894391 | Electrode structure on P-type III group nitride semiconductor layer and formation method thereof An electrode structure on a p-type III group nitride semiconductor layer includes first, second and third electrode layers successively stacked on the semiconductor layer. The first electrode layer includes at least one selected from a first metal group of Ti, Hf, Z... | 05/17/2005 |
