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| Number | Title | Issue Date |
| 7553746 | Method for manufacturing electrodes on a semiconducting material of type II-VI or on a compound of this material A method for manufacturing electrodes on a semiconducting material of type II-VI or on a compound of this material. The electrodes are preferably in gold or platinum and are formed by electrochemical deposition of gold or platinum from a solution of gold or platinum... | 06/30/2009 |
| 7393785 | Methods and apparatus for forming rhodium-containing layers A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula LyRhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for c... | 07/01/2008 |
| 7378310 | Method for manufacturing a memory device having a nanocrystal charge storage region A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. A layer of metal oxide having a first heat of formation is formed on the first... | 05/27/2008 |
| 7226861 | Methods and apparatus for forming rhodium-containing layers A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula LyRhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for c... | 06/05/2007 |
| 7141498 | Method of forming an ohmic contact in wide band semiconductor A method of forming an ohmic contact on a substrate composed of a wide-band gap semiconductor material includes: depositing a transition metal group metal on the substrate; annealing the substrate at a high temperature to cause a solid state chemical reaction betwee... | 11/28/2006 |
| 7056841 | Method for fabricating semiconductor device A method for fabricating a semiconductor device for reducing coupling noise resulting from high integration of devices, comprises the steps of forming a plurality of metal wiring leads spaced from each other by a predetermined distance and arranged on a semiconducto... | 06/06/2006 |
| 6927166 | Method for manufacturing semiconductor devices and integrated circuit capacitors whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed A method of manufacturing a semiconductor device having a metal layer is provided in which variation of surface morphology resulting from thermal oxidation is suppressed. The metal layer is pretreated at a first temperature so that an upper surface of the metal laye... | 08/09/2005 |
| 6919468 | Asymmetric group 8 (VIII) metallocene compounds Asymmetric, disubstituted metallocene compounds have the general formula CpMCp′ where M is a metal selected from the group consisting of Ru, Os and Fe; Cp is a first substituted cyclopentadienyl or indenyl moiety that includes at least one substituent group D... | 07/19/2005 |
| 6852612 | Semiconductor device and method for fabricating the same The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon. ... | 02/08/2005 |
| 6846731 | Schottky diode with silver layer contacting the ZnO and MgxZn1-xO films In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substr... | 01/25/2005 |
| 6825073 | Schottky diode with high field breakdown and low reverse leakage current A Schottky diode structure and a method of making the same are disclosed. The method comprises following steps: firstly, a semiconductor substrate having a first conductive layer and an epi-layer doped with the same type impurities is provided. Then a first oxide la... | 11/30/2004 |
| 6734086 | Semiconductor integrated circuit device and method of manufacturing the same A WN film serving as an adhesive layer is deposited over the sidewalls and bottom surface of a hole in a silicon oxide film where an information storage capacitor is to be formed. A Ru film to serve as a lower electrode for the information storage capacitor is forme... | 05/11/2004 |
| 6683001 | Method for manufacturing a semiconductor device whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed A method of manufacturing a semiconductor device having a metal layer is provided in which variation of surface morphology resulting from thermal oxidation is suppressed. The metal layer is pretreated at a first temperature so that an upper surface of the... | 01/27/2004 |
| 6667196 | Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method High quality epitaxial layers of monocrystalline oxide materials (24) are grown overlying monocrystalline substrates such as large silicon wafers (22) using RHEED information to monitor the growth rate of the growing film. The monocrystalline oxide layer ... | 12/23/2003 |
| 6656823 | Semiconductor device with schottky contact and method for forming the same Method for forming a Schottky contact in a semiconductor device includes a step of preparing an n type GaN group compound semiconductor layer, such as Alx Ga1-x N and Inx Ga1-x N. At least one metal layer includ... | 12/02/2003 |
| 6576481 | Method of manufacturing semiconductor devices When films of Ru(C2 H5 C5 H4)2 are formed on a substrate by means of a thermal CVD method, the films are also deposited on members around the substrate, resulting in the formation of particles on the ... | 06/10/2003 |
| 6576524 | Method of making a prismatic capacitor A method of making a flat capacitor includes forming at least one recess on an inside surface of a metal foil blank, leaving a surrounding peripheral flange. A coating performing as an electrode of the capacitor is applied to the inside surface of the met... | 06/10/2003 |
| 6448162 | Method for producing schottky diodes A method for producing a Schottky diode formed of a doped guard ring in an edge area of the Schottky contact is described. The guard ring is produced by depositing a high barrier material, especially made of platinum, on the surface of the semiconductor l... | 09/10/2002 |
| 6388272 | W/WC/TAC ohmic and rectifying contacts on SiC Ohmic and rectifying contacts to a TaC layer on an n-type or p-type area of an SiC substrate are formed by depositing a WC layer over the TaC layer, followed by a metallic W layer. Such contacts are stable to at least 1150° C. Electrodes connect to the c... | 05/14/2002 |
| 6271131 | Methods for forming rhodium-containing layers such as platinum-rhodium barrier layers A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula Ly RhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and elec... | 08/07/2001 |
| 6268230 | Semiconductor light emitting device By providing an area where an Au film 28b is removed and a Ti film 28a is exposed along the plane tangent to the side where the p-n junction of a semiconductor chip is exposed, sticking of the Au film 28b to the chip side or protruding of the film as a fl... | 07/31/2001 |
| 6229193 | Multiple stage high power diode A Schottky rectifier has multiple stages with substantially identical or very similar structures. Each stage includes a nitride-based semiconductor layer, a Schottky contact formed on one surface of the semiconductor layer, and an ohmic contact formed on ... | 05/08/2001 |
| 6184564 | Schottky diode with adjusted barrier height and process for its manufacture A schottky diode is formed of a sintered barrier metal layer which contacts a lightly doped silicon surface. The barrier metal layer is formed of palladium as well as a small quantity of another metal whose choice is determined by the desired value of the... | 02/06/2001 |
| 6150246 | Method of making Os and W/WC/TiC ohmic and rectifying contacts on SiC Metallic osmium on SiC (either ଲ or ) forms a contact that remains firmly attached to the SiC surface and forms an effective barrier against diffusion from the conductive metal. On n-type SiC, Os forms an abrupt Schottky rectifying junction h... | 11/21/2000 |
| 6087702 | Rare-earth schottky diode structure A method for forming a Schottky diode structure is disclosed. The method includes the steps of: a) Providing a substrate; b) forming a rare-earth containing layer over the substrate; and c) forming a metal layer over the rare-earth containing layer. The S... | 07/11/2000 |
| 6033929 | Method for making II-VI group compound semiconductor device A II-VI group compound semiconductor device includes a semiconductor substrate, a ZnX Mg1-X SY Se1-Y (0ࣘXࣘ1, 0ࣘYࣘ1) semiconductor layer formed on the semiconductor substrate, and an electrode layer forme... | 03/07/2000 |
| 5908307 | Fabrication method for reduced-dimension FET devices Pre-amorphization of a surface layer of crystalline silicon to an ultra-shallow (e.g., less than 100 nm) depth provides a solution to fabrication problems including (1) high thermal conduction in crystalline silicon and (2) shadowing and diffraction-inter... | 06/01/1999 |
| 5888891 | Process for manufacturing a schottky diode with enhanced barrier height and high thermal stability A schottky diode is formed of a sintered palladium platinum silicide in contact with a lightly doped silicon surface in which the platinum and palladium are present in a ratio of about one part to about 10 parts respectively, by weight.... | 03/30/1999 |
| 5610098 | N-INP Schottky diode structure and a method of making the same A new Schottky diode structure, Pt/Al/n-InP, is disclosed in the present invention. The thickness of Al layer of the Schottky diode structure is restricted in a range of about 80-120 Å. This structure gives a barrier height of 0.74 eV and an ideality fac... | 03/11/1997 |
| 5517054 | N-InP Schottky diode structure and a method of making the same A new Schottky diode structure, Pt/Al/n-InP, is disclosed in the present invention. The thickness of Al layer of the Schottky diode structure is restricted in a range of about 80-120 Å. This structure gives a barrier height of 0.74 eV and an ideality fac... | 05/14/1996 |
| 5459087 | Method of fabricating a multi-layer gate electrode with annealing step The invention provides a method of forming a gate electrode on a channel layer in a field effect transistor. A first layer made of a first metal having a heat resistivity is formed on a gate formation region of a surface of a channel layer on a semiconduc... | 10/17/1995 |
| 5432126 | Fabrication process of compound semiconductor device comprising L-shaped gate electrode After forming a silicon oxide layer and an amorphous silicon layer on a GaAs substrate in stacking manner, a gate electrode forming opening portion is formed by RIE etching. Then, by selectively removing only the amorphous silicon layer at the portion con... | 07/11/1995 |
| 5270228 | Method of fabricating gate electrode in recess A method of fabricating a field effect transistor in which the gate electrode is formed in a multiple step recess including a first recess located on one level and a second recess located on a lower level. The second, narrower recess is nested in the firs... | 12/14/1993 |
| 4923827 | T-type undercut electrical contact process on a semiconductor substrate On a semiconductor substrate (38) T-type undercut electrical contact structure (12, 36) and methodology provides a diffusion barrier (26, 40) preventing migration therethrough from a gold layer (30, 48) along the sides of an undercut schottky metal lower ... | 05/08/1990 |
| 4650543 | Method of forming electrode pattern of semiconductor device A method of forming an electrode pattern on a surface of a semiconductor substrate which comprises the steps of forming a metal film which is vulnerable to a reactive ion etching on a surface of the semiconductor substrate, forming on the metal film anoth... | 03/17/1987 |
| 4429452 | Method of manufacturing field-effect transistors with self-aligned grid and transistors thus obtained The invention relates to a method of manufacturing field-effect transistors having a self-aligned grid in the submicron range without using a mask of submicron size. The invention is remarkable in that it consists of undercutting the drain electrode at an... | 02/07/1984 |
| 4312112 | Method of making field-effect transistors with micron and submicron gate lengths Field-effect transistors using Schottky junctions formed of tantalum on N-doped gallium arsenide with tantalum oxide and native oxide passivations.... | 01/26/1982 |
| 4282043 | Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other The interdiffusion at the interface between a metallic-type conductor or semiconductor and a second metallic-type conductor or semiconductor in intimate contact therewith due to elevated temperatures is reduced by subjecting a surface of at least one of t... | 08/04/1981 |
| 4179533 | Multi-refractory films for gallium arsenide devices A method for constructing systems of refractory layers for use in making gallium arsenide (GaAs) semiconductor devices, having gold as the conducting electrode, which devices are thermally stable when thermally stressed up to about 600° C. for approximat... | 12/18/1979 |
| 4157268 | Localized oxidation enhancement for an integrated injection logic circuit A device and method are disclosed for incorporating on a single semiconductor chip, integrated injection logic (I2 L) circuits operating at low signal voltages and off chip driver devices operating at relatively high signal voltages. The vertic... | 06/05/1979 |
