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| Number | Title | Issue Date |
| 7816240 | Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s) A metal source/drain field effect transistor is fabricated such that the source/drain regions are deposited, multilayer structures, with at least a second metal deposited on exposed surfaces of a first metal. ... | 10/19/2010 |
| 7256085 | Semiconductor memory device and manufacturing method thereof A manufacturing method of a semiconductor memory device comprising the steps of: forming plural trenches in stripes in a semiconductor substrate and filling each of the trenches with an element isolation insulating film to form element isolation regions; sequentiall... | 08/14/2007 |
| 7229903 | Recessed semiconductor device A semiconductor structure includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, a third semiconductor layer over the second semiconductor layer, and a fourth semiconductor layer over the third semiconductor layer. A f... | 06/12/2007 |
| 7211486 | Method of manufacturing a semiconductor device When memory cells of EEPROM and a capacitor element are formed on a same semiconductor substrate, the number of processes is prevented from increasing and a manufacturing cost is reduced. Furthermore, reliability of the capacitor element is improved, and characteris... | 05/01/2007 |
| 7208795 | Low-cost, low-voltage single-layer polycrystalline EEPROM memory cell integration into BiCMOS technology An EEPROM memory transistor having a floating gate. The floating gate is formed using a BiCMOS process and has a first sinker dopant region proximate to a tunnel diode window, and a second sinker dopant region proximate to a coupling capacitor region. An optional th... | 04/24/2007 |
| 7141861 | Semiconductor device and manufacturing method there A problem in related art according to which an increase in leak current cannot be avoided in order to obtain a low forward voltage VF as forward voltage VF and reverse leak current IR characteristics of a Schottky barrier diode are in a trade-off relationship is her... | 11/28/2006 |
| 7078342 | Method of forming a gate stack A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature during formation. The temperature reduction prevents the formation of sil... | 07/18/2006 |
| 7059267 | Use of pulsed grounding source in a plasma reactor A method for grounding a semiconductor substrate pedestal during a portion of a high voltage power bias oscillation cycle to reduce or eliminate the detrimental effects of feature charging during the operation of a plasma reactor. ... | 06/13/2006 |
| 7041548 | Methods of forming a gate stack that is void of silicon clusters within a metallic silicide film thereof A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature during formation. The temperature reduction prevents the formation of sil... | 05/09/2006 |
| 7033856 | Spacer chalcogenide memory method The present invention includes devices and methods to form memory cell devices including a spacer comprising a programmable resistive material alloy. Particular aspects of the present invention are described in the claims, specification and drawings. ... | 04/25/2006 |
| 7026650 | Multiple floating guard ring edge termination for silicon carbide devices Edge termination for silicon carbide devices has a plurality of concentric floating guard rings in a silicon carbide layer that are adjacent and spaced apart from a silicon carbide-based semiconductor junction. An insulating layer, such as an oxide, is provided on t... | 04/11/2006 |
| 6995467 | Semiconductor component A semiconductor component contains two semiconductor bodies, which are spatially separated from one another and electrically interconnected. A compensation MOS field effect transistor is provided as the first semiconductor body, and a silicon carbide Schottky diode ... | 02/07/2006 |
| 6955959 | Method of making a memory structure having a multilayered contact and a storage capacitor with a composite dielectric layer of crystalized niobium pentoxide and tantalum pentoxide films The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxid... | 10/18/2005 |
| 6946401 | Plasma treatment for copper oxide reduction The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion charac... | 09/20/2005 |
| 6921726 | Growing smooth semiconductor layers A method includes epitaxially growing a semiconductor layer with a free surface and performing an anneal that reduces atomic roughness on the free surface. The free surface has an orientation with respect to lattice axes of the layer for which atoms in flat regions ... | 07/26/2005 |
| 6893962 | Low via resistance system A method of forming a metallization interconnection system within a via. A first liner layer of titanium is deposited to a first thickness in the following manner. A substrate containing the via is placed within an ion metal plasma deposition chamber that contains a... | 05/17/2005 |
| 6872644 | Semiconductor device with non-compounded contacts, and method of making A semiconductor device includes source and drain contact regions which include a non-compounded combination of a semiconductor material and at least one metal. The metal may include an elemental metal, such as gold or aluminum, or may include an intermetallic. The c... | 03/29/2005 |
| 6858522 | Electrical contact for compound semiconductor device and method for forming same A method of manufacturing a semiconductor device having an improved ohmic contact system to epitaxially grown, low bandgap compound semiconductors. In an exemplary embodiment, the improved ohmic contact system comprises a thin reactive layer of nickel deposited on a... | 02/22/2005 |
| 6852579 | Method of manufacturing a semiconductor integrated circuit device Oxidation on the surface of a film of refractory metal constituting a gate electrode (word line WL) is suppressed by forming an insulation film constituting a cap insulation film of the gate electrode (word line WL) at a temperature of 500° C. or lower. Further, ox... | 02/08/2005 |
| 6825105 | Manufacture of semiconductor devices with Schottky barriers In the manufacture of trench-gate power MOSFETs, trenched Schottky rectifiers and other devices including a Schottky barrier, a guard region (15s), trenched insulated electrode (11s) and the Schottky barrier (80) are self-aligned w... | 11/30/2004 |
| 6762083 | Method for manufacturing heterojunction field effect transistor device A method for manufacturing a hetero-junction field effect transistor (HFET) device, which includes sequentially forming a non-doped GaN semiconductor layer and an AlGaN semiconductor layer on a substrate, separating devices from each other by etching the substrate, ... | 07/13/2004 |
| 6734086 | Semiconductor integrated circuit device and method of manufacturing the same A WN film serving as an adhesive layer is deposited over the sidewalls and bottom surface of a hole in a silicon oxide film where an information storage capacitor is to be formed. A Ru film to serve as a lower electrode for the information storage capacitor is forme... | 05/11/2004 |
| 6673700 | Reduced area intersection between electrode and programming element A method comprising forming a sacrificial layer over less than the entire portion of a contact area on a substrate, the sacrificial layer having a thickness defining an edge over the contact area, forming a spacer layer over the spacer, the spacer layer c... | 01/06/2004 |
| 6610999 | Multiple stage high power diode A Schottky rectifier has multiple stages with substantially identical or very similar structures. Each stage includes a nitride-based semiconductor layer, a Schottky contact formed on one surface of the semiconductor layer, and an ohmic contact formed on ... | 08/26/2003 |
| 6573128 | Epitaxial edge termination for silicon carbide Schottky devices and methods of fabricating silicon carbide devices incorporating same Edge termination for a silicon carbide Schottky rectifier is provided by including a silicon carbide epitaxial region on a voltage blocking layer of the Schottky rectifier and adjacent a Schottky contact of the silicon carbide Schottky rectifier. The sili... | 06/03/2003 |
| 6551911 | Method for producing Schottky diodes and Schottky diodes A method for producing Schottky diodes having a protective ring in an edge region of a Schottky contact. The protective ring is produced by a protective ring material that is deposited onto a surface of a semiconductor layer, which surface is provided wit... | 04/22/2003 |
| 6483164 | Schottky barrier diode A Schottky electrode is formed of an alloy, which is composed of two or more kinds of metal materials in combinations that provide different Schottky barrier heights with respect to a semiconductor and that form no intermetallic compound.... | 11/19/2002 |
| 6479843 | Single supply HFET with temperature compensation A method of fabricating apparatus, and the apparatus, for providing low voltage temperature compensation in a single power supply HFET including a stack of epitaxially grown compound semiconductor layers with an HFET formed in the stack. A Schottky diode ... | 11/12/2002 |
| 6455403 | Shallow trench contact structure to solve the problem of schottky diode leakage A method for fabricating a Schottky diode using a shallow trench contact to reduce leakage current in the fabrication of an integrated circuit device is described. The method provides a simple and effective method for decreasing the possibility of forming... | 09/24/2002 |
| 6448162 | Method for producing schottky diodes A method for producing a Schottky diode formed of a doped guard ring in an edge area of the Schottky contact is described. The guard ring is produced by depositing a high barrier material, especially made of platinum, on the surface of the semiconductor l... | 09/10/2002 |
| 6420283 | methods for producing compound semiconductor substrates and light emitting elements Methods are provided for producing a compound semiconductor substrate including: a mica substrate; and a III-V group compound semiconductor layer containing nitrogen as its main component grown on the mica substrate.... | 07/16/2002 |
| 6372613 | Method of manufacturing a gate electrode with low resistance metal layer remote from a semiconductor In a semiconductor device, a gate electrode is formed by sequentially forming a Schottky metal film, a barrier metal film, and a low-resistance metal film from the lower side. The Schottky metal film or barrier metal film has a gap in a lower gate vertica... | 04/16/2002 |
| 6355571 | Method and apparatus for reducing copper oxidation and contamination in a semiconductor device A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein th... | 03/12/2002 |
| 6316342 | Low turn-on voltage indium phosphide Schottky device and method A Schottky diode, and a method of making the same, which is fabricated on InP material and employs a Schottky layer including Inx Al1-x AS with x>0.6, or else including a chirped graded superlattice in which successive periods of the... | 11/13/2001 |
| 6287946 | Fabrication of low resistance, non-alloyed, ohmic contacts to InP using non-stoichiometric InP layers A method of reducing the specific contact resistivity of a metal to semiconductor interface between a metal contact and an InP semiconductor compound. The method includes the step of increasing the amount of the group V element (P) in the semiconductor co... | 09/11/2001 |
| 6274489 | Manufacturing method of semiconductor apparatus A first convex portion and a second convex portion are formed on a semiconductor substrate at a prescribed interval, an impurity diffusing region is formed on an upper portion of the semiconductor substrate placed between the first and second convex porti... | 08/14/2001 |
| 6268230 | Semiconductor light emitting device By providing an area where an Au film 28b is removed and a Ti film 28a is exposed along the plane tangent to the side where the p-n junction of a semiconductor chip is exposed, sticking of the Au film 28b to the chip side or protruding of the film as a fl... | 07/31/2001 |
| 6229193 | Multiple stage high power diode A Schottky rectifier has multiple stages with substantially identical or very similar structures. Each stage includes a nitride-based semiconductor layer, a Schottky contact formed on one surface of the semiconductor layer, and an ohmic contact formed on ... | 05/08/2001 |
| 6225200 | Rare-earth element-doped III-V compound semiconductor schottky diodes and device formed thereby A semiconductor device has an improved schottky barrier junction. The device includes: a substrate; an epitaxial layer covering the substrate and lightly doped with a dopant selected from a group consisting of a rare earth element and an oxidant of a rare... | 05/01/2001 |
| 6200885 | III-V semiconductor structure and its producing method A III-V semiconductor structure and it producing method is provided. The method for forming a III-V semiconductor structure having a Schottky barrier layer includes the steps of (a) providing a III-V substrate, (b) treating the first barrier layer with a ... | 03/13/2001 |
