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| Number | Title | Issue Date |
| 8030193 | Method of fabricating semiconductor device To fabricate a Schottky barrier diode in which a decrease in on current due to parasitic resistance is suppressed, variations in on current are suppressed, and an increase in off current is suppressed. The fabricating method includes the steps of forming an island-s... | 10/04/2011 |
| 7994033 | Semiconductor apparatus and manufacturing method thereof The present invention provides a semiconductor apparatus for improving a switching speed and a withstand voltage, and a manufacturing method of the semiconductor apparatus. The semiconductor apparatus of the invention including a first conductive type semiconductor ... | 08/09/2011 |
| 7935620 | Method for forming semiconductor devices with low leakage Schottky contacts Methods and apparatus are described for semiconductor devices. A method comprises providing a partially completed semiconductor device including a substrate, a semiconductor on the substrate, and a passivation layer on the semiconductor, and using a first mask, loca... | 05/03/2011 |
| 7906417 | Compound semiconductor device with T-shaped gate electrode and its manufacture A method for manufacturing a compound semiconductor device forms an EB resist layer on first SiN film, performs EB exposure at high dose for recess forming opening and at low dose for eaves removing opening, develops the high dose EB resist pattern to etch the first... | 03/15/2011 |
| 7902055 | Method of manufacturing a dual metal Schottky diode An embodiment of the invention is a Schottky diode 22 having a semiconductor substrate 3, a first metal 24, a barrier layer 26, and second metal 28. Another embodiment of the invention is a method of manufacturing a Schottky diode ... | 03/08/2011 |
| 7895554 | Verification method with the implementation of well voltage pseudo diodes A method of verifying consistency between a circuit schematic and a corresponding integrated circuit layout is disclosed. The method includes identifying a voltage condition associated with a portion of the circuit schematic, and assigning a pseudo diode to the port... | 02/22/2011 |
| 7858505 | Method of forming a transistor having multiple types of Schottky junctions A gate electrode is formed overlying a substrate. A first angled metal implant is performed at a first angle into the substrate followed by performing a second angled metal implant at a second angle. The first angled metal implant and the second angled metal implant... | 12/28/2010 |
| 7745316 | Method for fabricating Schottky barrier tunnel transistor Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky b... | 06/29/2010 |
| 7645691 | Method for forming zener zap diodes and ohmic contacts in the same integrated circuit A method for forming an ohmic contact and a zener zap diode in an integrated circuit includes forming a first contact opening in the insulating layer over a first diffusion region to expose the semiconductor substrate; forming a barrier metal layer on the insulating... | 01/12/2010 |
| 7638415 | Method for reducing dislocation threading using a suppression implant The present invention provides a method for manufacturing a semiconductor device. In one embodiment, the method for manufacturing the semiconductor device includes a method for manufacturing a zener diode, including among others, forming a doped well (240) wi... | 12/29/2009 |
| 7605065 | Schottky barrier tunnel single electron transistor and method of manufacturing the same Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of... | 10/20/2009 |
| 7560368 | Insulated gate planar integrated power device with co-integrated Schottky diode and process A process for integrating a Schottky contact inside the apertures of the elementary cells that constitute the integrated structure of the insulated gate power device in a totally self-alignment manner does not requires a dedicated masking step. This overcomes the li... | 07/14/2009 |
| 7544593 | Semiconductor device having a gate insulating film structure including an insulating film containing metal, silicon and oxygen and manufacturing method thereof Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a lami... | 06/09/2009 |
| 7510953 | Integrated fet and schottky device A semiconductor device including a schottky device and a trench type semiconductor switching device such as a MOSFET formed in a common die. ... | 03/31/2009 |
| 7507650 | Process for producing Schottky junction type semiconductor device A process for producing a Schottky junction type semiconductor device includes the steps of forming a Schottky electrode on a surface of a silicon carbide epitaxial layer, wherein a Schottky electrode made of molybdenum, tungsten, or an alloy thereof is formed on th... | 03/24/2009 |
| 7488673 | Trench MOS Schottky barrier rectifier with high k gate dielectric and reduced mask process for the manufacture thereof A trench MOS Schottky barrier device has a metal oxide gate dielectric such as TiSi lining the trench wall to increase the efficiency of the elemental cell and to improve depletion in the mesa during reverse bias. A reduced mask process is used in which a single lay... | 02/10/2009 |
| 7479444 | Method for forming Schottky diodes and ohmic contacts in the same integrated circuit A method for forming an ohmic contact and a Schottky diode in an integrated circuit includes providing a semiconductor substrate; forming first and second diffusion regions in the semiconductor substrate; forming an insulating layer on the semiconductor substrate; f... | 01/20/2009 |
| 7468314 | Schottky diode structure to reduce capacitance and switching losses and method of making same A SiC Schottky barrier diode (SBD) is provided having a substrate and two or more epitaxial layers, including at least a thin, lightly doped N-type top epitaxial layer, and an N-type epitaxial layer on which the topmost epitaxial layer is disposed. Multiple epitaxia... | 12/23/2008 |
| 7429523 | Method of forming schottky diode with charge balance structure a Schottky diode having a semiconductor region is formed as follows. A plurality of charge control electrodes are formed in the semiconductor region so as to influence an electric field in the semiconductor region, wherein at least two of the charge control electrod... | 09/30/2008 |
| 7416929 | Monolithic vertical junction field effect transistor and schottky barrier diode fabricated from silicon carbide and method for fabricating the same A switching element combining a self-aligned, vertical junction field effect transistor with etched-implanted gate and an integrated antiparallel Schottky barrier diode is described. The anode of the diode is connected to the source of the transistor at the device l... | 08/26/2008 |
| 7411226 | High electron mobility transistor (HEMT) structure with refractory gate metal An InP high electron mobility transistor (HEMT) structure in which a gate metal stack includes an additional thin layer of a refractory metal, such as molybdenum (Mo) or platinum (Pt) at a junction between the gate metal stack and a Schottky barrier layer in the HEM... | 08/12/2008 |
| 7405458 | Asymmetric field transistors (FETs) A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical ... | 07/29/2008 |
| 7384800 | Method of fabricating metal-insulator-metal (MIM) device with stable data retention In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of α-Ta is provided. The Ta of the first electrode is oxidized to form a Ta2O5 layer on the first electrode. A second electrode of β-Ta is provided on the Ta... | 06/10/2008 |
| 7368371 | Silicon carbide Schottky diode and method of making the same A method of forming silicon carbide Schottky diode is disclosed. The processes required two photo-masks only. The processes are as follows: firstly, an n+-silicon carbide substrate having an n− silicon carbide drift layer is provided. Then a silicon layer is forme... | 05/06/2008 |
| 7364978 | Method of fabricating semiconductor device There is provided a method of fabricating semiconductor devices that allows ion implantation to be performed at high temperature with ions accelerated with high energy to help to introduce dopant in a semiconductor substrate, in particular a SiC semiconductor substr... | 04/29/2008 |
| 7361549 | Method for fabricating memory cells for a memory device The invention provides a method for fabricating a memory device having memory cells which are formed on a microstructured driving unit (100), in which method a shaping layer (104) is provided and is patterned in such a manner that vertical trench struc... | 04/22/2008 |
| 7355813 | Method of fabricating a narrow projection such as a write pole extending from a substrate An article is formed as a substrate having a projection extending outwardly therefrom. The article may be a magnetic recording head and the projection a write pole. The projection has a width in a thinnest dimension measured parallel to a substrate surface of no mor... | 04/08/2008 |
| 7348255 | Semiconductor device and method for fabricating a semiconductor device A semiconductor structure has an active region on a substrate, and recessed portions are formed at lower edges of lateral portions of the semiconductor structure. Patterned first insulation layers for device isolation are buried into the recessed portions. Second in... | 03/25/2008 |
| 7341932 | Schottky barrier diode and method thereof Pt/n−GaN Schottky barrier diodes are disclosed that are particularly suited to serve as ultra-violet sensors operating at wavelengths below 200 nm. The Pt/n−GaN Schottky barrier diodes have very large active areas, up to 1 cm2, w... | 03/11/2008 |
| 7341951 | Methods of forming semiconductor constructions The invention includes methods of forming semiconductor constructions in which a single etch is utilized to penetrate through a titanium-containing layer and partially into a silicon-containing layer beneath the titanium-containing layer. The etch can utilize CH | 03/11/2008 |
| 7323376 | Method for fabricating a semiconductor device including a group III nitride semiconductor A semiconductor device has a Group III nitride semiconductor layer and a gate electrode formed on the Group III nitride semiconductor layer. The gate electrode contains an adhesion enhancing element. A thermally oxidized insulating film is interposed between the Gro... | 01/29/2008 |
| 7307329 | Electronic device with guard ring An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer... | 12/11/2007 |
| 7304363 | Interacting current spreader and junction extender to increase the voltage blocked in the off state of a high power semiconductor device A technique of spreading current flowing in a semiconductor device comprising an electrode, a drift region adjacent to the electrode, a junction termination extension implant region in the drift region, and a current spreader adjacent to the junction termination ext... | 12/04/2007 |
| 7303809 | Process for forming electrodes Substantially transparent electrodes are formed upon a substrate by forming on the substrate, in order, a high index layer, a metallic conductive layer, and a conductive or semi-conductive top layer; and patterning the top layer and the conductive layer, preferably ... | 12/04/2007 |
| 7291899 | Power semiconductor component A semiconductor component suitable for use as a power semiconductor component and method of making a semiconductor component is disclosed. In one embodiment, the semiconductor component includes a semiconductor body having a first surface, a second surface, a third ... | 11/06/2007 |
| 7291524 | Schottky-barrier mosfet manufacturing method using isotropic etch process A method of fabricating a transistor device for regulating the flow of electric current is provided wherein the device has Schottky-barrier metal source-drain contacts. The method, in one embodiment, utilizes an isotropic etch process prior to the formation of the m... | 11/06/2007 |
| 7282778 | Chemical sensor using chemically induced electron-hole production at a Schottky barrier Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential f... | 10/16/2007 |
| 7282429 | Method of manufacturing Schottky diode device Embodiments of the invention provide a method of manufacturing a Schottky diode device. In one embodiment, the method includes: (a) providing a substrate; (b) sequentially forming a gate oxide layer and a polysilicon layer on the substrate; (c) partially oxidizing t... | 10/16/2007 |
| 7279379 | Methods of forming memory arrays; and methods of forming contacts to bitlines The invention includes memory arrays, and methods which can be utilized for forming memory arrays. A patterned etch stop can be used during memory array fabrication, with the etch stop covering storage node contact locations while leaving openings to bitline contact... | 10/09/2007 |
| 7276796 | Formation of oxidation-resistant seed layer for interconnect applications An interconnect structure of the single or dual damascene type and a method of forming the same, which substantially reduces the surface oxidation problem of plating a conductive material onto a noble metal seed layer are provided. In accordance with the present inv... | 10/02/2007 |
