Celebrity Inventors
Actor Zeppo Marx patented a "Cardiac Pulse Rate Monitor" in 1969.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8076228 | Low noise transistor and method of making same A low noise transistor and a method of making a low noise transistor. A noise-reducing agent is introduced into the gate electrode and then moved into the gate dielectric of a transistor. ... | 12/13/2011 |
| 7811916 | Method for isotropic doping of a non-planar surface exposed in a void A method is described for isotropic or nearly isotropic shallow doping of a non-planar surface exposed in a void. The results of ion implantation, a common doping method, are inherently planar. Some fabrication methods and devices may require doping a surface of a n... | 10/12/2010 |
| 7329595 | Deposition of carbon-containing layers using vitreous carbon source An effusion source comprises a vitreous C filament and a heater to increase the temperature of the filament to produce a C vapor. Also described is a deposition method comprising (a) depositing a layer of material on a substrate, and (b) during step (a), heating a b... | 02/12/2008 |
| 7279047 | Reactor for extended duration growth of gallium containing single crystals An apparatus for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If de... | 10/09/2007 |
| 7255899 | Heat treatment apparatus and heat treatment method of substrate A heat diffusion plate and a heating plate are placed in a heat treatment chamber in this order. The heating plate is used for preliminarily heating a glass substrate to a temperature in a range from 200° C. to 400° C. The glass substrate thus preliminarily heated... | 08/14/2007 |
| 7253467 | Non-volatile semiconductor memory devices A non-volatile memory device includes a semiconductor substrate, a tunneling insulating layer, a charge storage layer, a blocking insulating layer, and a gate electrode. The tunneling insulating layer is on the substrate and has a first dielectric constant. The char... | 08/07/2007 |
| 7235499 | Semiconductor processing methods In one aspect, the invention encompasses a semiconductor processing method. A layer of material is formed over a semiconductive wafer substrate. Some portions of the layer are exposed to energy while other portions are not exposed. The exposure to energy alters phys... | 06/26/2007 |
| 7205216 | Modification of electrical properties for semiconductor wafers A method and structure for fabricating semiconductor wafers. The method comprises providing a plurality of semiconductor wafers. The plurality of semiconductor wafers comprises a first semiconductor wafer and a second semiconductor wafer. The first semiconductor waf... | 04/17/2007 |
| 7144751 | Back-contact solar cells and methods for fabrication Methods for fabrication of emitter wrap through (EWT) back-contact solar cells and cells made by such methods. Certain methods provide for higher concentration of dopant in conductive vias compared to the average dopant concentration on front or rear surfaces, and p... | 12/05/2006 |
| 7138291 | Methods of treating a silicon carbide substrate for improved epitaxial deposition and resulting structures and devices A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first condu... | 11/21/2006 |
| 7018728 | Boron phosphide-based semiconductor device and production method thereof A boron phosphide-based semiconductor device includes a single crystal substrate having formed thereon a boron-phosphide (BP)-based semiconductor layer containing boron and phosphorus as constituent elements, where phosphorus (P) occupying the vacant lattice point (... | 03/28/2006 |
| 6995079 | Ion implantation method and method for manufacturing semiconductor device An object of the present invention is to provide an ion implantation method for shortening a down time of an ion implantation apparatus after exposure of a chamber and for improving throughput and a method for manufacturing a semiconductor device. Specifically, the ... | 02/07/2006 |
| 6955719 | Manufacturing methods for semiconductor devices with multiple III-V material layers A method for fabricating semiconductor devices with thin (e.g., submicron) and/or thick (e.g., between 1 micron and 100 microns thick) Group III nitride layers during a single epitaxial run is provided, the layers exhibiting sharp layer-to-layer interfaces. Accordin... | 10/18/2005 |
| 6953741 | Methods of fabricating contacts for semiconductor devices utilizing a pre-flow process Methods for fabricating a contact of a semiconductor device are provided by patterning an interlayer dielectric of the semiconductor device to form a contact hole that exposes a silicon-based region of a first impurity type. The exposed silicon-based region is doped... | 10/11/2005 |
| 6943097 | Atomic layer deposition of metallic contacts, gates and diffusion barriers The present invention provides metallic films containing a Group IVB or VB metal, silicon and optionally nitrogen by utilizing atomic layer deposition (ALD). In particularly, the present invention provides a low temperature thermal ALD method of forming metallic sil... | 09/13/2005 |
| 6936357 | Bulk GaN and ALGaN single crystals Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bu... | 08/30/2005 |
| 6930330 | Silicon optoelectronic device and light emitting apparatus using the same A silicon optoelectronic device and a light-emitting apparatus using the silicon optoelectronic device are provided. The silicon optoelectronic device includes: a substrate based on an n-type or p-type silicon; a doped region formed on one surface of the substrate a... | 08/16/2005 |
| 6921708 | Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean Contact areas comprising doped semiconductor material at the bottom of contact holes are cleaned in a hot hydrogen plasma and exposed in situ during and/or separately from the hot hydrogen clean to a plasma containing the same dopant species as in the semiconductor ... | 07/26/2005 |
| 6844259 | Method for forming contact plug in semiconductor device The present invention provides a method for forming a contact plug in a semiconductor device capable of preventing an increase of contact resistance even if the contact size becomes smaller and degradation of a step coverage property and of suppressing a decrease of... | 01/18/2005 |
| 6825104 | Semiconductor device with selectively diffused regions The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first majo... | 11/30/2004 |
| 6821871 | Method for manufacturing semiconductor device, substrate treatment method, and semiconductor manufacturing apparatus It is an object of the present invention to make it easy to diffuse phosphorus into a silicon film and allow the phosphorus diffusion concentration to be easily controlled by varying the timing at which the dopant gas is allowed to flow. A silicon wafer 10 on... | 11/23/2004 |
| 6770500 | Process of passivating a metal-gated complementary metal oxide semiconductor A process of passivating a metal-gated CMOS structure in which a metal-gated CMOS structure is passivated in an atmosphere of molecular hydrogen at a temperature of between about 250° C. and about 500° C. and a pressure of at least about 200 Torr. The present proc... | 08/03/2004 |
| 6632721 | Method of manufacturing semiconductor devices having capacitors with electrode including hemispherical grains In a method of manufacturing a semiconductor integrated circuit device in which a lower electrode of a capacitor is composed of a polycrystalline silicon film having a surface area increased by surface roughening, an impurity is introduced into the polycr... | 10/14/2003 |
| 6555452 | Method for growing p-type III-V compound material utilizing HVPE techniques A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By g... | 04/29/2003 |
| 6555451 | Method for making shallow diffusion junctions in semiconductors using elemental doping A method is provided for making ultra-shallow diffused junctions using an elemental dopant. A semiconductor wafer is cleaned for providing a clean reaction surface. The cleaned wafer in loaded onto a stage located in a doping system. A quantity of element... | 04/29/2003 |
| 6509263 | Method for fabricating a semiconductor memory device having polysilicon with an enhanced surface concentration and reduced contact resistance A method for fabricating a semiconductor device to reduce the contact resistance by enhancing the surface concentration of doped polysilicon in a semiconductor substrate divided into active and field regions, comprises the steps of forming a plurality of ... | 01/21/2003 |
| 6461947 | Photovoltaic device and making of the same To form an impurity diffusion layer on only one side of a semiconductor substrate at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is perfomed on them, or at least ... | 10/08/2002 |
| 6417099 | Method for controlling dopant diffusion in a plug-shaped doped polysilicon layer on a semiconductor wafer The present invention provides a method for controlling dopant density of a plug-shaped doped polysilicon layer formed within a plug-shaped recess to prevent the dopant contained in the plug-shaped doped polysilicon layer from diffusing into a conductive ... | 07/09/2002 |
| 6413844 | Safe arsenic gas phase doping A method is described for safe gas phase doping a semiconductor with arsenic. The substrate including a semiconductor structure is exposed to arsine at elevated temperatures within a reaction chamber. Thereafter, prior to opening the reaction chamber, a s... | 07/02/2002 |
| 6403455 | Methods of fabricating a memory device Various methods of fabricating circuit devices are provided. In one aspect, a method of fabricating a circuit device on a substrate is provided. The method includes forming a doped silicon structure on the substrate and forming a hemispherical grain silic... | 06/11/2002 |
| 6350648 | Formation of conductive rugged silicon The present invention provides methods of forming in situ doped rugged silicon and semiconductor devices incorporating conductive rugged silicon. In one aspect, the methods involve forming a layer of doped amorphous silicon on a substrate at a substantial... | 02/26/2002 |
| 6348397 | Method for diffusion of an impurity into a semiconductor wafer with high in-plane diffusion uniformity The present invention provides an apparatus for diffusing an impurity into a semiconductor wafer comprising: a diffusion furnace tube which has a longitudinal center axis extending along a vertical direction and the diffusion tube having at least a gas in... | 02/19/2002 |
| 6339015 | Method of fabricating a non-volatile semiconductor device A non-volatile random access memory (NVRAM) cell and methods of forming thereof are disclosed. The NVRAM cell includes a substrate having source and drain regions. A spike having a sharp tip extends in the source region. Instead of a single spike, two adj... | 01/15/2002 |
| 6331477 | Doping of spherical semiconductors during non-contact processing in the liquid state A method for doping crystals is disclosed. The method includes a receiver for receiving semiconductor spheres and a dopant. The semiconductor spheres are heated to a molten state. The dopant is absorbed by the semiconductor spheres. The semiconductor sphe... | 12/18/2001 |
| 6313004 | Method for manufacturing semiconductor devices After HSG-Si 15a is formed on the surface of a polycrystal silicon film 15, heat treatment is conducted on it using a phosphorus diffusion apparatus in an atmosphere of a mixture gas containing POCl3, O2, and N2 gases in s... | 11/06/2001 |
| 6303393 | Method of doping barium titanate ferroelectric oxide Optical waveguides exhibiting non-linear and/or electro-optic properties comprise a rare earth doped barium titanate thin film as an optical working medium. The thin film is metalorganic chemical vapor deposited on a substrate in a reactor to incorporate ... | 10/16/2001 |
| 6300228 | Multiple precipitation doping process A multiple precipitation doping process for doping a semiconductor substrate (30) starts with forming an amorphous region (32) in the substrate (30). Through multiple laser exposures, multiple dopant precipitation films (52, 53) are formed on correspondin... | 10/09/2001 |
| 6284632 | Method for manufacturing semiconductor device with stagnated process gas According to the present invention, a process of the present invention is performed with stagnated process gas in a chamber. The process comprises the steps of supplying process gas into a chamber, blocking process gas entry and exit from the chamber so a... | 09/04/2001 |
| 6225166 | Method of manufacturing electrostatic discharge protective circuit A method of manufacturing an electrostatic discharge protective circuit. A substrate having an inner circuit region and an electrostatic discharge protective circuit is provided. The inner circuit region comprises a first gate electrode, a source/drain re... | 05/01/2001 |
| 6221747 | Method of fabricating a conductive plug with a low junction resistance in an integrated circuit An integrated circuit (IC) fabrication method is provided for fabricating a conductive plug, such as a contact plug or a via plug, with a low junction resistance in an integrated circuit. This method is characterized by the inclusion of a preliminary dopi... | 04/24/2001 |
