Class 438/563 - Glassy source or doped oxide

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes wherein the solid dopant source material is composed
No. of patents: 185
Last issue date: 04/24/2012

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Number	Title	Issue Date
8163639	Photo diode and method for manufacturing the same A method of fabricating a photo diode includes sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a semiconductor substrate; forming ...	04/24/2012
8114761	Method for doping non-planar transistors Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a c...	02/14/2012
7256083	Nitride layer on a gate stack A method of making a semiconductor structure includes depositing a nitride layer, on a metallic layer, by PECVD. The metallic layer is on a gate layer containing silicon, and the gate layer is on a semiconductor substrate. ...	08/14/2007
7235468	FinFET device with reduced DIBL FinFET devices formed with a Silicon On Insulator (SOI) technology with reduced Drain Induced Barrier Lowering (DIBL) characteristics and methods for producing the same. The methods involve dopant implants into the insulator layer, thereby creating borophosphosilica...	06/26/2007
7189620	Semiconductor device including a channel stop structure and method of manufacturing the same It is an object to obtain a semiconductor device comprising a channel stop structure which is excellent in an effect of stabilizing a breakdown voltage and a method of manufacturing the semiconductor device. A silicon oxide film (2) is formed on an upper surf...	03/13/2007
7179753	Process for planarizing substrates of semiconductor technology In a process for planarization of semiconductor substrates in which a layer which has been applied to a semiconductor substrate which has a trench and/or contact holes is removed such that the layer remains solely in the area of the trenches or contact holes, instea...	02/20/2007
7144751	Back-contact solar cells and methods for fabrication Methods for fabrication of emitter wrap through (EWT) back-contact solar cells and cells made by such methods. Certain methods provide for higher concentration of dopant in conductive vias compared to the average dopant concentration on front or rear surfaces, and p...	12/05/2006
7132922	Direct application voltage variable material, components thereof and devices employing same A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before...	11/07/2006
7115476	Semiconductor manufacturing method and semiconductor device A method of manufacturing a semiconductor device includes forming a mask layer on a semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar, doping an impurity into the semiconductor substra...	10/03/2006
7105411	Methods of forming a transistor gate A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed ...	09/12/2006
7078315	Method for eliminating inverse narrow width effects in the fabrication of DRAM device The present invention provides a method for eliminating inverse narrow width effects in the fabrication of DRAM devices. A semiconductor substrate is provided having thereon a shallow trench. The shallow trench surrounds an active area. A non-doped silicate glass (N...	07/18/2006
7052997	Method to form etch and/or CMP stop layers In a DRAM fabrication process, a first oxide is provided over a transistor gate and over a substrate extending from under the gate. The deposition is non-conformal in that the oxide is thicker over the gate and over the substrate than it is on the side of the gate. ...	05/30/2006
7033873	Methods of controlling gate electrode doping, and systems for accomplishing same The present invention is generally directed to various methods of controlling gate electrode doping, and various systems for accomplishing same. In one illustrative embodiment, the method disclosed herein comprises performing at least one process operation to form a...	04/25/2006
7022576	Method of manufacturing a semiconductor device The present invention relates to a method of manufacturing a semiconductor device. According to the present invention, a sidewall layer containing impurities is formed on a part of gate electrode, thereby forming a low concentration source/drain electrode for a ligh...	04/04/2006
7014487	Connector capable of preventing abrasion A slider is incorporated in a connector. A guide is designed to guide movement of the slider along a predetermined plane. An elastic terminal or contact extends to the free tip end from the stationary end. An inclined surface is defined on the slider so as to receiv...	03/21/2006
6995061	Multi-bit stacked-type non-volatile memory and manufacture method thereof The present invention discloses a multi-bit stacked-type non-volatile memory having a spacer-shaped floating gate and a manufacturing method thereof. The manufacturing method includes forming a patterned dielectric layer containing arsenic on a semiconductor substra...	02/07/2006
6969425	Methods for reducing the curvature in boron-doped silicon micromachined structures Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on th...	11/29/2005
6936508	Metal gate MOS transistors and methods for making the same Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal boride is formed above a gate dielectric to create PMOS gate structures and metal nitride is formed over a gate dielectric to provide ...	08/30/2005
6924204	Split gate flash memory cell and manufacturing method thereof A method for fabricating a buried plate of a deep trench capacitor is described. A substrate having a deep trench therein is provided. A doped layer is formed on the surface of the deep trench and a material layer is formed on the doped layer. A passivation layer is...	08/02/2005
6924200	Methods using disposable and permanent films for diffusion and implantation doping Methods are provided that use disposable and permanent films to dope underlying layers through diffusion. Additionally, methods are provided that use disposable films during implantation doping and that provide a surface from which to dope underlying materials. Some...	08/02/2005
6911384	Gate structure with independently tailored vertical doping profile A gate structure for a semiconductor transistor is disclosed. In an exemplary embodiment, the gate structure includes a lower polysilicon region doped at a first dopant concentration and an upper polysilicon region doped at a second concentration, with the second co...	06/28/2005
6903025	Method of purging semiconductor manufacturing apparatus and method of manufacturing semiconductor device A method of purging a semiconductor manufacturing apparatus comprises a step of etching a CVD-deposited film deposited in a chamber constituting a semiconductor manufacturing apparatus which has performed a process of forming a CVD film using a CVD process over a se...	06/07/2005
6890825	Method for controlling dopant profiles and dopant activation by electron beam processing An improved dopant application system and method for the manufacture of microelectronic devices accurately places dopant on and within a dielectric or semiconductor surface. Diffusing and activating p-type and n-type dopants in dielectric or semiconductor substrates...	05/10/2005
6849529	Deep-trench capacitor with hemispherical grain silicon surface and method for making the same A method for manufacturing a trench capacitor that includes providing a semiconductor substrate, forming a deep trench in the substrate, forming a thin sacrificial layer on a surface of the trench, and forming a hemispherical silicon grain layer over the thin sacrif...	02/01/2005
6828214	Semiconductor member manufacturing method and semiconductor device manufacturing method This invention provides an SOI substrate manufacturing method using a transfer method (bonding and separation). A separation layer (12) is formed on a silicon substrate (11). A silicon layer (13), SiGe layer (14), silicon layer (15′	12/07/2004
6806173	Method for producing highly doped semiconductor components A method is proposed for producing semiconductor components, in which at least one doped region is introduced in a wafer, a solid glass layer provided with dopant being applied on at least one of the two sides of a semiconductor wafer, in another step, the wafer bei...	10/19/2004
6746907	Methods of forming field effect transistors and field effect transistor circuitry Methods of forming field effect transistors and resultant field effect transistor circuitry are described. In one embodiment, a semiconductive substrate includes a field effect transistor having a body. A first resistive element is received by the substrate and conn...	06/08/2004
6737342	Composite spacer scheme with low overlapped parasitic capacitance A method and composition for a composite spacer with low overlapped capacitance includes a low-k dielectric spacer layer. A first spacer is deposited on a partially formed semiconductor device having a gate oxide stack, followed by a low dielectric constant spacer l...	05/18/2004
6723587	Ultra small-sized SOI MOSFET and method of fabricating the same An ultra small-sized SOI MOSFET having a high integration density, low power consumption, but high performances, and a method of fabricating the same are provided. The method includes preparing a SOI substrate on which a monocrystalline silicon layer is formed, form...	04/20/2004
6696354	Method of forming salicide A method of forming a salicide. A metal layer is formed on a silicon-based substrate comprising a gate with a spacer on the side wall of the gate and a source/drain is provided. Next, a first thermal treatment is performed to make the portions of the meta...	02/24/2004
6649542	Multi-level type nonvolatile semiconductor memory device A method of writing data into a memory cell of a non-volatile semiconductor memory device includes setting a write voltage applied to portions of the memory cells depending upon a value of write data, and applying, to a gate electrode, a voltage by which ...	11/18/2003
6607966	Selective method to form roughened silicon A method of forming silicon storage nodes on silicon substrates, wherein the silicon storage nodes have a roughened surface, which does not result in deposition of silicon atoms over the entire surface of the silicon substrate and which does not require t...	08/19/2003
6593196	Methods of forming a transistor gate A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer ...	07/15/2003
6566212	Method of fabricating an integrated circuit with ultra-shallow source/drain extensions A method of fabricating an integrated circuit with ultra-shallow source/drain junctions utilizes a solid-phase impurity source. The solid-phase impurity source can be a doped silicon dioxide layer approximately 300 nm thick. The structure is thermally ann...	05/20/2003
6524880	Solar cell and method for fabricating the same A technique for fabricating a solar cell includes an n+ emitter region first being formed on a front surface of the cell, and then front and rear insulating layers being formed on both sides of the cell. P (Phosphorus)-source and B (Boron)-sour...	02/25/2003
6506653	Method using disposable and permanent films for diffusion and implant doping Methods are provided that use disposable and permanent films to dope underlying layers through diffusion. Additionally, methods are provided that use disposable films during implantation doping and that provide a surface from which to dope underlying mate...	01/14/2003
6498079	Method for selective source diffusion Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and t...	12/24/2002
6479352	Method of fabricating high voltage power MOSFET having low on-resistance Test structures for a high voltage MOSFET are provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. A plurality of trenches are located in the drift region of...	11/12/2002
6448105	Method for doping one side of a semiconductor body A method for doping one side of a semiconductor substrate, such as in a silicon wafer, wherein an oxide layer is deposited on both the side to be doped and the non-doped side of the semiconductor substrate. A doping layer, containing a doping agent, is de...	09/10/2002
6410410	Method of forming lightly doped regions in a semiconductor device A method is disclosed in which a lightly doped region in a semiconductor layer is obtained by diffusing dopant atoms of a first and second type into the underlying semiconductor layer. Preferably, the method is applied to the formation of lightly doped so...	06/25/2002

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Class 438/563 - Glassy source or doped oxide