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A self defense weapon formed as a memo pad and which is easily held by a person's fingers, therefore making it possible to provide protection from a mugger and also to quickly and easily write a record or a message without failure of missing or forgetting significant information under a stressful situation.
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| Number | Title | Issue Date |
| 7989329 | Removal of surface dopants from a substrate A method and apparatus for removing excess dopant from a doped substrate is provided. In one embodiment, a substrate is doped by surfaced deposition of dopant followed by formation of a capping layer and thermal diffusion drive-in. A reactive etchant mixture is prov... | 08/02/2011 |
| 7947585 | Method of manufacturing semiconductor device Provided is a method of manufacturing a semiconductor device in which properties of photoresist through a lithography process are changed to form a dummy structure, and the structure is applied to a process of forming a gate electrode. The method includes the steps ... | 05/24/2011 |
| 7732311 | Methods of manufacturing semiconductor devices In a method of manufacturing a semiconductor device, a conductive layer pattern may be formed on a substrate. An oxide layer may be formed on the substrate to cover the conductive layer pattern. A diffusion barrier layer may be formed by treating the oxide layer to ... | 06/08/2010 |
| 7709365 | CMOS well structure and method of forming the same A method for forming a CMOS well structure including forming a plurality of first conductivity type wells over a substrate, each of the plurality of first conductivity type wells formed in a respective opening in a first mask. A cap is formed over each of the first ... | 05/04/2010 |
| 7365010 | Semiconductor device having carbon-containing metal silicide layer and method of fabricating the same Methods of fabricating semiconductor devices having a carbon-containing metal silicide layer and semiconductor devices fabricated by the methods are provided. A representative method includes the steps of preparing a semiconductor substrate and forming a gate electr... | 04/29/2008 |
| 7312013 | Photoreactive composition This invention provides a photoreactive composition in which reaction of a hydrolyzable metal compound takes place by irradiation of light. A photoreactive composition, which comprises a hydrolyzable metal compound (A) comprising a metal atom and a hydrolyzab... | 12/25/2007 |
| 7282428 | Method for solid phase diffusion of zinc into an InP-based photodiode and an InP photodiode made with the method In order to form a p-region in an InP-based photodiode, zinc doping must be performed. Due to the current trend toward the implementation of larger-sized InP wafers, there is a need for a solid phase diffusion method in which a ZnO thin film is applied to an epitaxi... | 10/16/2007 |
| 7279756 | Semiconductor device with high-k gate dielectric and quasi-metal gate, and method of forming thereof A process and apparatus for a semiconductor device is provided. A device comprises a first transistor having a first charge carrier type. The first transistor comprises a high-k gate dielectric and a first doped electrode. The first charge carrier type comprises one... | 10/09/2007 |
| 7223653 | Process for forming a buried plate A method is provided for making a buried plate region in a semiconductor substrate. According to such method, a trench is formed in a semiconductor substrate, the trench having a trench sidewall, the sidewall including an upper portion, and a lower portion disposed ... | 05/29/2007 |
| 7141511 | Method and apparatus for fabricating a memory device with a dielectric etch stop layer The present technique relates to a method and apparatus to provide a dielectric etch stop layer that prevents shorts for a buried digit layer as an interconnect. In a memory device, such as DRAM or SRAM, various layers are deposited to form structures, such as PMOS ... | 11/28/2006 |
| 7109099 | End of range (EOR) secondary defect engineering using substitutional carbon doping A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer... | 09/19/2006 |
| 7109100 | Semiconductor device and method for manufacturing semiconductor device To provide a semiconductor device able to be made uniform in diffusion depth of the impurity in a diffusion layer by a single diffusion and to give the desired threshold voltage and improved in yield and a method of producing the same. The device has a channel layer... | 09/19/2006 |
| 7087981 | Metal semiconductor contact, semiconductor component, integrated circuit arrangement and method The present invention relates to a metal-semiconductor contact comprising a semiconductor layer and comprising a metallization applied to the semiconductor layer, a high dopant concentration being introduced into the semiconductor layer such that a non-reactive meta... | 08/08/2006 |
| 7056776 | Semiconductor devices having metal containing N-type and P-type gate electrodes and methods of forming the same A semiconductor device has at least two different gate electrodes. The two different gate electrodes include a first gate electrode on a first gate insulation layer. The first gate electrode includes a first metal-containing conductive pattern on the first gate insu... | 06/06/2006 |
| 7001057 | Lighting apparatus for guiding light onto a light polymerizable piece to effect hardening thereof A lighting apparatus for dental purposes having plurality of light sources supported on semi-conductor bases, which are mounted on a substrate is provided. The lighting apparatus includes a reflective over surface encircling the light sources which reflects visible ... | 02/21/2006 |
| 6930007 | Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance The present invention facilitates semiconductor device operation and fabrication by providing a cap-annealing process that improves channel electron mobility without substantially degrading PMOS transistor devices. The process uses an oxide/nitride composite-cap to ... | 08/16/2005 |
| 6911394 | Semiconductor devices and methods of manufacturing such semiconductor devices A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (202), forming a dielectric layer (204) over the semiconductor substrate (202), and etching a trench or a via (206) in the dielectr... | 06/28/2005 |
| 6893947 | Advanced RF enhancement-mode FETs with improved gate properties A method for fabricating an RF enhancement mode FET (30) having improved gate properties is provided. The method comprises the steps of providing (131) a substrate (31) having a stack of semiconductor layers (32-35) formed thereon, the st... | 05/17/2005 |
| 6806173 | Method for producing highly doped semiconductor components A method is proposed for producing semiconductor components, in which at least one doped region is introduced in a wafer, a solid glass layer provided with dopant being applied on at least one of the two sides of a semiconductor wafer, in another step, the wafer bei... | 10/19/2004 |
| 6743704 | Method of manufacturing a semiconductor device A CMOSFET in which a p-type gate electrode and an n-type gate electrode are formed on a silicon substrate. The p-type gate electrode includes, in order, a p-type polycrystalline silicon layer and a tungsten silicide layer. The n-type gate electrode includes, in orde... | 06/01/2004 |
| 6723587 | Ultra small-sized SOI MOSFET and method of fabricating the same An ultra small-sized SOI MOSFET having a high integration density, low power consumption, but high performances, and a method of fabricating the same are provided. The method includes preparing a SOI substrate on which a monocrystalline silicon layer is formed, form... | 04/20/2004 |
| 6695903 | Dopant pastes for the production of p, p+, and n, n+ regions in semiconductors The invention relates to novel boron, phosphorus or boron-aluminium dopant pastes for the production of p, p+ and n, n+ regions in monocrystalline and polycrystalline Si wafers, and of corresponding pastes for use as masking pastes in semiconductor fabric... | 02/24/2004 |
| 6642119 | Silicide MOSFET architecture and method of manufacture The present invention relates to a method of forming a transistor and a transistor structure. The invention comprises forming the transistor using a double silicide process which reduces resistance and reduces the floating-body-effect when employed in con... | 11/04/2003 |
| 6613974 | Tandem Si-Ge solar cell with improved conversion efficiency P-type and n-type regions are defined in the first surface of a substrate upon which is formed an epitaxial layer of preferably Si--Ge material, preferably capped by Si material. During epitaxy formation, dopant in the defined regions diffuses down to for... | 09/02/2003 |
| 6555451 | Method for making shallow diffusion junctions in semiconductors using elemental doping A method is provided for making ultra-shallow diffused junctions using an elemental dopant. A semiconductor wafer is cleaned for providing a clean reaction surface. The cleaned wafer in loaded onto a stage located in a doping system. A quantity of element... | 04/29/2003 |
| 6506653 | Method using disposable and permanent films for diffusion and implant doping Methods are provided that use disposable and permanent films to dope underlying layers through diffusion. Additionally, methods are provided that use disposable films during implantation doping and that provide a surface from which to dope underlying mate... | 01/14/2003 |
| 6498079 | Method for selective source diffusion Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and t... | 12/24/2002 |
| 6492239 | Method for fabricating avalanche photodiode An avalanche photodiode fabricating method with a simplified fabrication process and an improved reproducibility is disclosed. The method for fabricating an avalanche photodiode includes the steps of: (a) sequentially stacking, on an n-type InP substrate,... | 12/10/2002 |
| 6458693 | Method of manufacturing a semiconductor device A semiconductor device which can reduce contact resistance, is disclosed. A semiconductor device according to the present invention includes a lower conductor pattern and an upper conductor pattern. The lower conductor pattern is in contact with the upper... | 10/01/2002 |
| 6448105 | Method for doping one side of a semiconductor body A method for doping one side of a semiconductor substrate, such as in a silicon wafer, wherein an oxide layer is deposited on both the side to be doped and the non-doped side of the semiconductor substrate. A doping layer, containing a doping agent, is de... | 09/10/2002 |
| 6380040 | Prevention of dopant out-diffusion during silicidation and junction formation High integrity cobalt silicide contacts are formed with shallow source/drain junctions. Embodiments include depositing a layer of cobalt on a substrate above intended source/drain regions, followed by silicidation and diffusing impurities from a doped fil... | 04/30/2002 |
| 6340535 | Method for the heat treatment of a ZnSe crystal substrate, heat treated substrate and light emission device This invention relates to a method for the heat treatment of a ZnSe crystal substrate to dope it with Al as a donor impurity, a ZnSe crystal substrate prepared by this heat treatment and a light-emitting device using the ZnSe crystal substrate, in particu... | 01/22/2002 |
| 6291328 | Opto-electronic device with self-aligned ohmic contact layer An opto-electronic device has a diffusion area of one conductive type formed in a semiconductor substrate of another conductive type, an ohmic contact layer making contact with the diffusion area, and an electrode making contact with the ohmic contact lay... | 09/18/2001 |
| 6187678 | High density integrated circuit packaging with chip stacking and via interconnections Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallizat... | 02/13/2001 |
| 6180442 | Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method The present invention relates to a method for fabricating an integrated circuit including an NPN-type bipolar transistor, including the steps of defining a base-emitter location of the transistor with polysilicon spacers resting on a silicon nitride layer... | 01/30/2001 |
| 6169005 | Formation of junctions by diffusion from a doped amorphous silicon film during silicidation High integrity ultra-shallow source/drain junctions are formed employing cobalt silicide contacts. These are formed by depositing a layer of cobalt on a substrate above intended source/drain regions, and depositing a doped amorphous silicon film on the co... | 01/02/2001 |
| 6124167 | Method for forming an etch mask during the manufacture of a semiconductor device A method used during the formation of a semiconductor device comprises the steps of forming a polycrystalline silicon layer over a semiconductor substrate assembly and forming a silicon nitride layer over the polycrystalline silicon layer. A silicon dioxi... | 09/26/2000 |
| 6057216 | Low temperature diffusion process for dopant concentration enhancement Doped semiconductor with high dopant concentrations in small semiconductor regions without excess spreading of the doped region are formed by: (a) applying a dopant-containing oxide glass layer on the semiconductor surface, (b) capping the dopant-containing ox... | 05/02/2000 |
| 5985768 | Method of forming a semiconductor The present invention discloses a method of doping and preventing silicide formation in selective areas of a polysilicon gate in MOS, PMOS, NMOS or CMOS manufacturing technologies. The process includes the steps of: depositing a non-conformal dopant conta... | 11/16/1999 |
| 5976939 | Low damage doping technique for self-aligned source and drain regions A process for fabricating a source and drain region which includes a more lightly doped source and drain tip region immediately adjacent to the gate and a more heavily doped main portion of the source and drain region spaced apart from the gate. A first l... | 11/02/1999 |
