Did You Know...
...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7985667 | Method for patterning semiconductor device having magnetic tunneling junction structure A method for patterning a semiconductor device includes forming a lower electrode conductive layer over a substrate, forming a stack structure including a lower electrode conductive layer, a first ferromagnetic layer, an insulation layer and a second ferromagnetic l... | 07/26/2011 |
| 7442625 | Apparatus for annealing, method for annealing, and method for manufacturing a semiconductor device An apparatus for annealing a substrate includes a substrate stage having a substrate mounting portion configured to mount the substrate; a heat source having a plurality of heaters disposed under the substrate mounting portion, the heaters individually preheating a ... | 10/28/2008 |
| 7303949 | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture A semiconductor device and method of manufacturing a semiconductor device. The semiconductor device includes channels for a pFET and an nFET. A SiGe layer is selectively grown in the source and drain regions of the pFET channel and a Si:C layer is selectively grown ... | 12/04/2007 |
| 7176114 | Method of depositing patterned films of materials using a positive imaging process The invention generally encompasses a method for forming a pattern on a substrate. The method comprises applying a precursor comprising at least one metal to a substrate to form a precursor layer, exposing a predetermined portion of the precursor layer and developin... | 02/13/2007 |
| 6955726 | Mask and mask frame assembly for evaporation A mask frame assembly includes a frame having an opening and a mask having at least two unit mask elements. Both ends of each unit mask element are fixed to the frame in a state of tension. The unit mask elements include a unit masking pattern, and overlap each othe... | 10/18/2005 |
| 6780781 | Method for manufacturing an electronic device A method for manufacturing an electronic device is provided. In one example of the method, the method prevents deformation of a resist mask caused by the irradiation of exposure light. The resist mask has a resist as an opaque element, and can afford mask patterns u... | 08/24/2004 |
| 6703307 | Method of implantation after copper seed deposition A method of fabricating an integrated circuit can include forming a barrier layer along lateral side walls and a bottom of a via aperture, forming a seed layer proximate and conformal to the barrier layer, and forming an implanted layer proximate and conf... | 03/09/2004 |
| 6670251 | Method of fabricating semiconductor device An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position... | 12/30/2003 |
| 6444542 | Integrated circuit and method A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.... | 09/03/2002 |
| 6124167 | Method for forming an etch mask during the manufacture of a semiconductor device A method used during the formation of a semiconductor device comprises the steps of forming a polycrystalline silicon layer over a semiconductor substrate assembly and forming a silicon nitride layer over the polycrystalline silicon layer. A silicon dioxi... | 09/26/2000 |
| 6100172 | Method for forming a horizontal surface spacer and devices formed thereby The present invention provides a method for forming self-aligned spacers on the horizontal surfaces while removing spacer material from the vertical surfaces. The preferred method uses a resist that can be made insoluble to developer by the use of an impl... | 08/08/2000 |
| 6005260 | Non-linear switching element of an electro-optical display device with metallic protective layer For contacting a non-linear switching element (10), for example for use in a display device (1), a metallic layer (14) is provided on a layer of non-linear resistive material by means of a low-energetic deposition technique. This layer may function as a c... | 12/21/1999 |
| 5070029 | Semiconductor process using selective deposition A process for fabricating semiconductor devices is disclosed which utilizes a selective deposition process to reduce the total number of process steps and especially the total number of photolithography steps required. In accordance with one embodiment of... | 12/03/1991 |
| 4002513 | Bucket-brigade delay line having reduced parasitic capacitances and method for making the same An MOS bucket brigade delay line having reduced parasitic capacitances and method for making the same, include a first set of diffused drain source regions in a semiconductor substrate, a thin gate oxide layer overlying said diffused regions, a plurality ... | 01/11/1977 |
| 3998675 | Method of doping a semiconductor body A method of doping a semiconductor body comprises applying to a surface of the semiconductor body a layer through which the doping material can diffuse and provide the layer with a reducing agent to reduce the doping material to its elemental form at area... | 12/21/1976 |
