Did You Know...
...that Robert Adler has the dubious distinction of being the Father of the Couch Potato? Back in 1955 Adler was employed by what was then Zenith Radio Corp., where he was charged to invent something that would allow viewers to turn down the TV volume without leaving their chairs. After a series of flops (such as a wired contraption that people tripped over), Adler hit on the idea of using sound waves. Thus the Remote Control was born...
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7297617 | Method for controlling diffusion in semiconductor regions A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of impurity elements, including at least one dopant element. Selection of a plurality of impurity elements inc... | 11/20/2007 |
| 7094671 | Transistor with shallow germanium implantation region in channel A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a channel region of a transistor at a low energy level, forming an amorphous germanium implantation region... | 08/22/2006 |
| 6988900 | Surface mount connector assembly A surface mount connector assembly for mounting to a printed wiring board (PWB) in a low-profile manner. The height of the surface mount connector assembly is diminished because the connector assembly extends from one side of the PWB to the other through an opening ... | 01/24/2006 |
| 6936527 | Low voltage non-volatile memory cell A memory cell comprises a multilayer gate heating structure formed over a channel region between source and drain regions. The multilayer gate heating structure comprises polysilicon and metal silicide layers stacked over a similarly shaped gate oxide. When a progra... | 08/30/2005 |
| 6617228 | Semiconductor material and method for enhancing solubility of a dopant therein A method for enhancing the equilibrium solubility of boron and indium in silicon. The method involves first-principles quantum mechanical calculations to determine the temperature dependence of the equilibrium solubility of two important p-type dopants in... | 09/09/2003 |
| 6498078 | Method for enhancing the solubility of boron and indium in silicon A method for enhancing the equilibrium solubility of boron and indium in silicon. The method involves first-principles quantum mechanical calculations to determine the temperature dependence of the equilibrium solubility of two important p-type dopants in... | 12/24/2002 |
| 5532185 | Impurity doping method with adsorbed diffusion source The surface of a silicon wafer is cleaned to expose chemically active surface. Diborane gas is fed to the exposed active surface for adsorbing boron to the active surface. The adsorbed boron on the silicon wafer works as an impurity diffusion source. Boro... | 07/02/1996 |
| 5413943 | Semiconductor device and method of manufacturing the same An impurity diffusion layer shallow in diffusion depth and high in activity is formed in a semiconductor device. In the semiconductor device, clusters of icosahedron structure each composed of boron atoms are formed in the silicon crystal of the impurity ... | 05/09/1995 |
| 4904618 | Process for doping crystals of wide band gap semiconductors Non-equilibrium impurity incorporation is used to dope hard-to-dope crystals of wide band gap semiconductors, such as zinc selenide and zinc telluride. This involves incorporating into the crystal a compensating pair of primary and secondary dopants, ther... | 02/27/1990 |
| 4717678 | Method of forming self-aligned P contact Disclosed is a process for forming self-aligned low resistance ohmic contact to a P doped region (e.g., base of an NPN device) in conjunction with forming similar contact to a (highly) N doped region (e.g., emitter of NPN). After forming a P doped region ... | 01/05/1988 |
| 4472212 | Method for fabricating a semiconductor device A method for forming a shallow and highly concentrated arsenic doped surface layer in a silicon bulk region includes the steps of forming an arsenic doped polysilicon layer in contact with a preselected area of a bulk region surface in which the surface l... | 09/18/1984 |
| 4201603 | Method of fabricating improved short channel MOS devices utilizing selective etching and counterdoping of polycrystalline silicon A method for fabricating a short channel MOS device is described wherein the conductivity of the gate member is increased by a factor of about 2.5 by counterdoping a P-type doped polycrystalline line with an N-type dopant.... | 05/06/1980 |
