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Mountable Printable Placard With Headband
A resilient headband in a shape for being mounted on the head of the user. The headband is equipped with a longitudinal slotted member for holding a placard.
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| Number | Title | Issue Date |
| 7268065 | Methods of manufacturing metal-silicide features A method of manufacturing a microelectronic device including forming an opening in a dielectric layer located over a substrate, forming a semi-conductive layer substantially conforming to the opening, and forming a conductive layer substantially conforming to the se... | 09/11/2007 |
| 7241672 | Method and apparatus for rapid cooldown of annealed wafer A method for annealing a semiconductor substrate. The method includes turning on at least one heat source, heating a semiconductor substrate in a chamber, turning off the at least one heat source, and cooling the semiconductor substrate in the chamber. The heating a... | 07/10/2007 |
| 7235430 | Substrates having increased thermal conductivity for semiconductor structures Substrates having increased thermal conductivity are provided, comprising a body having opposed surfaces and a cavity that opens on at least one surface, the cavity containing at least one material having a greater thermal conductivity than the body. Devices are pro... | 06/26/2007 |
| 7169696 | Method for making a system for selecting one wire from a plurality of wires A system and method for selecting nanometer-scaled devices. The method includes a plurality of semiconductor wires. Two adjacent semiconductor wires of the plurality of semiconductor wires are associated with a separation smaller than or equal to 100 nm. Additionall... | 01/30/2007 |
| 7135387 | Method of manufacturing semiconductor element A method for stably activating pn-successive layers in a semiconductor element in a short time is disclosed. Pulsed beams, each of which has a pulse shape that is approximately rectangular, are projected from respective laser irradiation devices and successively com... | 11/14/2006 |
| 7022553 | Compact system module with built-in thermoelectric cooling An improved integrated circuit package for providing built-in heating or cooling to a semiconductor chip is provided. The improved integrated circuit package provides increased operational bandwidth between different circuit devices, e.g. logic and memory chips. The... | 04/04/2006 |
| 6962858 | Method for reducing free surface roughness of a semiconductor wafer The invention provides a method of reducing the roughness of the free surface of a wafer of semiconductor material by applying a rapid thermal annealing process under a pure argon atmosphere for a time sufficient to uniformly heat and smooth the free surface of the ... | 11/08/2005 |
| 6946379 | Insulative cap for laser fusing A semiconductor device having at least one fuse and an alignment mark formed therein. An etch resistant layer over the surface of the fuse and alignment mark, which provides a uniform passivation thickness for use in conjunction with laser fuse deletion processes. | 09/20/2005 |
| 6900130 | Method for locally heating a region in a semiconductor substrate A method is proposed for locally heating a region that is disposed in a substrate. A substrate is provided and at least one region is produced in the substrate with a lower specific resistance than the surrounding substrate. The region is then locally heated by indu... | 05/31/2005 |
| 6858887 | BJT device configuration and fabrication method with reduced emitter width A BJT device configuration includes an emitter finger and via arrangement which reduces emitter finger width, and is particularly suitable for use with compound semiconductor-based devices. Each emitter finger includes a cross-shaped metal contact which provides an ... | 02/22/2005 |
| 6858508 | SOI annealing method A method for annealing an SOI in which two annealing steps are followed by a cooling step. During the second annealing step, the annealing temperature is from 993° C. to the melting point of silicon. During the cooling step, the cooling rate is not less than 0.12°... | 02/22/2005 |
| 6809015 | Method for heat treatment of silicon wafers and silicon wafer According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperatu... | 10/26/2004 |
| 6767809 | Method of forming ultra shallow junctions The present invention relates to a method of fabricating a semiconductor device. In specific embodiments, the method comprises providing a semiconductor substrate, and ion implanting dopant impurities over a time period into the semiconductor device by varying an io... | 07/27/2004 |
| 6734081 | Shallow trench isolation structure for laser thermal processing Provided are methods and composition for forming an isolation structure on an integrated circuit substrate. A trench is etched in the integrated circuit substrate. A light barrier layer is then formed in the trench such that the light barrier layer at least partiall... | 05/11/2004 |
| 6695903 | Dopant pastes for the production of p, p+, and n, n+ regions in semiconductors The invention relates to novel boron, phosphorus or boron-aluminium dopant pastes for the production of p, p+ and n, n+ regions in monocrystalline and polycrystalline Si wafers, and of corresponding pastes for use as masking pastes in semiconductor fabric... | 02/24/2004 |
| 6673704 | Semiconductor device and method of manufacturing the same A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, fillin... | 01/06/2004 |
| 6656749 | In-situ monitoring during laser thermal annealing A method of manufacturing a semiconductor device includes thermal annealing source/drain regions with a laser, measuring a depth of the source/drain regions, and adjusting a parameter of the laser used in the thermal annealing process. After the laser is ... | 12/02/2003 |
| 6582998 | Method for fabricating nonvolatile semiconductor memory device Ions of arsenic are selectively implanted at a high concentration into a substrate through a first passivation film of silicon dioxide to obtain a shallow junction, thereby forming a source region with a low resistivity and a first drain region. Then, aft... | 06/24/2003 |
| 6573159 | Method for thermally annealing silicon wafer and silicon wafer According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, an... | 06/03/2003 |
| 6500741 | Method for making high voltage device An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semicon... | 12/31/2002 |
| 6479885 | High voltage device and method An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semicon... | 11/12/2002 |
| 6376346 | High voltage device and method for making the same An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semicon... | 04/23/2002 |
| 6268270 | Lot-to-lot rapid thermal processing (RTP) chamber preheat optimization Methods of optimizing a preheat recipe for rapid thermal processing workpieces are provided. In one aspect, a method of manufacturing is provided that includes preheating a rapid thermal processing chamber according to a preheating recipe and processing a... | 07/31/2001 |
| 6159812 | Reduced boron diffusion by use of a pre-anneal A method for slowing the diffusion of boron ions in a CMOS structure includes a preanneal step which can be incorporated as part of a step in which silane is deposited across the surface of the wafer. After the last implant on a CMOS device, silane (SiH | 12/12/2000 |
| 5976921 | Method for manufacturing electrostatic discharge protection (ESD) and BiCMOS A semiconductor device having an electrostatic discharge protection device and at least one accompanying device selected from the group comprising of a N or P channel MOS transistor, CMOS, bipolar transistor and BiCMOS, in which the electrostatic discharg... | 11/02/1999 |
| 5834343 | Method of manufacturing thin film transistor The method of manufacturing a thin film transistor, including the steps of: a first step, after a poly-crystal silicon film has been formed on a substrate (1), for forming a layer to be formed as an conductive layer (2a) for the thin film transistor by pa... | 11/10/1998 |
| 5773337 | Method for forming ultra-shallow junction of semiconductor device There is disclosed a method for forming an ultra-shallow junction of a semiconductor device, comprising a four-stage RTA process following the ion implantation of dopants for source/drain junction, the RTA process being carried out with high temperature-e... | 06/30/1998 |
| 5760453 | Moisture barrier layers for integrated circuit applications The structure and method is provided which prevents moisture and contamination from diffusing through openings (e.g., fuse windows) in insulating layers to product devices. Three moisture barrier layers form a moisture impervious boundary system to preven... | 06/02/1998 |
| 5733801 | Method of making a semiconductor device with alignment marks A first trench is formed in an element-separating region on the surface of a semiconductor substrate, and a second trench is formed in an alignment mark region thereof. When a first insulating substance is deposited on the substrate surface so as to bury ... | 03/31/1998 |
| 5525541 | Method of making an electronic and/or photonic component A method of making a component presenting at least one integrated electro-optical and/or photonic function, in which at least one dielectric layer of doped SiOx is deposited on a quantum well layer based on III/V materials, and in which the res... | 06/11/1996 |
| 5447871 | Electrically conductive interconnection through a body of semiconductor material Methods and structures of an etched-back thermomigrated interconnection which provides means for electrically connecting coplanar surfaces of a body of semiconductor material while concurrently providing means of making mechanical, electrical, and thermal... | 09/05/1995 |
| 5223453 | Controlled metal-semiconductor sintering/alloying by one-directional reverse illumination Metal strips deposited on a top surface of a semiconductor substrate are sintered at one temperature simultaneously with alloying a metal layer on the bottom surface at a second, higher temperature. This simultaneous sintering of metal strips and alloying... | 06/29/1993 |
| 5183780 | Method of fabricating semiconductor device In a method of fabricating a semiconductor device according to the present invention, a semiconductor film is formed on a substrate, and an insulator film is formed so as to cover the semiconductor film. Then, a dopant source is arranged on the insulator ... | 02/02/1993 |
| 4720308 | Method for producing high-aspect ratio hollow diffused regions in a semiconductor body and diode produced thereby A semiconductor device and a method for its preparation are disclosed, wherein a body of semiconducting material has at least one bore extending completely therethrough, this bore having a substantially constant diameter of less than about 1.5 mils and an... | 01/19/1988 |
| 4595428 | Method for producing high-aspect ratio hollow diffused regions in a semiconductor body A semiconductor device and a method for its preparation are disclosed, wherein a body of semiconducting material has at least one bore extending completely therethrough, this bore having a substantially constant diameter of less than about 1.5 mils and an... | 06/17/1986 |
| 4523067 | Temperature gradient zone melting apparatus An apparatus is provided for fabricating a semiconductor device by thermal gradient zone melting, whereby metal-rich droplets such as aluminum migrate through a semiconductor wafer such as silicon to create conductive paths. One surface of the wafer is pl... | 06/11/1985 |
| 4519850 | Process for the thermo-migration of liquid phases In a process for the thermo-migration of liquid phases in a temperature gradient, which process starts from a metal coating (2) on a semiconducting substrate (1), the metal coating (2) is applied to a plane substrate surface (11), the temperature gradient... | 05/28/1985 |
| 4398974 | Temperature gradient zone melting process employing a buffer layer A process is provided for fabricating a semiconductor device by thermal gradient zone melting, whereby metal-rich droplets such as aluminum migrate through a semiconductor wafer such as silicon to create conductive paths. One surface of the wafer in provi... | 08/16/1983 |
| 4335362 | Semiconductor device and a method of contacting a partial region of a semiconductor surface A semiconductor device comprising, a plurality of semiconductor layers having an outer semiconductor layer, and a contact layer uniformly and entirely covering said outer semiconductive layer and having over its entire surface the same material compositio... | 06/15/1982 |
| 4257824 | Photo-induced temperature gradient zone melting A temperature gradient zone melting process is disclosed wherein the temperature gradient is established substantially across only the molten zone by preferentially heating the molten zone. In a specific embodiment, the mechanism for inputting heat to the... | 03/24/1981 |
