Did You Know...
...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
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| Number | Title | Issue Date |
| 8173527 | Stepped masking for patterned implantation An improved method of moving a mask to perform a pattern implant of a substrate is disclosed. The mask has a plurality of apertures, and is placed between the ion source and the substrate. After the substrate is exposed to the ion beam, the mask is indexed to a new ... | 05/08/2012 |
| 8008176 | Masked ion implant with fast-slow scan An improved method of producing solar cells utilizes a mask which is fixed relative to an ion beam in an ion implanter. The ion beam is directed through a plurality of apertures in the mask toward a substrate. The substrate is moved at different speeds such that the... | 08/30/2011 |
| 7884001 | Image sensor and method for manufacturing the same Embodiments relate to an image sensor and a method of manufacturing an image sensor. According to embodiments, an image sensor may include a gate over a semiconductor substrate, a first impurity region over the semiconductor substrate, a second impurity region over ... | 02/08/2011 |
| 7871908 | Method of manufacturing semiconductor device The method of manufacturing a semiconductor device comprising: forming a first hard mask layer and a second hard mask layer on the layer to be etched (S11); a first groove-forming mask pattern forming process for forming a groove-forming mask pattern which ha... | 01/18/2011 |
| 7541266 | Covert transformation of transistor properties as a circuit protection method A technique for and structures for camouflaging an integrated circuit structure. The technique includes the use of a light density dopant (LDD) region of opposite type from the active regions resulting in a transistor that is always off when standard voltages are ap... | 06/02/2009 |
| 7432179 | Controlling gate formation by removing dummy gate structures A method of forming semiconductor structures comprises following steps. A gate dielectric layer is formed over a substrate in an active region. A gate electrode layer is formed over the gate dielectric layer. A first photo resist is formed over the gate electrode la... | 10/07/2008 |
| 7381607 | Method of forming a spiral inductor in a semiconductor substrate An inductor formed on a semiconductor substrate, comprising active device regions. The inductor comprises conductive lines formed on a dielectric layer overlying the semiconductor substrate. The conductive lines are patterned and etched into the desired shape, in on... | 06/03/2008 |
| 7375012 | Method of forming multilayer film This disclosure describes system(s) and/or method(s) enabling contacts for individual nanometer-scale-thickness layers of a multilayer film. ... | 05/20/2008 |
| 7314803 | Method for producing a semiconductor structure In a method for producing a semiconductor structure a semiconductor a substrate with a top surface is provided. A gate dielectric layer is provided on the top surface and on the gate dielectric layer is provided a memory cell array region with a first plurality of g... | 01/01/2008 |
| 7297581 | SRAM formation using shadow implantation A method of doping fins of a semiconductor device that includes a substrate includes forming multiple fin structures on the substrate, each of the fin structures including a cap formed on a fin. The method further includes performing a first tilt angle implant proce... | 11/20/2007 |
| 7285468 | Methods of forming semiconductor constructions The invention includes a semiconductor construction having a pair of channel regions that have sub-regions doped with indium and surrounded by boron. A pair of transistor constructions are located over the channel regions and are separated by an isolation region. Th... | 10/23/2007 |
| 7268065 | Methods of manufacturing metal-silicide features A method of manufacturing a microelectronic device including forming an opening in a dielectric layer located over a substrate, forming a semi-conductive layer substantially conforming to the opening, and forming a conductive layer substantially conforming to the se... | 09/11/2007 |
| 7256094 | Method for changing threshold voltage of device in resist asher A method for forming a dopant in a substrate, by accumulating at least one dopant species in an asher chamber and forming the accumulated dopant species on an exposed portion of the substrate. A target concentration for the plasma chamber dopant species is determine... | 08/14/2007 |
| 7250331 | Mask for crystallizing and method of crystallizing amorphous silicon using the same A method of crystallizing amorphous silicon using a mask having a transmitting portion including a plurality of stripes, wherein end lines of at least two stripes are not collinear; and a blocking portion enclosing the plurality of stripes includes the steps of sett... | 07/31/2007 |
| 7244655 | Method of manufacturing semiconductor device capable of suppressing impurity concentration reduction in doped channel region arising from formation of gate insulating film A method of manufacturing a semiconductor device is provided that can suppress impurity concentration reduction in a doped channel region arising from formation of a gate insulating film. With a silicon oxide film (20) and a silicon nitride film (21) b... | 07/17/2007 |
| 7217656 | Structure and method for bond pads of copper-metallized integrated circuits A metal structure for a contact pad of a wafer or substrate (101), which have copper interconnecting traces (102) surrounded by a barrier metal layer (103). The wafer or substrate is protected by an insulating overcoat (104). In the struc... | 05/15/2007 |
| 7195998 | Compound semiconductor device and manufacturing method thereof A compound semiconductor device including: an isolated mesa section on which an upper surface having two pairs of parallel sides is formed by mesa etching a compound semiconductor wafer, wherein the mesa section is formed from at least a forward mesa surface which i... | 03/27/2007 |
| 7189623 | Semiconductor processing method and field effect transistor A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed ... | 03/13/2007 |
| 7125777 | Asymmetric hetero-doped high-voltage MOSFET (AHMOS) An asymmetric hetero-doped metal oxide (AH2MOS) semiconductor device includes a substrate and an insulated gate on the top of the substrate disposed between a source region and a drain region. On one side of the gate, heterodoped tub and source regions ar... | 10/24/2006 |
| 7122453 | Methods of patterning radiation, methods of forming radiation-patterning tools, and radiation-patterning tools The invention includes a method of patterning radiation. The radiation is simultaneously passed through a structure and through a subresolution assist feature that is transmissive of at least a portion of the radiation. The subresolution assist feature alters a patt... | 10/17/2006 |
| 7101739 | Method for forming a schottky diode on a silicon carbide substrate A method for manufacturing a vertical Schottky diode with a guard ring on a lightly-doped N-type silicon carbide layer, including forming a P-type epitaxial layer on the N-type layer; implanting N-type dopants in areas of the P-type epitaxial layer to neutralize in ... | 09/05/2006 |
| 7064048 | Method of forming a semi-insulating region A semiconductor substrate is provided, and at least one first mask is formed above the semiconductor substrate. The first mask blocks at least one semi-insulating region. A second mask is thereafter formed on a surface of the semiconductor substrate. The second mask... | 06/20/2006 |
| 6996892 | Circuit board embedded inductor A circuit board having an embedded inductor and a process for making the circuit board is provided. In general, the process begins by providing a core structure including a dielectric core layer and a first metal layer on a top surface of the dielectric core layer. ... | 02/14/2006 |
| 6998319 | Method of manufacturing semiconductor device capable of suppressing impurity concentration reduction in doped channel region arising from formation of gate insulating film A method of manufacturing a semiconductor device is provided that can suppress impurity concentration reduction in a doped channel region arising from formation of a gate insulating film. With a silicon oxide film (20) and a silicon nitride film (21) b... | 02/14/2006 |
| 6967147 | Nitrogen implantation using a shadow effect to control gate oxide thickness in DRAM semiconductor Process for forming dual gate oxides for DRAMS by incorporating different thicknesses of gate oxides by using nitrogen implantation. Either angled nitrogen implantation or nitride spacers is used to create a “shadow effect” or area, which limits the nitrogen dos... | 11/22/2005 |
| 6955726 | Mask and mask frame assembly for evaporation A mask frame assembly includes a frame having an opening and a mask having at least two unit mask elements. Both ends of each unit mask element are fixed to the frame in a state of tension. The unit mask elements include a unit masking pattern, and overlap each othe... | 10/18/2005 |
| 6951823 | Plasma ashing process A substantially oxygen-free and nitrogen-free plasma ashing process for removing photoresist in the presence of a low k material from a semiconductor substrate includes forming reactive species by exposing a plasma gas composition to an energy source to form plasma.... | 10/04/2005 |
| 6949389 | Encapsulation for organic light emitting diodes devices An embodiment of an encapsulated OLED device is described. This embodiment of the encapsulated OLED device is formed by: fabricating multiple OLED devices on a substrate; depositing at least one planarization layer on the OLED devices; hardening the at least one pla... | 09/27/2005 |
| 6913979 | Method of manufacturing a metal oxide semiconductor transistor Disclosed is a method of manufacturing a MOS transistor having an enhanced reliability. A passivation layer is formed on a gate electrode and on a substrate to prevent a generation of a recess on the substrate. After a mask pattern is formed on the substrate for mas... | 07/05/2005 |
| 6884632 | Ion beam definition of magnetoresistive field sensors A magnetoresistive (MR) sensor can be shaped using ion beam irradiation and/or implantation through a mask introduced between a MR structure and an ion source. The mask covers selected portions of the MR structure to define the track width of the sensor. Ion irradia... | 04/26/2005 |
| 6884703 | Manufacturing of a low-noise mos device At the surface of a substrate a gate oxide layer is produced and is given a dual thickness. A first oxide layer is produced over the surface of a substrate by thermal oxidation and is covered by a mask layer defining suitably located openings. A material acceleratin... | 04/26/2005 |
| 6852610 | Semiconductor device and method for manufacturing the same A semiconductor device includes a gate electrode formed on a semiconductor region via a gate insulative film and an extension high concentration diffusion layer of a first conductivity type formed in the semiconductor region beside the gate electrode. A dislocation ... | 02/08/2005 |
| 6828202 | Semiconductor region self-aligned with ion implant shadowing A semiconductor device includes doped regions of a substrate spaced at selected distances from features at an upper surface of the substrate. According to an example embodiment of the present invention, the doped regions are implanted and spaced apart from the featu... | 12/07/2004 |
| 6815317 | Method to perform deep implants without scattering to adjacent areas A method of fabricating an integrated circuit in and on a semiconductor substrate with deep implantations by applying a scattered ion capturing layer in the resist mask opening to capture any implanted ions scattered in the resist and deflected out of the resist int... | 11/09/2004 |
| 6815318 | Manufacturing method of semiconductor device When an opening diameter of a top end of a substantially column-shaped contact hole is S1, an opening diameter of a top end of a substantially column-shaped contact hole is T1, and a thickness of a silicon insulating layer is h, then contact holes are formed so as t... | 11/09/2004 |
| 6797596 | Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device A method used during the formation of a semiconductor device reduces ion channeling during implantation of the wafer. The method comprises providing a semiconductor wafer and an unetched transistor gate stack assembly over the wafer. The unetched transistor gate sta... | 09/28/2004 |
| 6787406 | Systems and methods for forming dense n-channel and p-channel fins using shadow implanting A method facilitates the doping of fins of a semiconductor device that includes a substrate. The method includes forming fin structures on the substrate, where each of the fin structures includes a cap formed on a fin. The method further includes performing a first ... | 09/07/2004 |
| 6780781 | Method for manufacturing an electronic device A method for manufacturing an electronic device is provided. In one example of the method, the method prevents deformation of a resist mask caused by the irradiation of exposure light. The resist mask has a resist as an opaque element, and can afford mask patterns u... | 08/24/2004 |
| 6774006 | Microelectronic device fabricating method, and method of forming a pair of field effect transistor gate lines of different base widths from a common deposited conductive layer A microelectronic device fabricating method includes providing a substrate having a mean global outer surface extending along a plane. A first portion is formed over the substrate comprising a straight linear segment which is angled from the plane and forming a seco... | 08/10/2004 |
| 6716729 | Stable bisphenolic compositions There is provided a stable single-phase composition of bisphenolic stillbottoms and methods for making such compositions. There is also provided a resole and a novolac composition that includes in the manufacture of the resins the use of a stable solution of bisphen... | 04/06/2004 |
