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| Number | Title | Issue Date |
| 8153513 | Method and system for continuous large-area scanning implantation process A method for manufacturing doped substrates using a continuous large area scanning implantation process is disclosed. In one embodiment, the method includes providing a movable track member. The movable track member is provided in a chamber. The chamber includes an ... | 04/10/2012 |
| 8124511 | Method of manufacturing a semiconductor device having reduced N/P or P/N junction crystal disorder One aspect provides a method of manufacturing a semiconductor device having reduced N/P or P/N junction crystal disorder. In one aspect, this improvement is achieved by forming gate electrodes over a semiconductor substrate, amorphizing the semiconductor substrate t... | 02/28/2012 |
| 7972947 | Method for fabricating a semiconductor element, and semiconductor element In a method for fabricating a semiconductor element in a substrate, first implantation ions are implanted into the substrate, whereby micro-cavities are produced in a first partial region of the substrate. Furthermore, pre-amorphization ions are implanted into the s... | 07/05/2011 |
| 7923360 | Method of forming dielectric films A method of forming dielectric films including a metal silicate on a silicon substrate comprises a first step of oxidizing a surface layer portion of the silicon substrate and forming a silicon dioxide film; a second step of irradiating ion on the surface of the sil... | 04/12/2011 |
| 7897496 | Semiconductor doping with reduced gate edge diode leakage Semiconductor doping techniques, along with related methods and structures, are disclosed that produce components having a more tightly controlled source and drain extension region dopant profiles without significantly inducing gate edge diode leakage. The technique... | 03/01/2011 |
| 7884000 | Method for manufacturing simox wafer A method for manufacturing SIMOX wafer, wherein roughness (Rms) of an SOI layer and roughness (Rms) of an interface between the SOI layer and a BOX layer can be reduced. The method includes forming a first ion-implanted layer containing highly concentrated oxygen wi... | 02/08/2011 |
| 7863171 | SOI transistor having a reduced body potential and a method of forming the same By introducing a atomic species, such as carbon, fluorine and the like, into the drain and source regions, as well as in the body region, the junction leakage of SOI transistors may be significantly increased, thereby providing an enhanced leakage path for accumulat... | 01/04/2011 |
| 7825016 | Method of producing a semiconductor element In a method for fabricating a semiconductor element in a substrate, micro-cavities are formed in the substrate. Furthermore, doping atoms are implanted into the substrate, whereby crystal defects are produced in the substrate. The substrate is heated, so that at lea... | 11/02/2010 |
| 7749876 | Method for the production of a buried stop zone in a semiconductor component and semiconductor component comprising a buried stop zone According to one embodiment, a method for the production of a stop zone in a doped zone of a semiconductor body comprises irradiating the semiconductor body with particle radiation in order to produce defects in a crystal lattice of the semiconductor body. The semic... | 07/06/2010 |
| 7723220 | Method of forming compressive channel layer of PMOS device using gate spacer and PMOS device having a compressed channel layer A method of forming a compressive channel layer in a PMOS device and a PMOS device having a compressive channel layer are provided. The method includes (a) forming a buffer oxide layer on a silicon semiconductor substrate having a gate oxide layer and a gate electro... | 05/25/2010 |
| 7618883 | Method for introducing impurities and apparatus for introducing impurities A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus u... | 11/17/2009 |
| 7598162 | Method of manufacturing semiconductor device It is an object to provide a method of manufacturing a semiconductor device capable of forming a MOS transistor of high performance, comprising the steps of forming a gate electrode on a semiconductor substrate via a gate-insulating film (step S1), introducin... | 10/06/2009 |
| 7592243 | Method of suppressing diffusion in a semiconductor device An impurity-diffused layer having an extension structure is formed first by implanting Sb ion as an impurity for forming a pocket region; then by implanting N as a diffusion-suppressive substance so as to produce two peaks in the vicinity of the interface with a gat... | 09/22/2009 |
| 7582547 | Method for junction formation in a semiconductor device and the semiconductor device made thereof Devices and methods for junction formation in manufacturing a semiconductor device are disclosed. The devices have shallow junction depths far removed from end-of range defects. The method comprises forming an amorphous region in a crystalline semiconductor such as ... | 09/01/2009 |
| 7572716 | Semiconductor doping with improved activation A method is disclosed for doping a target area of a semiconductor substrate, such as a source or drain region of a transistor, with an electronically active dopant (such as an N-type dopant used to create active areas in NMOS devices, or a P-type dopant used to crea... | 08/11/2009 |
| 7557023 | Implantation of gate regions in semiconductor device fabrication A semiconductor fabrication method. The method includes providing a semiconductor structure which includes (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, and (iii) a gate electrode region on the gate dielectric layer. The gate di... | 07/07/2009 |
| 7541265 | Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle siz... | 06/02/2009 |
| 7531436 | Highly conductive shallow junction formation The invention relates to a method of forming a shallow junction. The method (100) comprises forming source/drain extension regions with a non-amorphizing tail implant (105) which is annealed conventionally (spike/RTP) and amorphizing implant which is r... | 05/12/2009 |
| 7521343 | Method of manufacturing semiconductor device It is an object to provide a method of manufacturing a semiconductor device capable of forming a MOS transistor of high performance, comprising the steps of forming a gate electrode on a semiconductor substrate via a gate-insulating film (step S1), introducin... | 04/21/2009 |
| 7501332 | Doping method and manufacturing method for a semiconductor device A doping method includes implanting first impurity ions into a semiconductor substrate, so as to form a damaged region in the vicinity of a surface of the semiconductor substrate, the first impurity ions not contributing to electric conductivity; implanting second i... | 03/10/2009 |
| 7494906 | Technique for transferring strain into a semiconductor region A dislocation region is formed by implanting a light inert species, such as hydrogen, to a specified depth and with a high concentration, and by heat treating the inert species to create “nano” bubbles, which enable a certain mechanical decoupling to underlying ... | 02/24/2009 |
| 7482254 | Apparatus and methods for thermally processing undoped and lightly doped substrates without pre-heating Apparatus for and methods of thermally processing undoped or lightly doped semiconductor wafers (30) that typically are not very absorptive of an annealing radiation beam (14) are disclosed. The apparatus (10) uses a relatively low power activat... | 01/27/2009 |
| 7482255 | Method of ion implantation to reduce transient enhanced diffusion A method of ion implantation comprises the steps of: providing a semiconductor substrate; performing a pre-amorphisation implant in the semiconductor substrate in a direction of implant at an angle in the range of 20-60° to a normal to a surface of the semiconducto... | 01/27/2009 |
| 7439158 | Strained semiconductor by full wafer bonding One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonde... | 10/21/2008 |
| 7425496 | Method for delineating a conducting element disposed on an insulating layer, device and transistor thus obtained A conducting layer is deposited on an insulating layer disposed on a substrate. A mask is formed on at least one area of the conducting layer, thus delineating in the conducting layer at least one complementary area not covered by the mask. The complementary areas o... | 09/16/2008 |
| 7422968 | Method for manufacturing a semiconductor device having silicided regions The present invention provides a method for manufacturing a semiconductor device, and a method for manufacturing an integrated circuit including the semiconductor devices. The method for manufacturing a semiconductor device (100) , among other steps, includes... | 09/09/2008 |
| 7422936 | Facilitating removal of sacrificial layers via implantation to form replacement metal gates Replacement metal gates may be formed by removing a polysilicon layer from a gate structure. The gate structure may be formed by patterning the polysilicon layer and depositing a spacer layer over the gate structure such that the spacer layer has a first polish rate... | 09/09/2008 |
| 7410887 | Controlled process and resulting device A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surfa... | 08/12/2008 |
| 7402484 | Methods for forming a field effect transistor Methods for forming a field effect transistor are disclosed. An illustrated method comprises: forming a gate electrode on a substrate; and forming a nitride layer on at least a part of the gate electrode and the substrate. ... | 07/22/2008 |
| 7378323 | Silicide process utilizing pre-amorphization implant and second spacer A gate electrode is formed on a substrate with a gate insulating layer therebetween. A liner is then deposited on sidewalls of the gate electrode. Source/drain extensions are implanted into the substrate. A first spacer is then formed on the liner. Deep source/drain... | 05/27/2008 |
| 7378335 | Plasma implantation of deuterium for passivation of semiconductor-device interfaces A method for fabricating a semiconductor-based device includes providing a substrate including a semiconductor layer, forming a gate dielectric layer on the semiconductor layer, forming a plasma including deuterium, plasma implanting deuterium from the plasma into t... | 05/27/2008 |
| 7371660 | Controlled cleaving process A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surfa... | 05/13/2008 |
| 7368358 | Method for producing field effect device that includes epitaxially growing SiGe source/drain regions laterally from a silicon body A structure, and method of fabrication, for high performance field effect devices is disclosed. The MOS structures include a crystalline Si body of one conductivity type, a strained SiGe layer epitaxially grown on the Si body serving as a buried channel for holes, a... | 05/06/2008 |
| 7355254 | Pinning layer for low resistivity N-type source drain ohmic contacts A system or apparatus including an N-type transistor structure including a gate electrode formed on a substrate and source and drain regions formed in the substrate; a contact to the source region; and a pinning layer disposed between the source region and the first... | 04/08/2008 |
| 7350181 | Set of masks, method of generating mask data and method for forming a pattern A method of generating mask data, for a set of masks used to transfer a pattern for delineating a circuit pattern of a semiconductor integrated circuit, includes preparing design data having a design pattern corresponding to the pattern to be transferred on a semico... | 03/25/2008 |
| 7338876 | Method for manufacturing a semiconductor device A method for forming a semiconductor memory device includes the steps of: implanting a dopant in a semiconductor substrate; heat treating the semiconductor substrate in an oxidizing ambient to diffuse the dopant for forming diffused regions in the semiconductor subs... | 03/04/2008 |
| 7339236 | Semiconductor device, driver circuit and manufacturing method of semiconductor device The present invention provides a semiconductor technology capable of suppressing an increase in threshold voltage of a transistor and, also, improving a withstand voltage between a source region and a drain region. Source and drain regions of a p channel type MOS tr... | 03/04/2008 |
| 7332443 | Method for fabricating a semiconductor device The present invention relates to a method for fabricating a semiconductor device. In order to provide for a high carrier mobility in an active region of the device, germanium atoms are implanted into a surface of a semiconductor substrate such that a germanium-conta... | 02/19/2008 |
| 7329583 | Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does... | 02/12/2008 |
| 7316970 | Method for forming high selectivity protection layer on semiconductor device A method for forming a resist protect layer on a semiconductor substrate includes the following steps. An isolation structure is formed on the semiconductor substrate. An original nitride layer having a substantial etch selectivity to the isolation structure is form... | 01/08/2008 |
