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| Number | Title | Issue Date |
| 8187959 | Semiconductor substrate with solid phase epitaxial regrowth with reduced junction leakage and method of producing same Method of producing a semiconductor device, comprising: a) providing a semiconductor substrate, b) making a first amorphous layer in a top layer of the semiconductor substrate by a suitable implant, the first amorphous layer having a first depth, c) implanting a fir... | 05/29/2012 |
| 8178430 | N-type carrier enhancement in semiconductors A method for generating n-type carriers in a semiconductor is disclosed. The method includes supplying a semiconductor having an atomic radius. Implanting an n-type dopant species into the semiconductor, which n-type dopant species has a dopant atomic radius. Implan... | 05/15/2012 |
| 8119507 | Lateral double-diffused metal oxide semiconductor (LDMOS) transistors Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one embodiment, an LDMOS transistor can include: (i) an n-doped deep n-well (DNW) region on a substrate; (ii) a ga... | 02/21/2012 |
| 8093145 | Methods for operating and fabricating a semiconductor device having a buried guard ring structure Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include the one or more parasitic isol... | 01/10/2012 |
| 8084341 | Semiconductor device and method for manufacturing the same The present invention provides a method for manufacturing a semiconductor device which includes a step of forming one optional impurity region in a semiconductor substrate at a place apart from the surface thereof, and in the method described above, ion implantation... | 12/27/2011 |
| 8053342 | Mask ROM device, semiconductor device including the mask ROM device, and methods of fabricating mask ROM device and semiconductor device A mask read-only memory (ROM) device, which can stably output data, includes an on-cell and an off-cell. The on-cell includes an on-cell gate structure on a substrate and an on-cell junction structure within the substrate. The off-cell includes an off-cell gate stru... | 11/08/2011 |
| 8034699 | Isolation with offset deep well implants A method implants impurities into well regions of transistors. The method prepares a first mask over a substrate and performs a first shallow well implant through the first mask to implant first-type impurities to a first depth of the substrate. The first mask is re... | 10/11/2011 |
| 7964484 | Semiconductor integrated circuit device with reduced leakage current The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage cur... | 06/21/2011 |
| 7888249 | Use of chained implants in solar cell The manufacture of solar cells is simplified and cost reduced through by performing successive ion implants, without an intervening thermal cycle. In addition to reducing process time, the use of chained ion implantations may also improve the performance of the sola... | 02/15/2011 |
| 7879703 | Method of fabricating semiconductor device for reducing thermal burden on impurity regions of peripheral circuit region A method of fabricating a semiconductor device for reducing a thermal burden on impurity regions of a peripheral circuit region includes preparing a substrate including a cell active region in a cell array region and peripheral active regions in a peripheral circuit... | 02/01/2011 |
| 7772099 | Method for manufacturing a semiconductor device having a doped silicon film A method for manufacturing a semiconductor device includes the step of depositing a doped silicon layer doped with a first-conductivity-type dopant and a non-doped silicon layer to form a layered silicon film, implanting a first-conductivity-type dopant into a porti... | 08/10/2010 |
| 7737013 | Implantation of multiple species to address copper reliability A first species and a second species are implanted into a conductor of a substrate, which may be copper. The first species and second species may be implanted sequentially or at least partly simultaneously. Diffusion of the first species within the conductor of the ... | 06/15/2010 |
| 7713853 | Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices A method for manufacturing electronic devices on a semiconductor substrate with wide band gap that includes the steps of: forming a screening structure on the semiconductor substrate to include at least a dielectric layer that leaves a plurality of areas of the semi... | 05/11/2010 |
| 7659188 | Semiconductor device and method for manufacturing the same The present invention provides a method for manufacturing a semiconductor device which includes a step of forming one optional impurity region in a semiconductor substrate at a place apart from the surface thereof, and in the method described above, ion implantation... | 02/09/2010 |
| 7642181 | LOCOS self-aligned twin well with a co-planar silicon surface A method and system for providing a twin well in a semiconductor device is described. The method and system include masking a first portion of the device such that a second portion of the device is exposed. A sacrificial layer has a first portion on the first portio... | 01/05/2010 |
| 7598161 | Method of forming transistor devices with different threshold voltages using halo implant shadowing The halo implant technique described herein employs a halo implant mask that creates a halo implant shadowing effect during halo dopant bombardment. A first transistor device structure and a second transistor device structure are formed on a wafer such that they are... | 10/06/2009 |
| 7557022 | Implantation of carbon and/or fluorine in NMOS fabrication Formation of an NMOS transistor is disclosed, where at least one of carbon, atomic fluorine and molecular fluorine (F2) are combined with implantations of at least one of arsenic, phosphorous and antimony. The dopant combinations can be used in LDD implan... | 07/07/2009 |
| 7449400 | Method of forming an isolation film in a semiconductor device The present invention relates to an isolation film in a semiconductor device and method of forming the same. An isolation film is formed in a doped region of a peripheral region, in which the doped region is isolated from a deep well region of a cell region and the ... | 11/11/2008 |
| 7432121 | Isolation process and structure for CMOS imagers A barrier implanted region of a first conductivity type formed in lieu of an isolation region of a pixel sensor cell that provides physical and electrical isolation of photosensitive elements of adjacent pixel sensor cells of a CMOS imager. The barrier implanted reg... | 10/07/2008 |
| 7419893 | Method of manufacturing semiconductor device having triple-well structure and semiconductor device fabricated This patent specification describes methods for fabricating semiconductor device having a plurality of well structures including a triple-well structure. One example of a method for fabricating semiconductor device includes forming a thermally stable film on a first... | 09/02/2008 |
| 7413968 | Method of manufacturing semiconductor device having gate electrodes of polymetal gate and dual-gate structure A silicon film is formed on a first region and a second region, respectively of a semiconductor substrate; P-type impurities are selectively ion-implanted into the silicon film in the first region; a first annealing is carried out, thereby the P-type impurities impl... | 08/19/2008 |
| 7407851 | DMOS device with sealed channel processing A method of fabricating an electronic device and a resulting electronic device. The method includes forming a pad oxide layer on a substrate, forming a silicon nitride layer over the pad oxide layer, and forming a top oxide layer over the silicon nitride layer. A fi... | 08/05/2008 |
| 7396717 | Method of forming a MOS transistor A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the... | 07/08/2008 |
| 7393752 | Semiconductor devices and method of fabrication A semiconductor having an ˜5V operational range, including a drain side enhanced gate-overlapped LDD (GOLD) and a source side halo implant region and well implant. A method in accordance with an embodiment of the invention comprises forming a gate electrode overlyi... | 07/01/2008 |
| 7393767 | Method for implanting a cell channel ion of semiconductor device A method for implanting a cell channel ion of semiconductor device is disclosed. In accordance with the method, the bit line contact region and the edge portion of the channel region adjacent to the bit line contact region in the cell region are subjected to a selec... | 07/01/2008 |
| 7390711 | MOS transistor and manufacturing method thereof A MOS transistor including a gate insulation layer and a gate electrode layer on a channel region of a semiconductor substrate. A gate spacer layer is formed on a sidewall of the electrode layer and the insulation layer. The transistor includes a deep extended sourc... | 06/24/2008 |
| 7361597 | Semiconductor device and method of fabricating the same A semiconductor device incorporating an alloy layer formed on a substrate; a gate electrode, a source electrode, and a drain electrode formed on the alloy layer at predetermined intervals therebetween; a gate insulating layer formed on the gate electrode in a gate e... | 04/22/2008 |
| 7358167 | Implantation process in semiconductor fabrication A semiconductor device is formed by performing an amorphizing ion implantation to implant dopants of a first conductivity type into a semiconductor body. The first ion implantation causes a defect area (e.g., end-of-range defects) within the semiconductor body at a ... | 04/15/2008 |
| 7352047 | Systems and methods for integration of heterogeneous circuit devices A heterogeneous device comprises a substrate and a plurality of heterogeneous circuit devices defined in the substrate. In embodiments, a plurality of heterogeneous circuit devices are integrated by successively masking and ion implanting the substrate. The heteroge... | 04/01/2008 |
| 7351637 | Semiconductor transistors having reduced channel widths and methods of fabricating same A method of forming a channel in a semiconductor device including forming an opening in a masking layer to expose a portion of an underlying semiconductor layer through the opening is provided. The method further includes disposing a screening layer and implanting a... | 04/01/2008 |
| 7341930 | Systems and methods for integration of heterogeneous circuit devices A heterogeneous device comprises a substrate and a plurality of heterogeneous circuit devices defined in the substrate. In embodiments, a plurality of heterogeneous circuit devices are integrated by successively masking and ion implanting the substrate. The heteroge... | 03/11/2008 |
| 7329599 | Method for fabricating a semiconductor device Methods are provided for semiconductor devices having low contact resistance. The method in accordance with one embodiment of the invention comprises forming an insulating layer overlying a semiconductor substrate, the semiconductor substrate having a device region ... | 02/12/2008 |
| 7314803 | Method for producing a semiconductor structure In a method for producing a semiconductor structure a semiconductor a substrate with a top surface is provided. A gate dielectric layer is provided on the top surface and on the gate dielectric layer is provided a memory cell array region with a first plurality of g... | 01/01/2008 |
| 7309636 | High-voltage metal-oxide-semiconductor device and method of manufacturing the same The present invention pertains to a high-voltage MOS device. The high-voltage MOS device includes a substrate, a first well, a first field oxide layer enclosing a drain region, a second field oxide enclosing a source region, and a third field oxide layer encompassin... | 12/18/2007 |
| 7300848 | Semiconductor device having a recess gate for improved reliability A semiconductor device having a recess gate is formed by first forming a recess below the upper surface of the substrate. A spacer is formed at each sidewall of the recess. An impurity doping area is formed in a source area. A first LDD area is formed in a drain are... | 11/27/2007 |
| 7294557 | Method of increasing the area of a useful layer of material transferred onto a support A method for transferring a first substrate to a second substrate. First and second front faces of first and second substrates, respectively, are molecularly bonded to each other to provide a composite structure. The first front face has a first outline, the second ... | 11/13/2007 |
| 7288418 | Process for treating substrates for the microelectronics industry, and substrates obtained by this process A process for treating substrates for the microelectronics or optoelectronics industry, wherein the substrates include on at least one of their faces a working layer in which components are intended to be formed. The process includes a step of annealing under a redu... | 10/30/2007 |
| 7285482 | Method for producing solid-state imaging device A method is provided for producing a solid-state imaging device in which a plurality of pixels are arranged two-dimensionally so as to form a photosensitive region, each of the pixels including a photodiode that photoelectrically converts incident light to store a s... | 10/23/2007 |
| 7285449 | Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source /drain and semiconductor device manufactured by the method A gate electrode made of semiconductor is formed on the partial surface area of a semiconductor substrate. A mask member is formed on the surface of the semiconductor substrate in an area adjacent to the gate electrode. Impurities are implanted into the gate electro... | 10/23/2007 |
| 7271079 | Method of doping a gate electrode of a field effect transistor A method of fabricating a structure and fabricating related semiconductor transistors and novel semiconductor transistor structures. The method of fabricating the structure includes: providing a substrate having a top surface; forming an island on the top surface of... | 09/18/2007 |
