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| Number | Title | Issue Date |
| 8124509 | Method of forming porous diamond films for semiconductor applications The porosity of a diamond film may be increased and its dielectric constant lowered by exposing a film containing sp3 hybridization to ion implantation. The implantation produces a greater concentration of sp2 hybridizations. The sp2 | 02/28/2012 |
| 8039375 | Shallow junction formation and high dopant activation rate of MOS devices A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; implanting carbon into the semiconductor substrate; and implanting an n-type impurity into the semiconductor substrate... | 10/18/2011 |
| 8003503 | Method of integrating stress into a gate stack A method of forming a semiconductor device includes providing a dielectric film on a substrate, depositing a metal-containing gate electrode film over the dielectric film, and modifying a surface layer of the metal-containing gate electrode film by exposing the meta... | 08/23/2011 |
| 7923359 | Reduction of sheet resistance of phosphorus implanted poly-silicon There is a process for reducing the sheet resistance of phosphorus-implanted poly-silicon. In an example embodiment, there is an MOS transistor structure. The structure has a gate region, drain region and a source region. A method for reducing the sheet resistance o... | 04/12/2011 |
| 7838401 | Semiconductor device and manufacturing method thereof A semiconductor device comprises a field-effect transistor arranged in a semiconductor substrate, which transistor has a gate electrode, source/drain impurity diffusion regions, and carbon layers surrounding the source/drain impurity diffusion regions. Each of the c... | 11/23/2010 |
| 7754590 | Method of manufacturing a semiconductor device comprising a field stop zone at a specific depth Some embodiments of the invention relate to manufacturing a semiconductor device with an implantation layer on a semiconductor substrate including a method of manufacturing such an implantation layer, wherein said implantation layer is formed in an implantation step... | 07/13/2010 |
| 7422936 | Facilitating removal of sacrificial layers via implantation to form replacement metal gates Replacement metal gates may be formed by removing a polysilicon layer from a gate structure. The gate structure may be formed by patterning the polysilicon layer and depositing a spacer layer over the gate structure such that the spacer layer has a first polish rate... | 09/09/2008 |
| 7417248 | Transistor with shallow germanium implantation region in channel A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a channel region of a transistor at a low energy level, forming an amorphous germanium implantation region... | 08/26/2008 |
| 7396747 | Hetero-integrated strained silicon n- and p-MOSFETs The present invention provides semiconductor structures and a method of fabricating such structures for application of MOSFET devices. The semiconductor structures are fabricated in such a way so that the layer structure in the regions of the wafer where n-MOSFETs a... | 07/08/2008 |
| 7381584 | CMOS image sensor and a method for fabricating the same A CMOS image sensor and method for fabricating the same is disclosed that reconditions, repairs and/or protects a surface of a photodiode area and improves characteristics of the image sensor. The method includes forming a photodiode area and a plurality of transist... | 06/03/2008 |
| 7371628 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method mainly involves steps of forming at least one first patterned high stress layer below a silicon substrate, then forming a semiconductor device onto the substrate, and forming at least one second... | 05/13/2008 |
| 7358161 | Methods of forming transistor devices associated with semiconductor-on-insulator constructions The invention encompasses a method of forming a semiconductor on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass. The insulative mass comprises silicon dioxide. A band of material is fo... | 04/15/2008 |
| 7338822 | LED fabrication via ion implant isolation A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, an... | 03/04/2008 |
| 7316978 | Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the prot... | 01/08/2008 |
| 7303967 | Method for fabricating transistor of semiconductor device Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion implantation process with respect to the substrate, thereby forming an... | 12/04/2007 |
| 7304334 | Silicon carbide bipolar junction transistors having epitaxial base regions and multilayer emitters and methods of fabricating the same Bipolar junction transistors (BJTs) are provided including silicon carbide (SiC) substrates. An epitaxial SiC base region is provided on the SiC substrate. The epitaxial SiC base region has a first conductivity type. An epitaxial SiC emitter region is also provided ... | 12/04/2007 |
| 7294527 | Method of forming a memory cell The invention relates to the fabrication of a resistance variable material cell or programmable metallization cell. The processes described herein can form a metal-rich metal chalcogenide, such as, for example, silver-rich silver selenide. Advantageously, the proces... | 11/13/2007 |
| 7294858 | Semiconductor device and method of manufacturing the same A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy an... | 11/13/2007 |
| 7276431 | Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does... | 10/02/2007 |
| 7273797 | Methods of forming semiconductor-on-insulator constructions The invention encompasses a method of forming a semiconductor-on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass. The insulative mass comprises silicon dioxide. A band of material is fo... | 09/25/2007 |
| 7273800 | Hetero-integrated strained silicon n- and p-MOSFETs The present invention provides semiconductor structures and a method of fabricating such structures for application of MOSFET devices. The semiconductor structures are fabricated in such a way so that the layer structure in the regions of the wafer where n-MOSFETs a... | 09/25/2007 |
| 7268065 | Methods of manufacturing metal-silicide features A method of manufacturing a microelectronic device including forming an opening in a dielectric layer located over a substrate, forming a semi-conductive layer substantially conforming to the opening, and forming a conductive layer substantially conforming to the se... | 09/11/2007 |
| 7262105 | Semiconductor device with silicided source/drains In a semiconductor device, a relatively deep germanium implant and activation thereof precedes deposition of the nickel for nickel silicide formation. The activation of the germanium causes the lattice constant in the region of the implant to be increased over the l... | 08/28/2007 |
| 7262434 | Semiconductor device with a silicon carbide substrate and ohmic metal layer A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy an... | 08/28/2007 |
| 7250313 | Method of detecting un-annealed ion implants A current-voltage response of at least one site of a semiconductor wafer where ions have been implanted in the semiconducting material of the semiconductor wafer is measured prior to annealing the semiconductor wafer. From the measured response, a determination is m... | 07/31/2007 |
| 7226848 | Substrate treating method and production method for semiconductor device A method of hydrogen sintering a substrate including a semiconductor device formed thereon comprises the steps of exciting a processing gas comprising a noble gas and a hydrogen gas to form a plasma comprising hydrogen radicals and hydrogen ions, and exposing the su... | 06/05/2007 |
| 7179731 | Hypercontacting The invention, called hypercontacting, achieves a very high level of activated doping at an exposed surface region of a compound semiconductor. This enables production of low resistance ohmic contacts by creating a heavily doped region near the contact. Such region ... | 02/20/2007 |
| 7179748 | Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the prot... | 02/20/2007 |
| 7163878 | Ultra-shallow arsenic junction formation in silicon germanium In one aspect, the present invention provides a method of forming junctions in a silicon-germanium layer (20). In this particular embodiment, the method comprises implanting a dopant (80) into the silicon-germanium layer (20) and implanting fluo... | 01/16/2007 |
| 7145104 | Silicon layer for uniformizing temperature during photo-annealing An apparatus and method for uniformizing the temperature distribution across a semiconductor wafer during radiation annealing of process regions formed in the wafer is disclosed. The method includes forming a silicon layer atop the upper surface of the wafer and irr... | 12/05/2006 |
| 7144825 | Multi-layer dielectric containing diffusion barrier material A method for forming a dielectric is disclosed. The method comprises forming a first dielectric layer over semiconductor material. A diffusion barrier material is introduced into the first dielectric layer. Lastly, a second dielectric layer is formed over the first ... | 12/05/2006 |
| 7118970 | Methods of fabricating silicon carbide devices with hybrid well regions MOS channel devices and methods of fabricating such devices having a hybrid channel are provided. Exemplary devices include vertical power MOSFETs that include a hybrid well region of silicon carbide and methods of fabricating such devices are provided. The hybrid w... | 10/10/2006 |
| 7118979 | Method of manufacturing transistor having germanium implant region on the sidewalls of the polysilicon gate electrode The present invention provides a transistor 100 having a germanium implant region 170 located therein, a method of manufacture therefor, and an integrated circuit including the aforementioned transistor. The transistor 100, in one embodiment, in... | 10/10/2006 |
| 7101746 | Method to lower work function of gate electrode through Ge implantation A method for forming selective P type and N type gates is described. A gate oxide layer is grown overlying a semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer. Germanium ions are implanted into a portion of the polysilicon laye... | 09/05/2006 |
| 7098111 | Manufacturing method of semiconductor integrated circuit device A manufacturing technology of a MOSFET having a shallow junction and a source and drain of a low resistance is provided. After having ion-implanted an As on the surface of a p type well forming a gate electrode, a surface protection layer and an energy absorber laye... | 08/29/2006 |
| 7094671 | Transistor with shallow germanium implantation region in channel A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a channel region of a transistor at a low energy level, forming an amorphous germanium implantation region... | 08/22/2006 |
| 7078300 | Thin germanium oxynitride gate dielectric for germanium-based devices A method for producing thin, below 6 nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-base... | 07/18/2006 |
| 7074643 | Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region or a first conductivity type, a buried silicon carbide region... | 07/11/2006 |
| 7052944 | Thin-film transistor and method of manufacture thereof A thin-film transistor is provided which prevents the degradation of transistor characteristics due to ion channeling. A thin-film transistor (10) includes thin crystalline silicon (2) including source and drain regions (2a) and a channel... | 05/30/2006 |
| 7045073 | Pre-etch implantation damage for the removal of thin film layers A method for anisotropically and selectively removing a dielectric thin film layer from a substrate layer is disclosed, wherein the dielectric layer is subjected to ion implantation prior to wet etching. This method may be applied adjacent to a structure such as a g... | 05/16/2006 |