Class 438/519 - Including multiple implantation steps

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process having plural steps of implanting ions, at least
No. of patents: 132
Last issue date: 05/29/2012

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Number	Title	Issue Date
8187957	Field-effect transistor and method for fabricating the same A field-effect transistor that increases the operation speeds of complementary field-effect transistors. Each of an nMOSFET and a pMODFET has a Ge channel and source and drain regions formed of an NiGe layer. The height of Schottky barriers formed at a junction betw...	05/29/2012
8163636	Method of preparing P-type doped ZnO or ZnMgO Method of preparing p-type doped ZnO or p-type doped ZnMgO, in which the following successive steps are carried out: a) implantation of O+ oxygen ions in an n-type doped ZnO or an n-type doped ZnMgO; b) first annea...	04/24/2012
7883999	Method for increasing the penetration depth of material infusion in a substrate using a gas cluster ion beam A method for infusing material below the surface of a substrate is described. The method comprises modifying a surface condition of a surface on a substrate to produce a modified surface layer, and thereafter, infusing material into the modified surface in the subst...	02/08/2011
7696073	Method of co-doping group 14 (4B) elements to produce ZnTe system compound semiconductor single crystal The present invention relates to a method for producing an n-type ZnTe system compound semiconductor single crystal having high carrier concentration and low resistivity, the ZnTe system compound semiconductor single crystal, and a semiconductor device produced by u...	04/13/2010
7557021	Highly doped gate electrode made by rapidly melting and resolidifying the gate electrode The present invention provides, in one embodiment, a method for fabricating a microelectronic device. The method comprises implanting a dopant into a gate electrode located on a substrate. The gate electrode has a melting point below a melting point of the substrate...	07/07/2009
7410860	Method of manufacturing lateral MOSFET structure of an integrated circuit having separated device regions Apparatus and Methods for the self-alignment of separated regions in a lateral MOSFET of an integrate circuit. In one embodiment, a method comprising, forming a relatively thin dielectric layer on a surface of a substrate. Forming a first region of relatively thick ...	08/12/2008
7396717	Method of forming a MOS transistor A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the...	07/08/2008
7390711	MOS transistor and manufacturing method thereof A MOS transistor including a gate insulation layer and a gate electrode layer on a channel region of a semiconductor substrate. A gate spacer layer is formed on a sidewall of the electrode layer and the insulation layer. The transistor includes a deep extended sourc...	06/24/2008
7344964	Image sensor with improved charge transfer efficiency and method for fabricating the same An image sensor includes: a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a first depth from a surface portion of the semiconductor layer; a first spacer formed on each sidewall of the gate structure;...	03/18/2008
7338876	Method for manufacturing a semiconductor device A method for forming a semiconductor memory device includes the steps of: implanting a dopant in a semiconductor substrate; heat treating the semiconductor substrate in an oxidizing ambient to diffuse the dopant for forming diffused regions in the semiconductor subs...	03/04/2008
7320917	Semiconductor device and method for manufacturing the same Gate length is 110 nm±15 nm or shorter (130 nm or shorter in a design rule) or an aspect ratio of an area between adjacent gate electrode structures thereof (ratio of the height of the gate electrode structure to the distance between the gate electrode structures) ...	01/22/2008
7276431	Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does...	10/02/2007
7268065	Methods of manufacturing metal-silicide features A method of manufacturing a microelectronic device including forming an opening in a dielectric layer located over a substrate, forming a semi-conductive layer substantially conforming to the opening, and forming a conductive layer substantially conforming to the se...	09/11/2007
7253072	Implant optimization scheme The present invention provides a method for implanting ions in a substrate and a method for manufacturing an integrated circuit. The method for implanting ions in a substrate, among other steps, including placing a substrate (410) on an implant platen (405...	08/07/2007
7241699	Wide bandgap semiconductor device construction The invention includes methods for precisely and accurately etching layers of wide bandgap semiconductor material. According to one aspect of the invention, the method includes providing a multi-layer laminate including at least a first and second layer of wide band...	07/10/2007
7235469	Semiconductor device and method for manufacturing the same A semiconductor device suitable for the miniaturization and comprising properly controlled Si/SiGe gate electrode comprises an insulator formed on a semiconductor substrate, a first gate electrode formed on the insulator and including silicon-germanium, wherein a ge...	06/26/2007
7235470	Semiconductor device and manufacturing method thereof A semiconductor device is provided, which aims to reduce the standby power thereof by reducing the leak between a body and a drain with restraining the effect on a threshold voltage, in order to actualize the highly reliable semiconductor device. When extension regi...	06/26/2007
7232744	Method for implanting dopants within a substrate by tilting the substrate relative to the implant source The present invention provides a method for implanting a dopant in a substrate and a method for manufacturing a semiconductor device. The method for implanting a dopant, among other steps, including tilting a substrate (310) located on or over an implant plat...	06/19/2007
7221010	Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors Silicon carbide metal-oxide semiconductor field effect transistors (MOSFETs) may include an n-type silicon carbide drift layer, a first p-type silicon carbide region adjacent the drift layer and having a first n-type silicon carbide region therein, an oxide layer on...	05/22/2007
7214627	Graded junction termination extensions for electronic devices A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconducto...	05/08/2007
7205202	Semiconductor device and method for regional stress control Mechanical stress control may be achieved using materials having selected elastic moduli. These materials may be selectively formed by implantation, may be provided as a plurality of buried layers interposed between the substrate and the active area, and may be form...	04/17/2007
7202133	Structure and method to form source and drain regions over doped depletion regions A structure and method of reducing junction capacitance of a source/drain region in a transistor. A gate structure is formed over on a first conductive type substrate. We perform a doped depletion region implantation by implanting ions being the second conductive ty...	04/10/2007
7176108	Method of detaching a thin film at moderate temperature after co-implantation A method of detaching a thin film from a source substrate comprises the steps of implanting ions or gaseous species in the source substrate so as to form therein a buried zone weakened by the presence of defects; and splitting in the weakened zone leading to the det...	02/13/2007
7172933	Recessed polysilicon gate structure for a strained silicon MOSFET device A method of forming a channel region for a MOSFET device in a strained silicon layer via employment of adjacent and surrounding silicon-germanium shapes, has been developed. The method features simultaneous formation of recesses in a top portion of a conductive gate...	02/06/2007
7148131	Method for implanting ions in a semiconductor A method for implanting ions in a semiconductor is disclosed. The method includes implanting indium ions into a substrate of a semiconductor material of the semiconductor device for a first time period. The method also includes implanting boron ions into the substra...	12/12/2006
7138322	Semiconductor device and fabrication method therefor An n-type channel diffused layer and an n-type well diffused layer are formed in the top portion of a semiconductor substrate, and a gate insulating film and a gate electrode are formed on the semiconductor substrate. Using the gate electrode as a mask, boron and ar...	11/21/2006
7135393	Semiconductor device manufacture method capable of supressing gate impurity penetration into channel A gate electrode is formed above an n-type well including an n-type threshold voltage adjustment region, ions of p-type impurity are implanted with a low acceleration energy to form extension regions in the n-type well on both sides of the gate electrode, side wall ...	11/14/2006
7129141	Method for manufacturing a semiconductor device having a low junction leakage current A method for manufacturing a DRAM device includes the step of implanting phosphor at a specified dosage and heat treating the implanted phosphor for diffusion thereof to form source/drain regions, and implanting fluorine into the source/drain regions and heat treati...	10/31/2006
7122417	Methods for fabricating metal-oxide-semiconductor field effect transistors using gate sidewall spacers Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) is fabricated by forming gate spacers on both sidewalls of a gate pattern in a semiconductor substrate including first and second regions. Then, a first impurity region is formed in the semiconductor substra...	10/17/2006
7118983	Method of fabricating semiconductor device An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of ...	10/10/2006
7118970	Methods of fabricating silicon carbide devices with hybrid well regions MOS channel devices and methods of fabricating such devices having a hybrid channel are provided. Exemplary devices include vertical power MOSFETs that include a hybrid well region of silicon carbide and methods of fabricating such devices are provided. The hybrid w...	10/10/2006
7109099	End of range (EOR) secondary defect engineering using substitutional carbon doping A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer...	09/19/2006
7091114	Semiconductor device and method of manufacturing the same Disclosed is a method for manufacturing a semiconductor device comprising implanting ions of an impurity element into a semiconductor region, implanting, into the semiconductor region, ions of a predetermined element which is a group IV element or an element having ...	08/15/2006
7074643	Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region or a first conductivity type, a buried silicon carbide region...	07/11/2006
7067176	Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment Silicon carbide structures are fabricated by fabricating a nitrided oxide layer on a layer of silicon carbide and annealing the nitrided oxide layer in an environment containing hydrogen. Such a fabrication of the nitrided oxide layer may be provided by forming the ...	06/27/2006
7067903	Heat spreader and semiconductor device and package using the same A semiconductor device and package has a heat spreader directly disposed on the reverse surface of the semiconductor device. This heat spreader includes a diamond layer or a layer containing diamond and ceramics such as silicon carbide and aluminum nitride. The heat...	06/27/2006
7063991	Methods of determining characteristics of doped regions on device wafers, and system for accomplishing same Disclosed herein are various methods of determining characteristics of doped regions on device wafers, and a system for accomplishing same. In one illustrative embodiment, the method includes providing a device substrate comprising a plurality of masked areas, a plu...	06/20/2006
7052929	Solid state image pickup device capable of suppressing smear A driving method for a solid state image pickup device, having four or more transfer stages as one transfer unit, includes reading signal charge from the charge accumulation regions to the vertical charge transfer channels. The reading step includes (b-1) applying t...	05/30/2006
7049199	Method of ion implantation for achieving desired dopant concentration A method for forming a plurality of MOSFETs wherein each one of the MOSFET has a unique predetermined threshold voltage. A doped well or tub is formed for each MOSFET. A patterned mask is then used to form a material line proximate each semiconductor well, wherein t...	05/23/2006
7033950	Graded junction termination extensions for electronic devices A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconducto...	04/25/2006

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Class 438/519 - Including multiple implantation steps