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| Number | Title | Issue Date |
| 7696071 | Group III nitride based semiconductor and production method therefor The invention provides a method for producing a group III nitride based semiconductor having a reduced number of crystal defects. A GaN layer 2 is epitaxially grown on a sapphire substrate 1 having C-plane as a main plane (FIG. 1A). Then,... | 04/13/2010 |
| 7439164 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on... | 10/21/2008 |
| 7364958 | CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding A method in which semiconductor-to-semiconductor direct wafer bonding is employed to provide a hybrid substrate having semiconductor layers of different crystallographic orientations that are separated by a conductive interface is provided. Also provided are the hyb... | 04/29/2008 |
| 7361563 | Methods of fabricating a semiconductor device using a selective epitaxial growth technique Methods of fabricating a semiconductor device using a selective epitaxial growth technique include forming a recess in a semiconductor substrate. The substrate having the recess is loaded into a reaction chamber. A semiconductor source gas and a main etching gas are... | 04/22/2008 |
| 7235876 | Semiconductor device having metallic plate with groove A semiconductor device includes: first and second metallic plates, each of which includes a heat radiation surface and an inner surface; a semiconductor element between the metallic plates; a block between the second metallic plate and the semiconductor element; a s... | 06/26/2007 |
| 7208396 | Permanent adherence of the back end of a wafer to an electrical component or sub-assembly A plurality of successive layers are firmly adhered to one another and to a wafer surface and an electrical component or sub-assembly even when the wafer surface is not even and the layers are bent. The wafer surface is initially cleaned by an ion bombardment of an ... | 04/24/2007 |
| 7189592 | Manufacturable single-chip hydrogen sensor A robust single-chip hydrogen sensor and a method for fabricating such a sensor. By utilizing an interconnect metallization material that is the same or similar to the material used to sense hydrogen, or that is capable of withstanding an etchant used to pattern a h... | 03/13/2007 |
| 7179727 | Formation of lattice-tuning semiconductor substrates A method of forming a lattice-tuning semiconductor substrate comprises the steps of defining parallel strips of a Si surface by the provision of spaced parallel oxide walls (2) on the surface, selectively growing a first SiGe layer on the strips such that fir... | 02/20/2007 |
| 7151035 | Semiconductor device and manufacturing method thereof A sidewall-insulation film 9 is provided on a side surface of a first opening portion 8a formed in a base extraction electrode 5B of a hetero-junction bipolar transistor, and a portion of the sidewall-insulation film 9 extends so a... | 12/19/2006 |
| 7142759 | Surface waveguide and method of manufacture A surface waveguide is disclosed. In the illustrative embodiment, the waveguide has a core and an upper and lower cladding. The core has a thickness that is greater than the critical thickness of the material that composes the core. This is achieved by depositing/gr... | 11/28/2006 |
| 7129154 | Method of growing semiconductor nanowires with uniform cross-sectional area using chemical vapor deposition A nanowire of a semiconductor material and having a uniform cross-sectional area along its length is grown using a chemical vapor deposition process. In the method, a substrate is provided, a catalyst nanoparticle is deposited on the substrate, a gaseous precursor m... | 10/31/2006 |
| 7122449 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on... | 10/17/2006 |
| 7063751 | Semiconductor substrate formed by epitaxially filling a trench in a semiconductor substrate with a semiconductor material after smoothing the surface and rounding the corners A trench is formed in a semiconductor substrate through a mask composed of a silicon oxide film formed on the semiconductor substrate. Then, an edge portion at an opening portion of the mask is etched so that the width of the mask opening width is greater than the w... | 06/20/2006 |
| 7060597 | Manufacturing method for a silicon substrate having strained layer A manufacturing method for a silicon substrate having a strained layer, has steps of forming a plurality of atomic steps having a height of 0.1 nm or more on the surface of a silicon substrate, forming a plurality of terraces having a width of 0.1 μm or more betwee... | 06/13/2006 |
| 7045434 | Semiconductor device and method for manufacturing the same A method for manufacturing a semiconductor substrate including a mask aligning trench. The method includes forming the mask aligning trench and an element partitioning trench. The element partitioning and mask aligning trenches are filled with insulation. The insula... | 05/16/2006 |
| 7029988 | Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium A method and device are provided for shallow trench isolation for a silicon wafer containing silicon-germanium. In one example, the method comprises forming a trench region in a silicon-germanium layer of a semiconductor substrate containing a single crystal silicon... | 04/18/2006 |
| 7018912 | Fabrication method of nitride semiconductors and nitride semiconductor structure fabricated thereby Disclosed is a method of fabricating nitride semiconductors in a MOCVD reactor. GaN is first deposited on an inner wall of the MOCVD reactor, and a sapphire substrate is loaded into the MOCVD reactor. The sapphire substrate is heated and etching gas is injected into... | 03/28/2006 |
| 6946371 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on... | 09/20/2005 |
| 6917096 | Semiconductor device and method of manufacturing substrate A semiconductor device comprises a base substrate, a silicon oxide layer formed on the base substrate, a first semiconductor layer formed on the silicon oxide layer, the first semiconductor layer including an SiGe layer with a Ge concentration not less than 30 atomi... | 07/12/2005 |
| 6878606 | Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium A method and device are provided for shallow trench isolation for a silicon wafer containing silicon-germanium. In one example, the method comprises forming a trench region in a silicon-germanium layer of a semiconductor substrate containing a single crystal silicon... | 04/12/2005 |
| 6872967 | Nitride-based semiconductor device and manufacturing method thereof In the manufacture of a semiconductor laser device, sequentially grown on a sapphire substrate in the following order are a buffer layer, a first undoped GaN layer, a first super lattice defect reducing layer, a second undoped GaN layer, a second super lattice defec... | 03/29/2005 |
| 6746925 | High-k dielectric bird's beak optimizations using in-situ O2 plasma oxidation In a method of forming an integrated circuit device, sidewall oxides are formed by plasma oxidation on the patterned gate. This controls encroachment beneath a dielectric layer underlying the patterned gate. The patterned gate is oxidized using in-situ O2 | 06/08/2004 |
| 6602793 | Pre-clean chamber An improved pre-clean chamber of a semiconductor processing system minimizes the generation of particulates during processing, thereby decreasing contamination levels that can adversely affect plasma vapor deposition film properties while also decreasing ... | 08/05/2003 |
| 6528395 | Method of fabricating compound semiconductor device and apparatus for fabricating compound semiconductor device A method of fabricating a compound semiconductor device having an ohmic electrode of a low contact potential includes a first cleaning step of heating a compound semiconductor substrate containing a first conductivity type impurity in a temperature range ... | 03/04/2003 |
| 6436827 | Fabrication method of a semiconductor device To form a wiring electrode having excellent contact function, in covering a contact hole formed in an insulating film, a film of a wiring material comprising aluminum or including aluminum as a major component is firstly formed and on top of the film, a f... | 08/20/2002 |
| 6387781 | Method of forming three-dimensional semiconductors structures Silicon and metal are coevaporated onto a silicon substrate in a molecular beam epitaxy system with a larger than stoichiometric amount of silicon so as to epitaxially grow columns of metal silicide embedded in a matrix of single crystal, epitaxially grow... | 05/14/2002 |
| 6383940 | Exposure method and apparatus A method of exposing a substrate to a pattern of a reticle by synchronously scanning the reticle and the substrate in a direction relative to a slit-shaped illumination area which is formed on the reticle. The method includes steps of providing a reticle ... | 05/07/2002 |
| 6337239 | Layer configuration with a material layer and a diffusion barrier which blocks diffusing material components and process for producing a diffusion barrier A layer configuration includes a material layer and a diffusion barrier which blocks diffusing material components. The barrier is disposed in the vicinity of a layer boundary of the material layer and is formed predominantly in grain boundaries of the ma... | 01/08/2002 |
| 6294443 | Method of epitaxy on a silicon substrate comprising areas heavily doped with boron A method of vapor phase epitaxy deposition of silicon on a silicon substrate on or in which exist areas containing dopants at high concentration, among which is boron, while avoiding a selfdoping of the epitaxial layer by boron, including the step of intr... | 09/25/2001 |
| 6100161 | Method of fabrication of a raised source/drain transistor A method of fabricating a transistor, comprising the following steps. A silicon semiconductor substrate having a pad oxide portion within an active area is provided. A polysilicon layer is deposited over the silicon semiconductor substrate and over the pa... | 08/08/2000 |
| 6074936 | Method of fabricating a quantum device A method of fabricating quantum wire structures and devices, and quantum dot structures and devices comprise steps of: depositing an insulating layer on a semiconductor substrate, forming a line patterns and a square patterns in an insulating layer, formi... | 06/13/2000 |
| 6033995 | Inverted layer epitaxial liftoff process The invention relates to a method for integrating semiconductor device epilayers with arbitrary host substrates, where an indium gallium arsenide etch-stop layer (34) is deposited on an indium phosphide growth substrate (32) and device epilayers (36, 38) ... | 03/07/2000 |
| 6030887 | Flattening process for epitaxial semiconductor wafers Process for the preparation of an epitaxial wafer having a total thickness variation and/or site total indicated reading of less than about 1.0 μms. The distance between the front and back surfaces of the epitaxial wafer at discrete positions on the fron... | 02/29/2000 |
| 5916822 | Method of etching a substrate by means of chemical beams In order to facilitate resuming molecular beam epitaxy after etching a substrate or an epitaxial layer, the etching method is implemented in an ultra-high vacuum, and it consists in producing at least two simultaneous chemical beams converging towards the... | 06/29/1999 |
| 5895248 | Manufacture of a semiconductor device with selectively deposited semiconductor zone A method of a manufacturing a semiconductor device whereby a layer of insulating material and a layer of polycrystalline silicon are provided on a surface of a monocrystalline wafer. A window is then provided in the layer of polycrystalline silicon and a ... | 04/20/1999 |
| 5882950 | Fabrication method for horizontal direction semiconductor PN junction array A fabrication method for a horizontal direction semiconductor PN junction array which can be achieved when an epitaxial layer is grown by a metalorganic chemical vapor deposition (MOCVD method) by introducing (or doping) a small amount of CCl4 ... | 03/16/1999 |
| 5877071 | Masking methods during semiconductor device fabrication A method of removing an oxide mask during fabrication of semiconductor devices which includes providing a providing a III-V compound semiconductor substrate having a surface, the surface having a growth area and a masked area masked by an oxide film forme... | 03/02/1999 |
| 5834331 | Method for making III-Nitride laser and detection device A p-i-n structure for use in photoconductors and diodes is disclosed, being formed of an Alx Ga1-x N alloy (X=0.fwdarw.1) with Iny Ga1-Y N (Y=0.fwdarw.1) which as grown by MOCVD procedure with the p-type layer a... | 11/10/1998 |
| 5817538 | Method of making quantum box semiconductor device A semiconductor device having: an underlie having a semiconductor surface capable of growing thereon single crystal; and a first semiconductor layer, the first semiconductor layer including: a first region of group III-V compound semiconductor epitaxially... | 10/06/1998 |
| 5656540 | Semiconductor crystal growing method On a surface of a p-type GaAs (111)B substrate 11, a mesa groove is formed along a [211]A direction. TDMAAs as a group V material and TMGa as a group III material are supplied at 8×10-3 Pa and 8×10-4 Pa, respectively, to grow n-typ... | 08/12/1997 |
