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| Number | Title | Issue Date |
| 7341844 | Methods for diagnosing autism The invention relates to the use of Reelin as a marker for diagnosing psychiatric conditions. The disclosed tools and techniques can facilitate the diagnosis of psychiatric disorders including major depression, bipolar disorder, schizophrenia and autism. ... | 03/11/2008 |
| 7282778 | Chemical sensor using chemically induced electron-hole production at a Schottky barrier Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential f... | 10/16/2007 |
| 7091130 | Method of forming a nanocluster charge storage device A plurality of memory cell devices is formed by using an intermediate dual polysilicon-nitride control electrode stack overlying nanoclusters. The stack includes a first-formed polysilicon-nitride layer and a second-formed polysilicon-containing layer. The second-fo... | 08/15/2006 |
| 6972429 | Chalcogenide random access memory and method of fabricating the same A method of fabricating a chalcogenide random access memory (CRAM) is provided. The method is to provide a substrate having a bottom electrode thereon and then form a chalcogenide film and a patterned mask corresponding to the bottom electrode sequentially over the ... | 12/06/2005 |
| 6884700 | Method of manufacturing device, device, and electronic apparatus A method of manufacturing a device comprising individual thin films including a silicon film, a gate insulating film, a conductive film for a gate electrode, an interlayer insulating film, and a conductive film for an electrode and wiring, comprising: a step of appl... | 04/26/2005 |
| 6429035 | Method of growing silicon crystal in liquid phase and method of producing solar cell A method of growing single crystal silicon in a liquid phase comprises preparing a melt by dissolving a solid of silicon containing boron, aluminum, phosphorus or arsenic at a predetermined concentration into indium melted in a carbon boat or a quartz cru... | 08/06/2002 |
| 6413791 | Epitaxial wafer and manufacturing method thereof as well as light-emitting diode with enhanced luminance An epitaxial semiconductor crystal plate or wafer capable of attaining increased reliability with enhanced luminance, a manufacturing method thereof, as well as a light-emitting diode (LED). It has been found that epitaxial wafers with enhanced illuminanc... | 07/02/2002 |
| 6395653 | Semiconductor wafer with crystal lattice defects, and process for producing this wafer A semiconductor wafer has a front side 1, a back side 2, a top layer 3, a bottom layer 4, an upper inner layer 5 lying beneath the top layer 3, an lower inner layer 6 lying above the bottom layer 4, a central region 7 between the layers 5 and 6, and an un... | 05/28/2002 |
| 6228181 | Making epitaxial semiconductor device An epitaxial semiconductor wafer characterized by making the P-N junction face which having either flat or uneven face in a manner of uniformed thickness from the top surface, due to making a P or N type first layer by the Chemical Vapor Deposition on the... | 05/08/2001 |
| 6215151 | Methods of forming integrated circuitry and integrated circuitry Integrated circuitry and methods of forming integrated circuitry are described. In one implementation, a common masking step is utilized to provide source/drain diffusion regions and halo ion implantation or dopant regions relative to the source/drain reg... | 04/10/2001 |
| 6171930 | Device isolation structure and device isolation method for a semiconductor power integrated circuit The present invention relates to a device isolation structure and a device solation method in a semiconductor power IC. The device isolation structure according to the present invention includes: a semiconductor substrate including a high voltage region a... | 01/09/2001 |
| 6100167 | Process for the removal of copper from polished boron doped silicon wafers A process for removing copper from a boron doped, polished silicon wafer which contains copper on its polished surface and in its interior. In the process, the wafer is annealed at a temperature of at least about 75° C. to increase the concentration of c... | 08/08/2000 |
| 5744396 | Semiconductor device formed on a highly doped N+ substrate A method for fabricating semiconductor substrates with resistivity below 0.02 ohm-cm is provided. This low resistivity is achieved by doping a silicon melt with a phosphorus concentrations above 1×1018. The silicon melt is also doped with a ge... | 04/28/1998 |
| 5196369 | Method of producing a light emitting diode array device A method of fabricating light emitting diode array devices is provided, said method comprising the steps of layering through crystal growth the second semiconductor layer with an impurity serving as the diffusion source on the first semiconductor layer, r... | 03/23/1993 |
| 5169799 | Method for forming a doped ZnSe single crystal A method of forming a ZnSe single crystal. The method includes placing a piece of ZnSe polycrystal in a sealed reactor tube with its atmosphere formed of certain gases. The reactor tube is moved through different temperature zones to convert the polycryst... | 12/08/1992 |
| 5106763 | Method of fabricating solar cells A method and apparatus for producing crystalline substrates for use in fabricating solid state electronic devices. A hollow crystalline body is grown from a melt containing a dopant and a P-N junction is formed in said crystalline body as it is being grow... | 04/21/1992 |
| 5051376 | Method for producing semiconductor device and semiconductor device produced thereby A method for producing a semiconductor device comprises the steps of: preparing a IIIb -Vb group compound single crystalline semiconductor substrate produced by a liquid encapsulated Czochralski process, the single crystalline semico... | 09/24/1991 |
| 5047355 | Semiconductor diode and method for making it A semiconductor diode has three adjacent regions. The doped regions are doped in the same manner and are separated from one another by a third, intrinsic region. The intrinsic region is dimensioned such that upon application of a specific external voltage... | 09/10/1991 |
| 4978636 | Method of making a semiconductor diode High voltage (200-400 volts) Zener diodes having much improved resistance to degradation under 150° C. HTRB are obtained by a junction passivation comprising a thermal oxide next to the silicon, covered by a TEOS CVD glass, a CVD nitride and a further TE... | 12/18/1990 |
| 4910156 | Neutron transmutation doping of a silicon wafer A silicon wafer and a method of producing a silicon wafer comprising a phosphor-doping method of doping phosphor into a single silicon crystals by transmuting isotope Si30 contained in said single silicon crystals made by the CZ method or the M... | 03/20/1990 |
| 4836788 | Production of solid-state image pick-up device with uniform distribution of dopants A method for fabricating a solid-state image pick-up device changes part of the constituent elemental Si into the n-type impurity phosphorus P, thus changing the substrate to an n-type, by atomic transmutation through neutron irradiation of a p-type silic... | 06/06/1989 |
| 4729963 | Fabrication method for modified planar semiconductor structures A process for fabricating a semiconductor device or a semiconductor substrate having a first major surface on which active semiconductor devices are to be formed, and a second major surface. An etch stop layer is provided on the first major surface. A lay... | 03/08/1988 |
| 4705760 | Preparation of a surface for deposition of a passinating layer A method of making a semiconductor device including forming regions of first and second conductivity types with a semiconductor junction therebetween which extends to a surface of the device, and depositing a passivating layer over the surface to overlie ... | 11/10/1987 |
| 4685979 | Method of manufacturing a group II-VI compound semiconductor device having a pn junction A method of manufacturing a semiconductor device having a single crystal pn junction formed in a Group II-VI compound semiconductor crystal, by: growing a Group II-VI compound semiconductor crystal substrate of n type from a melt of a crystal-constituting... | 08/11/1987 |
| 4662061 | Method for fabricating a CMOS well structure A process is disclosed for fabricating N-wells in a P-type substrate. An N-type epitaxial layer is formed on the surface of a P+ substrate. The N-type epitaxial layer is then masked and a doubly charged boron implant is performed on the exposed areas of t... | 05/05/1987 |
| 4619718 | Method of manufacturing a Group II-VI semiconductor device having a PN junction A method of manufacturing a semiconductor device by the use of a Group II-VI compound semiconductor crystal prepared by liquid growth method using a temperature difference technique under controlled vapor pressure of the crystal-constituting Group VI elem... | 10/28/1986 |
| 4547256 | Method for thermally treating a semiconductor substrate Apparatus and method are provided for thermally treating a semiconductor substrate. According to the method, the substrate is isothermally heated to an elevated temperature near the thermal treatment temperature and then is further heated to a higher temp... | 10/15/1985 |
| 4526632 | Method of fabricating a semiconductor pn junction A method of forming a pn junction with a Group IIB-VIB compound semiconductor containing Zn is disclosed, the method including preparing an n type semiconductor region either locally or entirely in a Group IIB-VIB compound semiconductor crystal obtained b... | 07/02/1985 |
| 4514896 | Method of forming current confinement channels in semiconductor devices Semiconductor light emitting devices, lasers and LEDs, are described in which the current flow channel is narrower near the top surface of the device and wider at its bottom near the active region. Also, described are several attenuation masks for fabrica... | 05/07/1985 |
| 4389256 | Method of manufacturing pn junction in group II-VI compound semiconductor A method of manufacturing a pn junction in a substantially n-type ZnSe compound semiconductor crystal grown by relying on a liquid growth method using temperature difference technique, by diffusing therein gold which is a p-type impurity or by forming the... | 06/21/1983 |
| 4328611 | Method for manufacture of an interdigitated collector structure utilizing etch and refill techniques A bipolar semiconductor is manufactured by forming a plurality of grooves along the vertical (111) planes in a high resistivity epitaxial silicon layer which is disposed on an N+ (110) oriented substrate. Low resistivity epitaxial silicon of the same cond... | 05/11/1982 |
| 4327475 | Method of manufacturing a FET device disposed in a compound s/c layer on a semi-insulating substrate A method of manufacturing a field effect transistor uses a semiinsulating substrate consisting of a compound semiconductor, and an N type semiconductor layer formed on the substrate. The method comprises the steps of implanting ions of a P type impurity f... | 05/04/1982 |
| 4303463 | Method of peeling thin films using directional heat flow A method is disclosed for peeling thin layers of crystal from the substrates on which they have been grown. A thin layer of single-crystal material is grown on a single-crystal substrate having a lower melting point temperature than the layer. The layer a... | 12/01/1981 |
| 4235651 | Fabrication of GaAs-GaAlAs solar cells The specification describes an improved III-V compound solar cell structure and fabrication process therefor wherein a P-type layer of gallium aluminum arsenide is epitaxially grown on an N-type gallium arsenide substrate to form a P-type region and a PN ... | 11/25/1980 |
| 4163987 | GaAs-GaAlAs solar cells The specification describes an improved III-V compound solar cell structure and fabrication process therefor wherein a P-type layer of gallium aluminum arsenide is epitaxially grown on an N-type gallium arsenide substrate to form a P-type region and a PN ... | 08/07/1979 |
| 4154630 | Method of manufacturing semiconductor devices having isoelectronically built-in nitrogen and having the p-n junction formed subsequent to the deposition process A method of manufacturing by liquid epitaxy III-V semiconductor crystals comprising a layer having isoelectronic nitrogen trapping centers. The method is characterized in that the deposition of the nitrogen-doped layer is succeeded by the deposition of a deep ... | 05/15/1979 |
| 4141764 | Process for the manufacture of silicon of large surface area bonded to a substrate and silicon-bonded substrates so made Process for the manufacture of silicon of large surface area bonded to a substrate, which comprises depositing silicon to a thickness of from 30 to 500 μm onto panel-shaped substrates of glassy carbon (a glass-like carbon obtained by carbonizing a spatia... | 02/27/1979 |
| 4126496 | Method of making a single chip temperature compensated reference diode A reference diode and a method for making same are described, wherein a single wafer of semiconductive material is processed to provide a reverse PN junction acting in its breakdown region and to provide one or more forward PN junctions in electrical seri... | 11/21/1978 |
| 4101925 | Centrifugal forming thin films and semiconductors and semiconductor devices A method and apparatus for centrifugally forming thin semiconductor films or layers wherein centrifugal force is applied to a molten single-crystal forming material to overcome surface tension and evenly spread the material along a substrate surface subst... | 07/18/1978 |
| 4075043 | Liquid phase epitaxy method of growing a junction between two semiconductive materials utilizing an interrupted growth technique A method of making a junction in semiconductive materials to improve the spectral response of the junction in photovoltaic detectors. A first layer of semiconductive material is grown, by epitaxy technique, on a substrate of semiconductive material of the... | 02/21/1978 |
