Dining Table Having Integral Dishwasher
A space-saving dishwasher, which may be installed within a counter top or table, having a dish-carrying rack that is vertically shiftable through the open top of the dishwasher for facilitating loading and unloading of the dishes.
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| Number | Title | Issue Date |
| 7687381 | Method of forming electrical interconnects within insulating layers that form consecutive sidewalls including forming a reaction layer on the inner sidewall Methods of forming integrated circuit device having electrical interconnects include forming an electrically insulating layer on a substrate and forming a hard mask on the electrically insulating layer. The hard mask and the electrically insulating layer are selecti... | 03/30/2010 |
| 7265024 | DMOS device having a trenched bus structure A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate ... | 09/04/2007 |
| 7022247 | Process to form fine features using photolithography and plasma etching Methods of making a sharp pointed structure (19), such as a sharp pointed structure in a semiconductor, includes providing a substrate (14) and then depositing an oxide layer (16), such as silicon oxide or silicon nitride, on the substrate (1... | 04/04/2006 |
| 6939765 | Integration method of a semiconductor device having a recessed gate electrode Embodiments of the invention are directed to an integrated circuit device and a method for forming the device. In some embodiments of the invention, two types of transistors are formed on a single substrate, transistors: transistors having a recessed gate, and trans... | 09/06/2005 |
| 6909142 | Semiconductor device including a channel stop structure and method of manufacturing the same It is an object to obtain a semiconductor device comprising a channel stop structure which is excellent in an effect of stabilizing a breakdown voltage and a method of manufacturing the semiconductor device. A silicon oxide film (2) is formed on an upper surf... | 06/21/2005 |
| 6602793 | Pre-clean chamber An improved pre-clean chamber of a semiconductor processing system minimizes the generation of particulates during processing, thereby decreasing contamination levels that can adversely affect plasma vapor deposition film properties while also decreasing ... | 08/05/2003 |
| 6475884 | Devices and methods for addressing optical edge effects in connection with etched trenches In a first aspect of the invention, a modified semiconductor substrate is provided. The modified substrate comprises: (1) a semiconductor substrate; (2) at least one buffer layer provided over at least a portion of the substrate; and (3) a plurality of tr... | 11/05/2002 |
| 6100172 | Method for forming a horizontal surface spacer and devices formed thereby The present invention provides a method for forming self-aligned spacers on the horizontal surfaces while removing spacer material from the vertical surfaces. The preferred method uses a resist that can be made insoluble to developer by the use of an impl... | 08/08/2000 |
| 6083520 | Bioactive feed The present invention relates to a bioactive feed pellet comprising besides commonly used nutritionally valuable components, a biologically active ingredient such as a therapeutically or prophylactically active compound, a vaccine, a pigment, a vitamin, a... | 07/04/2000 |
| 6033995 | Inverted layer epitaxial liftoff process The invention relates to a method for integrating semiconductor device epilayers with arbitrary host substrates, where an indium gallium arsenide etch-stop layer (34) is deposited on an indium phosphide growth substrate (32) and device epilayers (36, 38) ... | 03/07/2000 |
| 5918128 | Reduced channel length for a high performance CMOS transistor An integrated circuit fabrication process is provided in which a transistor having an ultra short channel length is formed by multiple etchings of a gate conductor layer. After formation of the gate conductor using a photolithographic process, the lateral... | 06/29/1999 |
| 5561079 | Stalagraphy A method of lithography is disclosed for making very small structures (10-6 m and smaller) on a surface such as in the manufacture of semiconductor devices. Many micron-sized or smaller droplets of a suitable material are formed on the surface,... | 10/01/1996 |
| 5443685 | Composition and method for off-axis growth sites on nonpolar substrates Nonpolar substrates comprising off-axis growth regions for the growth of polar semiconductors, and a method for making such substrates, are disclosed. According to the invention, an erodible material, such as a photoresist, is applied to a substrate at a ... | 08/22/1995 |
| 5358881 | Silicon topography control method A semiconductor method for establishing a predetermined, constant-depth recess in a semiconductor structure fabricated on the surface of a silicon substrate or wafer. Fabrication includes first growing a thin screen oxide layer on the surface of the wafer... | 10/25/1994 |
| 5314837 | Method of making a registration mark on a semiconductor The process of making a registration mark on an integrated-circuit substrate wherein photoimaging first is used to define an optically-recognizable mark on a predetermined position of the substrate, and the substrate then is covered with silicon dioxide. ... | 05/24/1994 |
| 5312764 | Method of doping a semiconductor substrate A method of decoupling a step for modulating a defect density from a step for modulating a junction depth. A semiconductor substrate (30) having a portion doped with a dopant (34) is heated to a pre-oxidation anneal temperature in a pre-oxidation anneal s... | 05/17/1994 |
| 5206185 | Semiconductor laser device A semiconductor laser device is disclosed which comprises a semiconductor substrate having a ridge portion, the width of the ridge portion being smaller in the vicinity of the facets than in the inside of the device; a current blocking layer formed on the... | 04/27/1993 |
| 5202290 | Process for manufacture of quantum dot and quantum wire semiconductors Quantum dot and quantum wire semiconductors in the nanosize range are produced by a process which utilizes a microporous aluminum oxide surface layer on an aluminum metal substrate as a template for the semiconducting material. The microporous surface lay... | 04/13/1993 |
| 5192710 | Method of making a semiconductor laser with a liquid phase epitaxy layer and a plurality of gas phase or molecular beam epitaxy layers A semiconductor laser which comprises a grating, a waveguide layer applied to the grating by LPE, and a plurality of layers disposed above the waveguide layer. This laser is characterized in that the layers disposed on the waveguide layer are applied with... | 03/09/1993 |
| 5160492 | Buried isolation using ion implantation and subsequent epitaxial growth A method of producing a buried insulation layer used to channel current through a small opening through the insulation layer. Ions are implanted to a depth controlled by the ion kinetic energy and are activated to form the insulation layer. A groove, pref... | 11/03/1992 |
| 5114876 | Selective epitaxy using the gild process The present invention comprises a method of selective epitaxy on a semiconductor substrate. The present invention provides a method of selectively forming high quality, thin GeSi layers in a silicon circuit, and a method for fabricating smaller semiconduc... | 05/19/1992 |
| 4963507 | Method and manufacturing a laser diode with buried active layer In the manufacture of laser diodes having a stripe-shaped, active layer, a problem arises upon application of lateral layers, particularly of blocking pn-junctions for lateral current conduction, in that these layers are undesired above the active layer. ... | 10/16/1990 |
| 4818722 | Method for generating a strip waveguide A method for generating a strip laser in a buried hetero-structure composed of layers, wherein a raised strip is etched out of the layer structure and the strip is laterally etched with an erosion melt. The lateral edges of the laser active layer are prot... | 04/04/1989 |
| 4561915 | Process for epitaxial growth on a corrugated wafer A process for epitaxial growth which effects epitaxial growth while suppressing thermal deformation of surface corrugations of an InGaAsP/InP system semiconductor substrate. Deformation of surface corrugations is suppressed by disposing a GaAs1-z | 12/31/1985 |
| 4381956 | Self-aligned buried channel fabrication process A technique is described for the preparation of buried channels of arbitrary conductivity type in a semiconductor device or integrated circuit containing oxide moats in an epitaxial surface layer. By following a specific sequence of process steps, two mas... | 05/03/1983 |
| 4255206 | Method for manufacturing a semiconductor structure A method for manufacturing a semiconductor structure, especially for optoelectronic components, in which, at least one layer of a further semiconductor compound is deposited epitaxially on a substrate of a semiconductor compound. The surface of the substr... | 03/10/1981 |
| 4251299 | Planar epitaxial refill using liquid phase epitaxy Planar silicon device structures are fabricated by refilling grooves etched in an oxide-coated silicon substrate using liquid phase epitaxial growth from a tin melt. Since tin does not wet silicon dioxide, silicon nucleation on the oxide-covered areas of ... | 02/17/1981 |
| 4178195 | Semiconductor structure A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the bin... | 12/11/1979 |
| 4073676 | GaAs-GaAlAs semiconductor having a periodic corrugation at an interface A semiconductor device including a GaAs layer having a periodic corrugation on a surface thereof with a GaAsAl layer disposed on the periodic corrugation is formed by contacting a solution consisting of Ga, Al and As heated at a temperature of about 700°... | 02/14/1978 |