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| Number | Title | Issue Date |
| 7888240 | Method of forming phase change memory devices in a pulsed DC deposition chamber A phase change memory including an ovonic threshold switch is formed using a pulsed direct current (DC) deposition chamber using pulsed DC. Pulsed DC is used to deposit a chalcogenide film. Pulsed DC may be also used to deposit a carbon film. ... | 02/15/2011 |
| 7195989 | Electrochemical fabrication methods using transfer plating of masks Three-dimensional structures are electrochemically fabricated by depositing a first material onto previously deposited material through voids in a patterned mask where the patterned mask is at least temporarily adhered to a substrate or previously formed layer of ma... | 03/27/2007 |
| 7148127 | Device mounting substrate and method of repairing defective device A method of repairing a defective one of devices mounted on substrate is provided. Devices are arrayed on a substrate and electrically connected to wiring lines connected to a drive circuit, to be thus mounted on the substrate. The devices mounted on the substrate a... | 12/12/2006 |
| 7135387 | Method of manufacturing semiconductor element A method for stably activating pn-successive layers in a semiconductor element in a short time is disclosed. Pulsed beams, each of which has a pulse shape that is approximately rectangular, are projected from respective laser irradiation devices and successively com... | 11/14/2006 |
| 6969618 | SOI device having increased reliability and reduced free floating body effects The present invention provides a novel method for increasing the amount of deuterium incorporated into trap sites of a transistor device during a deuterium passivation anneal by electrically pre-stressing the fabricated device prior to a deuterium anneal. The method... | 11/29/2005 |
| 6960479 | Stacked ferroelectric memory device and method of making same The present invention relates to a ferroelectric polymer storage device including at least two stacked ferroelectric polymer memory structures that are arrayed next to at least two respective stacked topologies that are a pre-fabricated silicon substrate cavity that... | 11/01/2005 |
| 6680227 | Non-volatile memory device and fabrication method thereof A nonvolatile read-only memory device, wherein a word line is on a substrate and the word line includes a metal layer a polysilicon line. A trapping layer is further located between the word line and the substrate. A polysilicon protection line is formed ... | 01/20/2004 |
| 6645826 | Semiconductor device and method of fabricating the same In a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semicon... | 11/11/2003 |
| 6623992 | System and method for determining a subthreshold leakage test limit of an integrated circuit A method and a means for determining an IDDQ test limit of an integrated circuit are provided. In particular, a method is provided which includes measuring the IDDQ value of a test structure formed upon a die derived from the same lo... | 09/23/2003 |
| 6620707 | Heat conductor, especially for a sensor, and method for producing such a heat conductor A heating conductor, in particular for a sensor for determining at least one gas component in the exhaust gases of internal combustion engines. The heating conductor formed from a cermet which contains platinum, at least one metal oxide, and at least two ... | 09/16/2003 |
| 6358758 | Low imprint ferroelectric material for long retention memory and method of making the same A liquid precursor for forming a thin film of ferroelectric metal oxide in an integrated circuit contains metal oxides in excess of the stoichiometrically balanced amount. When the precursor comprises strontium, bismuth, tantalum and niobium for forming s... | 03/19/2002 |
| 6306692 | Coplanar type polysilicon thin film transistor and method of manufacturing the same The present invention discloses a method of manufacturing a thin film transistor, including: depositing an amorphous silicon layer, an insulating layer, and a gate metal layer on a substrate sequentially; patterning the insulating layer and the gate metal... | 10/23/2001 |
| 6180495 | Silicon carbide transistor and method therefor A silicon carbide transistor (10) is formed from a silicon carbide film (14) that is formed on a silicon carbide substrate bulk (37). A conductor pattern layer (25) is formed on the silicon carbide film (14) and the silicon carbide film (14) removed from ... | 01/30/2001 |
| 6171934 | Recovery of electronic properties in process-damaged ferroelectrics by voltage-cycling An integrated circuit is formed containing a metal-oxide ferroelectric thin film. An voltage-cycling recovery process is conducted to reverse the degradation of ferroelectric properties caused by hydrogen. The voltage-cycling recovery process is conducted... | 01/09/2001 |
| 6069024 | Method for producing a semiconductor device The object of this invention is to provide a method whereby, during flip-chip connection using a thermosetting resin, it is possible to prevent the development of voids in the resin when the resin is hardened by pulse heating. The object is fulfilled by p... | 05/30/2000 |
| 5914189 | Protected thermal barrier coating composite with multiple coatings A composite that protects thermal barrier coatings from the deleterious effects of environmental contaminants at operational temperatures is discovered. The thermal barrier coated parts have least two outer protective coatings that decrease infiltration o... | 06/22/1999 |
| 5753540 | Apparatus and method for programming antifuse structures Disclosed is a method for programming an antifuse structure. The antifuse structure is programmed by applying an alternating current having alternating current pulses between a bottom and a top electrode to generate a conduction path through an antifuse m... | 05/19/1998 |
| 5679275 | Circuit and method of modifying characteristics of a utilization circuit A modification circuit (30) is thermally coupled to and electrically isolated from a circuit element (20) of a utilization circuit (10). During modification, current pulses are passed through an isolation circuit (40) to the modification circuit which hea... | 10/21/1997 |
| 5559058 | Method for producing native oxides on compound semiconductors A method of growing a native oxide on a compound semiconductor material, comprising contacting the compound semiconductor material with an oxygen containing fluid, and pulsing a current between the compound semiconductor material the fluid, is presented. ... | 09/24/1996 |
| 5466484 | Resistor structure and method of setting a resistance value A resistor structure (10) having a heating element (35) and a resistor (32), and a method of trimming the resistor (32). The heating element (35) is separated from the resistor (32) by a layer of dielectric material (19). The resistor (32) has a layer of ... | 11/14/1995 |
| 5445718 | Electrochemical etch-stop on n-type silicon by injecting holes from a shallow p-type layer The invention generally includes a method of selectively etching a body of silicon material wherein a silicon wafer is used as a working electrode and having an n-type region and a relatively shallow p-type layer. The working electrode and a counterelectr... | 08/29/1995 |
| 5429984 | Method of discharge processing of semiconductor A method of discharge processing of a semiconductor comprises the steps of: providing a low-resistivity portion on the semiconductor; and application of a given voltage through the low-resistivity portion between the semiconductor and a tool electrode sui... | 07/04/1995 |
| 5360981 | Amorphous silicon memory An analogue memory device comprises a layer of doped amorphous silicon located between a first conducting layer metal contact layer of V, Co, Ni, Pd, Fe or Mn. It has been found that the selection of one of these metals as the contact exerts a significant... | 11/01/1994 |
| 5126282 | Methods of reducing anti-fuse resistance during programming An already- programmed anti-fuse is DC soaked by passing DC current through the anti-fuse from a DC voltage source applied across the electrodes of the anti-fuse. The anti-fuse resistance is lower when the DC voltage being applied such that the positive e... | 06/30/1992 |
| 4874711 | Method for altering characteristics of active semiconductor devices Method for altering an electrical characteristic of a circuit having at least one active semiconductor device involves applying at least one pulse--a voltage pulse, a current pulse, an energy pulse, or a power pulse and so forth--across the active semicon... | 10/17/1989 |
| 4820657 | Method for altering characteristics of junction semiconductor devices Method for altering an electrical characteristic of a circuit having at least one junction formed from a first and a second semiconductor material involves applying at least one pulse --a voltage pulse, a current pulse, an energy pulse, or a power pulse a... | 04/11/1989 |
| 4570332 | Method of forming contact to thin film semiconductor device A method for making an electrode on a desired region of a thin film semiconductor layer having a junction therein and deposited on a conductive surface comprising the steps of applying an electrical pulse signal across the semiconductor layer at the desir... | 02/18/1986 |
| 4400256 | Method of making layered semiconductor laser A method for making a thin film layered semiconductor laser which includes depositing layers of semiconductor and electrical lead materials on an undoped semiconductor substrate and heating each layer of the semiconductor material after it has been deposi... | 08/23/1983 |
| 4360964 | Nondestructive testing of semiconductor materials An n-type region of a semiconductor body, such as a surface region of a bulk wafer or an epitaxial layer region grown on a wafer (12), is successfully submitted to a capacitance-voltage test using a mercury probe (11) after being subjected to a pretreatme... | 11/30/1982 |
