Class 438/447 - Dopant addition

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process including a step of introducing an electrically
No. of patents: 69
Last issue date: 04/15/2008

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Number	Title	Issue Date
7358108	CMOS image sensor and method for fabricating the same A CMOS image sensor and a method for fabricating the same are disclosed, in which the boundary between an active region and a field region is not damaged by ion implantation. The method for fabricating a CMOS image sensor includes forming a trench in a first conduct...	04/15/2008
7329583	Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does...	02/12/2008
7279378	Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does...	10/09/2007
7276431	Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does...	10/02/2007
7235460	Method of forming active and isolation areas with split active patterning A process for forming isolation and active regions, wherein the patterning of an oxidation-barrier active stack is performed separately in the PMOS and NMOS regions. After the active stack is in place, two masking steps are used: one exposes the isolation areas on t...	06/26/2007
7148108	Method of manufacturing semiconductor device having step gate Disclosed herein is a method of manufacturing a semiconductor device having a step gate, which can improve the refresh characteristics of the device. The method comprises the steps of: forming on a silicon substrate having active and field regions a first hard mask ...	12/12/2006
7105460	Nitrogen-free dielectric anti-reflective coating and hardmask Methods are provided for depositing a dielectric material. The dielectric material may be used for an anti-reflective coating or as a hardmask. In one aspect, a method is provided for processing a substrate including introducing a processing gas comprising a silane-...	09/12/2006
7081397	Trench sidewall passivation for lateral RIE in a selective silicon-on-insulator process flow A lateral trench in a semiconductor substrate is formed by the following steps. Form a lateral implant mask (LIM) over a top surface of the semiconductor substrate. Implant a heavy dopant concentration into the substrate through the LIM to form a lateral implant reg...	07/25/2006
7067387	Method of manufacturing dielectric isolated silicon structure A method for fabricating dielectric isolated silicon islands or regions is described in this invention. A hard composite mask of pad oxide and silicon nitride is first patterned on a silicon substrate and trenches of required dimensions are etched into silicon. Afte...	06/27/2006
7033896	Field effect transistor with a high breakdown voltage and method of manufacturing the same An electric field effect transistor of high breakdown voltage and a method of manufacturing the same are disclosed. A recessed portion is formed at the channel region and is filled by a protective oxide layer. Lightly doped source/drain regions are formed under the ...	04/25/2006
7029826	Method to restore hydrophobicity in dielectric films and materials Silica dielectric films, whether nanoporous foamed silica dielectrics or nonporous silica dielectrics are readily damaged by fabrication methods and reagents that reduce or remove hydrophobic properties from the dielectric surface. The invention provides for methods...	04/18/2006
6949445	Method of forming angled implant for trench isolation A trench isolation having a sidewall and bottom implanted region located within a substrate of a first conductivity type is disclosed. The sidewall and bottom implanted region is formed by an angled implant, a 90 degree implant, or a combination of an angled implant...	09/27/2005
6921705	Method for forming isolation layer of semiconductor device A method for forming an isolation layer of a semiconductor device. The method includes: a) sequentially laminating a pad oxide layer and pad nitride layer on a semiconductor substrate; b) selectively removing the pad nitride layer, selectively removing the pad oxide...	07/26/2005
6803265	Liner for semiconductor memories and manufacturing method therefor A manufacturing method for an integrated circuit memory includes providing a semiconductor substrate and depositing a charge-trapping dielectric layer. First and second bitlines are implanted and a wordline layer is deposited. A hard mask layer is deposited over the...	10/12/2004
6784076	Process for making a silicon-on-insulator ledge by implanting ions from silicon source A process of making a partial silicon-on-insulator ledge is disclosed. A deep implantation region is created in a substrate. During a lateral cavity etch, the deep implantation region resists etching. The lateral cavity etch acts to partially isolate an active area ...	08/31/2004
6696350	Method of fabricating memory device A method of fabricating a memory device. A plurality of isolation structures and a plurality of stacked gate structures are sequentially formed on a substrate. While defining the stacked gate structures, the isolation structures are over etched to form a ...	02/24/2004
6627516	Method of fabricating a light receiving device A light receiving device includes a semiconductor substrate, a light absorbing layer provided on the semiconductor substrate, a window layer provided on the light absorbing layer, a wavelength filter provided on the window layer, and a diffusion region pr...	09/30/2003
6579778	Source bus formation for a flash memory using silicide A semiconductor flash memory device is formed with shallow trench isolation (STI) and a low-resistance source bus line (Vss Bus). Embodiments include forming core and peripheral field oxide regions, as by conventional STI techniques, bit lines by ion impl...	06/17/2003
6465308	Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant A structure and a process for manufacturing semiconductor devices with improved ESD protection for high voltage applications is described. A thick field gate oxide N channel field effect transistor (FET) device with a tunable threshold voltage (Vt) is dev...	10/15/2002
6429093	Sidewall process for forming a low resistance source line A method of forming a semiconductor component having a conductive line (24) and a silicide region (140) that crosses a trench (72). The method involves forming nitride sidewalls (127) to protect the stack during the silicidation process....	08/06/2002
6297130	Recessed, sidewall-sealed and sandwiched poly-buffered LOCOS isolation methods This is a method for forming a recessed LOCOS isolation region, which includes the steps of forming a first silicon nitride layer between the pad oxide layer and a polysilicon buffer layer and a second nitride layer over the polysilicon buffer layer. In a...	10/02/2001
6284626	Angled nitrogen ion implantation for minimizing mechanical stress on side walls of an isolation trench With the present invention, a filled isolation trench is fabricated as part of an integrated circuit on a semiconductor wafer using nitrogen implantation into at least one side wall of the isolation trench. An isolation trench is etched within a layer of ...	09/04/2001
6121097	Semiconductor device manufacturing method A polysilicon film is deposited in a trench formed in a silicon element substrate. The polysilicon film in the trench and on the silicon element substrate is anisotropically etched, so that the film remains on the side wall of the trench. The polysilicon ...	09/19/2000
6121115	Methods of fabricating integrated circuit memory devices having wide and narrow channel stop layers An integrated circuit memory device includes a semiconductor substrate having a memory cell area and a select transistor area. A first field insulation layer is included in the memory cell area, and a first channel stop impurity layer is included beneath ...	09/19/2000
6001707	Method for forming shallow trench isolation structure A method for forming a shallow trench isolation structure in a substrate includes the steps of forming a doped region around the future top corner regions of a trench. The concentration of dopants inside the doped region increases towards the substrate su...	12/14/1999
5976768	Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby The preferred embodiment of the present invention overcomes the disadvantages of the prior art by using hybrid resist to define a sidewall spacer region and form a new type of sidewall spacer. The preferred method allows for more controlled doping at the ...	11/02/1999
5972778	Method of fabricating semiconductor device A method of fabricating a semiconductor device, including the steps of (a) forming a channel at a surface of a semiconductor substrate only in the center of a region X which physically and electrically isolates adjacent regions Y in each of which a device...	10/26/1999
5960301	Method of forming isolation layer of semiconductor device A method of forming an isolation layer of a semiconductor device including active regions on a substrate and device isolation regions for isolating the active regions from one another includes the steps of forming a nitride layer on the active region of a...	09/28/1999
5950078	Rapid thermal annealing with absorptive layers for thin film transistors on transparent substrates A method for rapid thermally annealing a thin amorphous film on a transparent substrate with the use of a radiation absorption film is provided. Unlike a transmissive silicon thin film, or transparent substrate, the metal absorptive film has excellent rad...	09/07/1999
5915191	Method for fabricating a semiconductor device with improved device integration and field-region insulation A method for the fabrication of a semiconductor device is characterized by a series of steps comprising successively forming a trench in a field region of monosilicon substrate and forming an oxidation-preventive layer and a silicon layer in the trench, a...	06/22/1999
5904538	Method for developing shallow trench isolation in a semiconductor memory device A method for developing shallow trench isolation in a semiconductor device includes forming an ion diffusion area by implanting fluorine ions where a trench is to be formed in a semiconductor substrate before forming the trench, performing an annealing pr...	05/18/1999
5834360	Method of forming an improved planar isolation structure in an integrated circuit A method is provided for forming an isolation structure at a semiconducting surface of a body, and the isolation structure formed thereby. A masking layer is formed over selected regions of the substrate surface; the masking layer preferably comprising a ...	11/10/1998
5686327	Method for fabricating semiconductor device A method for fabricating a semiconductor device, capable of forming an element-isolating insulating film for MOS transistors in a self-aligned manner during formation of the MOS transistors on a substrate, thereby simplifying the fabrication of the semico...	11/11/1997
5686347	Self isolation manufacturing method A method provides for manufacturing an MOSFET semiconductor device with an array of semiconductor structures on a lightly doped semiconductor substrate. A mask is formed upon the substrate with openings therein. An oxide is formed in the semiconductor sub...	11/11/1997
5679599	Isolation using self-aligned trench formation and conventional LOCOS A method for isolating regions of a circuit device in a semiconductor substrate. The method generally comprises the steps of: forming a first insulation region and a second insulation region; etching a trench in the first insulation region, the trench ext...	10/21/1997
5637529	Method for forming element isolation insulating film of semiconductor device A method for forming an element isolation insulating film of semiconductor devices, by which junction leakage current can be greatly reduced, comprising the steps of: forming a pad oxide film and a first insulating film on a semiconductor substrate, in se...	06/10/1997
5470770	Manufacturing method of semiconductor device A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region inc...	11/28/1995
5395790	Stress-free isolation layer A method of fabricating a stress-free isolation layer for semiconductor integrated circuit that solves the problems of crystalline defects and the degraded characteristics of devices due to the presence of structural stresses. Partial trench etching is em...	03/07/1995
5374583	Technology for local oxidation of silicon A new method of local oxidation by means of forming a plurality of silicon trenches is described. Portions of the insulating layer over the surface of a silicon substrate not covered by a mask pattern are etched through exposing the portion of the silicon...	12/20/1994
5374584	Method for isolating elements in a semiconductor chip A method for isolating elements in a silicon semiconductor device is disclosed. The invention discloses the steps of: (1) forming a thermal silicon oxide layer on a silicon substrate, depositing a layer of polysilicon, and depositing a first silicon nitri...	12/20/1994

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Class 438/447 - Dopant addition