Class 438/442 - With epitaxial semiconductor layer formation

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process including a step of epitaxially growing a single
No. of patents: 134
Last issue date: 04/26/2011

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Number	Title	Issue Date
7932160	Planar oxidation method for producing a localised buried insulator The invention relates to a method of producing a semiconductor device, comprising the following steps consisting in: forming first, second and third semiconductor layers (1, 2, 3), whereby the first and second layers (1, 3) contain a smaller concentrat...	04/26/2011
7863152	Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on whi...	01/04/2011
7407865	Epitaxial growth method An epitaxial growth method for forming a high-quality epitaxial growth semiconductor wafer is provided. The method includes forming a single crystalline layer on a single crystalline wafer; forming a mask layer having nano-sized dots on the single crystalline layer;...	08/05/2008
7387941	Method for fabricating semiconductor device A method for manufacturing a semiconductor device in accordance with an embodiment of the present invention provides a channel region formed over a device isolation structure to form a semiconductor device including a SOI (Silicon-on-Insulator) channel structure, th...	06/17/2008
7338881	Method for manufacturing semiconductor element A method for manufacturing a semiconductor element includes preparing an SOI layer having a transistor forming area and an element isolation area, forming an oxidation-resistant mask layer on the SOI layer, forming a resist mask over the transistor forming area on t...	03/04/2008
7326625	Trench structure having a void and inductor including the trench structure In a method of forming a trench structure having a wide void therein, a first trench having a first width and a first depth is formed in a substrate. The first trench is filled with a first insulation layer pattern defining the void in the first trench. A second tre...	02/05/2008
7265017	Method for manufacturing partial SOI substrates There is closed a semiconductor device which comprises a semiconductor substrate including an SOI region where a first insulating film is buried, and a non-SOI region, the semiconductor substrate being provided with a boundary region formed between the SOI region an...	09/04/2007
7253085	Deposition methods The invention includes a method for selective deposition of semiconductor material. A substrate is placed within a reaction chamber. The substrate comprises a first surface and a second surface. The first and second surfaces are exposed to a semiconductor material p...	08/07/2007
7244659	Integrated circuits and methods of forming a field effect transistor Integrated circuits and methods of forming field effect transistors are disclosed. In one aspect, an integrated circuit includes a semiconductor substrate comprising bulk semiconductive material. Electrically insulative material is received within the bulk semicondu...	07/17/2007
7232728	High quality oxide on an epitaxial layer This invention improves the quality of gate oxide dielectric layers using a two-pronged approach, thus permitting the use of much thinner silicon dioxide gate dielectric layers required for lower-voltage, ultra-dense integrated circuits. In order to eliminate defect...	06/19/2007
7176101	Method of forming isolation oxide layer in semiconductor integrated circuit device A method is provided in which a first oxide layer is deposited on a silicon substrate and etched to form openings. A first silicon epitaxial layer is grown on the substrate in the openings, forming first active regions, a second oxide layer is deposited thereon, and...	02/13/2007
7115449	Method for fabrication of polycrystalline silicon thin film transistors The present invention provides a method for fabrication of polycrystalline silicon thin film transistors, which forms a silicon spacer on the sidewall of the active layer of a thin film transistor (TFT) by way of anisotropic plasma etching in a single direction. The...	10/03/2006
7078313	Method for fabricating an integrated semiconductor circuit to prevent formation of voids Recesses between gate layer stacks are filled with a first electrically insulating material. Cavities or voids are opened up during the removal of a portion of the first insulating material. These voids are filled during the application of a conductive layer and can...	07/18/2006
7060581	Method for manufacturing a semiconductor device A method for manufacturing a semiconductor device, includes forming a first impurity implanted layer in a semiconductor substrate by selectively implanting ions of a first impurity. A dummy pattern is formed on a surface of the semiconductor substrate above the firs...	06/13/2006
7060596	Process for fabricating a single-crystal substrate and integrated circuit comprising such a substrate An initial single-crystal substrate 1 having, locally and on the surface, at least one discontinuity in the single-crystal lattice is formed. The initial substrate is recessed at the discontinuity. The single-crystal lattice is amorphized around the periphery...	06/13/2006
6997985	Semiconductor, semiconductor device, and method for fabricating the same Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the s...	02/14/2006
6902971	Transistor sidewall spacer stress modulation A semiconductor fabrication process and the resulting integrated circuit include forming a gate electrode (116) over a gate dielectric (104) over a semiconductor substrate (102). A spacer film (124) exhibiting a tensile stress characteris...	06/07/2005
6723618	Methods of forming field isolation structures Field isolation structures and methods of forming field isolation structures are described. In one implementation, the method includes etching a trench within a monocrystalline silicon substrate. The trench has sidewalls and a base, with the base comprising monocrys...	04/20/2004
6716719	Method of forming biasable isolation regions using epitaxially grown silicon between the isolation regions An improved isolation structure for use in an integrated circuit and a method for making the same is disclosed. In a preferred embodiment, an silicon dioxide, polysilicon, silicon dioxide stack is formed on a crystalline silicon substrate. The active areas are etche...	04/06/2004
6699773	Shallow trench isolation type semiconductor device and method of forming the same A method of forming a shallow trench isolation type semiconductor device comprises forming an etch protecting layer pattern to define at least one active region on a substrate, forming at least one trench by etching the substrate partially by using the et...	03/02/2004
6627515	Method of fabricating a non-floating body device with enhanced performance A method of forming a buried silicon oxide region in a semiconductor substrate with portions of the buried silicon oxide region formed underlying portions of a strained silicon shape, and where the strained silicon shape is used to accommodate a semicondu...	09/30/2003
6548388	Semiconductor device including gate electrode having damascene structure and method of fabricating the same A gate electrode conductive layer is formed on an active region that is recessed relative to field oxide layers so as to define a damascene structure. The gate electrode conductive layer is formed on the active region but is not formed on a field region s...	04/15/2003
6503799	Method of manufacturing semiconductor device There is provided a method of forming an element isolation structure that can maintain its element isolation capability even with the progress of miniaturization of semiconductor elements. Through thermal processing in a nitrogen atmosphere at 900° C., a...	01/07/2003
6489193	Process for device isolation A novel process for isolating devices on a semiconductor substrate is disclosed. An isolation layer is first formed over the semiconductor substrate and patterned into at least two isolation mesas on the substrate. Next, a blanket semiconductor layer is f...	12/03/2002
6461887	Method to form an inverted staircase STI structure by etch-deposition-etch and selective epitaxial growth A method of forming an inverted staircase shaped STI structure comprising the following steps. A semiconductor substrate having an overlying oxide layer is provided. The substrate having at least a pair of active areas defining an STI region therebetween....	10/08/2002
6436780	Semiconductor device A number of npn and pnp bipolar transistors are formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others The higher frequency transistors have their emitters located closer to the collectors, by pos...	08/20/2002
6410404	Process for manufacturing SOI integrated circuits and circuits made thereby Presented is a process for manufacturing circuit structures of the SOI type integrated on a semiconductor substrate having a first type of conductivity. The process includes forming at least one well with a second type of conductivity in the semiconductor...	06/25/2002
6352884	Method for growing crystals having impurities and crystals prepared thereby A method for forming a crystal layer including the steps of (1) supplying first impurity atoms onto a surface of a crystal substrate to form a surfactant layer adsorbed on the surface, (2) supplying nucleus atoms which bond with the first impurity atoms, ...	03/05/2002
6297118	Vertical bipolar semiconductor power transistor with an interdigitzed geometry, with optimization of the base-to-emitter potential difference A transistor including an epitaxial layer with a first conductivity type, a base buried region with a second conductivity type, and a sinker base region with the second conductivity type which extends from a main surface of the transistor to the base buri...	10/02/2001
6284606	Process to achieve uniform groove depth in a silicon substrate A process for forming a groove in a semiconductor substrate, to be used to fabricate grooved gate, MOSFET devices, has been developed. The process features the use of an insulator mask, used as an etch mask for definition of the groove feature in the semi...	09/04/2001
6110803	Method for fabricating a high-bias device A method for fabricating a high-bias device is provided. The method contains forming an N-type epitaxial silicon layer over a P-type substrate. At least a first stacked double well is formed in the epitaxial silicon layer at a region, where a field oxide ...	08/29/2000
6083520	Bioactive feed The present invention relates to a bioactive feed pellet comprising besides commonly used nutritionally valuable components, a biologically active ingredient such as a therapeutically or prophylactically active compound, a vaccine, a pigment, a vitamin, a...	07/04/2000
6060372	Method for making a semiconductor device with improved sidewall junction capacitance A semiconductor device (10) of the present invention has a gate (32) insulatively disposed above the substrate, source and drain regions (36, 38) disposed near the surface in the substrate adjacent opposite sides of the gate (32), and a field oxide region...	05/09/2000
5981359	Method of manufacturing semiconductor device having isolation film on SOI substrate Disclosed is a method of manufacturing a semiconductor device having a reliable element isolation insulating film on an SOI substrate having an SOI layer. That is, the step of forming a semiconductor device on an SOI substrate includes the steps of sequen...	11/09/1999
5970352	Field effect transistor having elevated source and drain regions and methods for manufacturing the same A field effect transistor is manufactured by forming an isolating structure on a semiconductor substrate to define an active area. A gate structure is formed which is insulated from a surface of the active area of the semiconductor substrate. An amorphous...	10/19/1999
5953604	Methods for making compact P-channel/N-channel transistor structure A structure for a complementary field effect transistor includes a semiconductor body having a first body region of a first conductivity type and an adjoining second body region of an opposite second conductivity type. A buried dielectric region is locate...	09/14/1999
5910019	Method of producing silicon layer having surface controlled to be uneven or even A method of forming a silicon layer disclosed herein includes the steps of depositing an amorphous silicon layer on a substrate, irradiating a silane gas to the substrate, and performing an annealing process in a high vacuum or in an inert gas. The amorph...	06/08/1999
5824151	Vapor deposition method The method of forming a III-V group compound semiconductor crystalline layer on a semiconductor crystal containing at least V-group compound, includes the steps of: performing the crystal growth of the III-V compound semiconductor crystalline layer; and s...	10/20/1998
5744373	Method of manufacturing a semiconductor device An epitaxial layer is formed on a semiconductor substrate, and a CMOS circuit or a functional device is formed on an impurity layer deeply extended to reach the semiconductor substrate and on an epitaxial layer region surrounded by the impurity layer. Thu...	04/28/1998
5686343	Process for isolating a semiconductor layer on an insulator A process for the isolation of a semiconductor layer on an insulator. A process for isolating a semiconductor layer on an insulator is disclosed that includes the steps of: forming a first insulating layer on a semiconductor substrate, and opening a windo...	11/11/1997

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Class 438/442 - With epitaxial semiconductor layer formation