Class 438/441 - With electrolytic treatment step

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process including a step of electrochemical treatment of
No. of patents: 25
Last issue date: 02/13/2007

Number	Title	Issue Date
7176514	Method and configuration for reinforcement of a dielectric layer at defects by self-aligning and self-limiting electrochemical conversion of a substrate material A method for producing a dielectric layer on a substrate made of a conductive substrate material includes reducing a leakage current that flows through defects of the dielectric layer at least by a self-aligning and self-limiting electrochemical conversion of the co...	02/13/2007
7109097	Process sequence for doped silicon fill of deep trenches A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench up...	09/19/2006
7052997	Method to form etch and/or CMP stop layers In a DRAM fabrication process, a first oxide is provided over a transistor gate and over a substrate extending from under the gate. The deposition is non-conformal in that the oxide is thicker over the gate and over the substrate than it is on the side of the gate. ...	05/30/2006
7042148	Field emission display having reduced power requirements and method A field emission display includes a substrate and a plurality of emitters formed on columns on the substrate. The display also includes a porous dielectric layer formed on the substrate and the columns. The porous dielectric layer has an opening formed about each of...	05/09/2006
6953375	Manufacturing method of a field emission display having porous silicon dioxide insulating layer A field emission display includes a substrate and a plurality of emitters formed on columns on the substrate. The display also includes a porous dielectric layer formed on the substrate and the columns. The porous dielectric layer has an opening formed about each of...	10/11/2005
6677218	Method for filling trenches in integrated semiconductor circuits A method in which a recess is formed in the surface of a semiconductor substrate and a material is grown on the inner wall of the recess, includes the steps of producing an electrically insulating layer on the surface of the substrate outside the recess, ...	01/13/2004
6627500	Method of fabricating nitride read only memory A method of fabricating a nitride read only memory. A trapping dielectric sandwiched structure, including an insulation layer, a charge trap layer and an insulation layer, is formed on a substrate. An opening with indented sidewalls is formed in the insul...	09/30/2003
6559069	Process for the electrochemical oxidation of a semiconductor substrate In a process for the electrochemical oxidation of a semiconductor substrate that has recesses, such as for example, capacitor trenches or mesopores, formed in a silicon surface region, self-limited oxide formation takes place. The end of this formation is...	05/06/2003
6429151	Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers In one aspect, the invention includes a method of semiconductive wafer processing comprising forming a silicon nitride layer over a surface of a semiconductive wafer, the silicon nitride layer comprising at least two portions, one of said at least two por...	08/06/2002
6352893	Low temperature self-aligned collar formation A method for fabricating a semiconductor device, in accordance with the present invention, includes the steps of providing a semiconductor wafer having exposed p-doped silicon regions and placing the wafer in an electrochemical cell such that a solution i...	03/05/2002
6143627	Method for electrochemical oxidation of silicon A method for electrochemical local oxidation of silicon of selected regions of a silicon substrate of a semiconductor wafer avoids the formation of bird's beak structures of the prior art. The method involves the initial formation of a patterned generally...	11/07/2000
5877069	Method for electrochemical local oxidation of silicon A method for electrochemical local oxidation of silicon of selected regions of a silicon substrate of a semiconductor wafer avoids the formation of bird's beak structures of the prior art. The method involves the initial formation of a patterned generally...	03/02/1999
5863826	CMOS isolation utilizing enhanced oxidation of recessed porous silicon formed by light ion implantation A method for forming field isolation regions in multilayer semiconductor devices comprises the steps of masking active regions of the substrate, forming porous silicon in the exposed field isolation regions, removing the mask and oxidizing the substrate. ...	01/26/1999
5773353	Method of fabricating a semiconductor substrate A semiconductor substrate and a method of fabricating the same, and provides which the active area to be formed the active element is defined by the trench filled with any conductive polycrystal silicon in which any portion of a large number of the epitax...	06/30/1998
5604144	Method for fabricating active devices on a thin membrane structure using porous silicon or porous silicon carbide A method for fabricating semiconductor device comprises the steps of providing a substrate formed from a semiconductor material of a first conductivity type and converting a selected portion of the substrate to a porous semiconductor material. This partia...	02/18/1997
5156896	Silicon substrate having porous oxidized silicon layers and its production method In the silicon substrate having porous oxidized silicon layers of this invention, which consists of a silicon substrate the one surface of which is dotted with porous oxidized silicon dots, the residual internal stress (compression stress) is dispersedly ...	10/20/1992
5135884	Method of producing isoplanar isolated active regions A method is provided for forming isoplanar isolated regions in an integrated circuit, and an integrated circuit formed according to the same. According to a first disclosed embodiment, a first epitaxial layer is formed over a substrate, the substrate havi...	08/04/1992
4369561	Process for aligning diffusion masks with respect to isolating walls of coffers in integrated circuits A process in which P+ impurities are implanted in a P silicon substrate at the periphery of N+ buried layers, prior to growing an N epitaxial layer. Then an upward diffusion of the P+ impurities is caused up to the surface...	01/25/1983
4180416	Thermal migration-porous silicon technique for forming deep dielectric isolation A method for forming deep dielectric isolation regions of uniform porous silicon dioxide in silicon wafers having 100 face planes. Subcollector regions of one conductivity type are placed in a silicon substrate of opposite conductivity type. The substrate...	12/25/1979
4111720	Method for forming a non-epitaxial bipolar integrated circuit A method for forming a non-epitaxial bipolar integrated circuit comprising first forming in a silicon substrate of one-type of conductivity, recessed silicon dioxide regions extending into the substrate and laterally enclosing at least one silicon substra...	09/05/1978
4096619	Semiconductor scribing method This relates to the scribing and breaking of a semiconductor wafer into individual dies by anodizing the silicon in regions corresponding to the die boundaries. The regions are selectively anodized, and the anodization is continued until the anodized sili...	06/27/1978
4056415	Method for providing electrical isolating material in selected regions of a semiconductive material An integrated circuit having dielectric isolation is fabricated by growing a double epitaxial layer of N-type semiconductive material onto a P-type substrate. A dielectric layer is formed over the epitaxial layer and thereafter the dielectric and a portio...	11/01/1977
4016017	Integrated circuit isolation structure and method for producing the isolation structure A semiconductor device, such as a transistor, integrated circuit or the like, having a pattern of oxidized and densified porous silicon regions extending onto one of its major surfaces for isolating regions of the semiconductor is manufacturable by a rela...	04/05/1977
4014714	Method of producing a monolithic semiconductor device A combination insulating means comprised of a pn-junction overlaid with a SiO2 filling within a groove is provided between IC elements in a monolithic semiconductor device. Such combination insulating means electrically and mechanically isolate...	03/29/1977
3954523	Process for fabricating devices having dielectric isolation utilizing anodic treatment and selective oxidation A process for forming complete dielectrically isolated monocrystalline silicon regions on a substrate by depositing a first epitaxial silicon layer embodying an N-type impurity on a low resistivity silicon substrate embodying a P-type impurity, forming an...	05/04/1976

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Class 438/441 - With electrolytic treatment step