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| Number | Title | Issue Date |
| 7838390 | Methods of forming integrated circuit devices having ion-cured electrically insulating layers therein Methods of forming integrated circuit devices include forming a trench in a surface of semiconductor substrate and filling the trench with an electrically insulating region having a seam therein. The trench may be filled by depositing a sufficiently thick electrical... | 11/23/2010 |
| 7651924 | Method of fabricating semiconductor memory device in which an oxide film fills a trench in a semiconductor substrate A method of fabricating a semiconductor device includes applying a coating oxide film to a surface of a substrate including a semiconductor substrate so that a recess formed in the surface is filled with the coating oxide film, applying a steam oxidation treatment t... | 01/26/2010 |
| 7491622 | Process of forming an electronic device including a layer formed using an inductively coupled plasma A process of forming an electronic device can include patterning a semiconductor layer to define an opening extending to an insulating layer, wherein the insulating layer lies between a substrate and the semiconductor layer. After patterning a semiconductor layer, t... | 02/17/2009 |
| 7372514 | Active matrix type display device having antistatic lines used as repair lines An active matrix type display device includes inter-pad short-circuiting lines which are connected with signal lines, terminal portions which transmit signals from an IC chip to the signal lines, and a plurality of short-circuiting lines which are arranged outside t... | 05/13/2008 |
| 7354801 | Method for manufacturing semiconductor device In the case where an integrated circuit formed of a thin film is formed over a substrate and peeled from the substrate, a fissure (also referred to as crack) is generated in the integrated circuit in some cases. The present invention is to restrain the generation of... | 04/08/2008 |
| RE40061 | Multi-chip stacked devices A multiple stacked die device is disclosed that contains up to four dies and does not exceed the height of current single die packages. Close-tolerance stacking is made possible by a low-loop-profile wire-bonding operation and thin-adhesive layer between the stacked... | 02/12/2008 |
| 7320927 | In situ hardmask pullback using an in situ plasma resist trim process The present invention provides a process of manufacturing an isolation structure for use in a semiconductor device. The process includes forming an opening in a substrate through a patterned photoresist layer 225 and a hardmask layer 215 located over t... | 01/22/2008 |
| 7312130 | Methods of forming capacitor structures including L-shaped cavities Methods of forming capacitor structures may include forming an insulating layer on a substrate, forming a first capacitor electrode on the insulating layer, forming a capacitor dielectric layer on portions of the first capacitor electrode, and forming a second capac... | 12/25/2007 |
| 7276774 | Trench isolation structures for integrated circuits A dielectric film is formed by atomic layer deposition to conformally fill a narrow, deep trench for device isolation. The method of the illustrated embodiments includes alternately pulsing vapor-phase reactants in a string of cycles, where each cycle deposits no mo... | 10/02/2007 |
| 7273796 | Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry A method of fabricating integrated circuitry includes depositing a spin-on-dielectric over a semiconductor substrate. The spin-on-dielectric comprises a polysilazane. Only some of the polysilazane is etched from the semiconductor substrate. Such etching comprises ex... | 09/25/2007 |
| 7268838 | Array substrate for liquid crystal display device and method of manufacturing the same An array substrate for a liquid crystal display device includes a plurality of gate lines formed of a first material and a plurality of data lines formed of a second material on a substrate, the plurality of gate lines and the plurality of data lines crossing each o... | 09/11/2007 |
| 7268006 | Electronic device including a guest material within a layer and a process for forming the same A process for forming an electronic device includes forming a first layer over a substrate and placing a first liquid composition over a first portion of the first layer. The first liquid composition includes at least a first guest material and a first liquid medium... | 09/11/2007 |
| 7262097 | Method for forming floating gate in flash memory device A method for fabricating a nonvolatile memory device including successively forming a first oxide layer, an electrically conductive layer, a second oxide layer, a nitride layer and a third oxide layer on a semiconductor substrate. The method also includes patterning... | 08/28/2007 |
| 7259106 | Method of making a microelectronic and/or optoelectronic circuitry sheet A circuitry sheet (322) comprising an electronic device layer stack (304) containing electronic devices, e.g., thin-film transistors, or portions thereof, formed by removing material from both sides of the device layer stack. The circuitry sheet may be... | 08/21/2007 |
| 7238586 | Seamless trench fill method utilizing sub-atmospheric pressure chemical vapor deposition technique A seamless trench fill method utilizing ozone-assisted sub-atmospheric pressure chemical vapor deposition (SACVD) technique is provided. After the deposition of a SACVD silicon oxide film, the substrate is subjected to a steam anneal that is performed under H2 | 07/03/2007 |
| 7235477 | Multi-layer interconnection circuit module and manufacturing method thereof The present invention is directed to a multi-layer interconnection circuit module in which plural unit wiring layers are interlayer-connected to each other through a large number of via holes so that they are laminated and formed, wherein respective unit wiring laye... | 06/26/2007 |
| 7169632 | Radiation-emitting semiconductor component and method for producing the semiconductor component A radiation-emitting semiconductor component has an improved radiation efficiency. The semiconductor component has a multilayer structure with an active layer for generating radiation within the multilayer structure and also a window having a first and a second main... | 01/30/2007 |
| 7169714 | Method and structure for graded gate oxides on vertical and non-planar surfaces A method for forming an oxide layer on a vertical, non-planar semiconductor surface provides a low stress oxide layer having a pristine interface characterized by a roughness of less than 3 angstroms. The oxide layer includes a portion that is substantially amorphou... | 01/30/2007 |
| 7170156 | Laminar multi-layer piezoelectric roll component A multi-layer piezoelectric component includes a plurality of piezoelectric layers, a first inner electrode sheet, a second inner electrode sheet, a first outer electrode, and a second outer electrode. The piezoelectric layers are wound around an axis to form a lami... | 01/30/2007 |
| 7163869 | Shallow trench isolation structure with converted liner layer A STI (shallow trench isolation) structure is formed with a liner layer that is converted from an initial material to a subsequent material. For example, the liner layer is initially comprised of nitride during wet etch-back of a dielectric fill material comprised o... | 01/16/2007 |
| 7153736 | Methods of forming capacitors and methods of forming capacitor dielectric layers A method of forming a capacitor includes forming first capacitor electrode material over a semiconductor substrate. A silicon nitride comprising layer is formed over the first capacitor electrode material. The semiconductor substrate with silicon nitride comprising ... | 12/26/2006 |
| 7153776 | Method for reducing amine based contaminants A method for reducing resist poisoning is provided. The method includes forming a first structure in a dielectric on a substrate and reducing amine related contaminants from the dielectric and the substrate created after the formation of the first structure. The met... | 12/26/2006 |
| 7129590 | Stencil and method for depositing material onto a substrate A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die. ... | 10/31/2006 |
| 7129520 | Liquid crystal display device with a test pad for testing plural shorting bars An LCD device includes a plurality of data pads; an LCD panel defined by a plurality of pad regions; a first shorting bar connected to odd numbered data pads among the plurality of data pads; a second shorting bar connected to even numbered data pads among the plura... | 10/31/2006 |
| 7125785 | Mixed orientation and mixed material semiconductor-on-insulator wafer The present disclosure relates, generally, to a semiconductor substrate with a planarized surface comprising mixed single-crystal orientation regions and/or mixed single-crystal semiconductor material regions, where each region is electrically isolated. In accordanc... | 10/24/2006 |
| 7091073 | Semiconductor component, active matrix substrate for a liquid crystal display, and methods of manufacturing such component and substrate In contrast to conventional semiconductor components formed on a silicon substrate, the present invention aims at providing a transistor component functioning as a semiconductor component by being placed on an insulating substrate made of plastic and the like. The t... | 08/15/2006 |
| 7087979 | Bipolar transistor with an ultra small self-aligned polysilicon emitter The intrinsic base region of a bipolar transistor is formed to avoid a chemical interaction between the chemicals used in a chemical mechanical polishing step and the materials used to form the base region. The method includes the step of forming a trench in a layer... | 08/08/2006 |
| 7008880 | Method for fabricating semiconductor integrated circuit device A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vic... | 03/07/2006 |
| 6951804 | Formation of a tantalum-nitride layer A method of forming a tantalum-nitride layer (204) for integrated circuit fabrication is disclosed. Alternating or co-reacting pulses of a tantalum containing precursor and a nitrogen containing precursor are provided to a chamber (100) to form layers ... | 10/04/2005 |
| 6936509 | STI pull-down to control SiGe facet growth A SiGe bipolar transistor including a semiconductor substrate having a collector and sub-collector region formed therein, wherein the collector and sub-collector are formed between isolation regions that are also present in the substrate is provided. Each isolation ... | 08/30/2005 |
| 6936527 | Low voltage non-volatile memory cell A memory cell comprises a multilayer gate heating structure formed over a channel region between source and drain regions. The multilayer gate heating structure comprises polysilicon and metal silicide layers stacked over a similarly shaped gate oxide. When a progra... | 08/30/2005 |
| 6930019 | Method for forming MOS transistor Disclosed is a MOS transistor formation method including the steps of: forming a gate oxide film and a gate electrode on a device region of a silicon substrate; forming a nitride film spacer on one side surface of the gate electrode; forming an interlayer dielectric... | 08/16/2005 |
| 6927420 | Thin film transistor array panel and manufacturing method thereof Gate lines and a gate shorting bar connected to the gate lines, which include lower and upper films, are formed on a substrate. A gate insulating layer, semiconductors, and ohmic contacts are formed in sequence. Data lines and a data shorting bar connected to the da... | 08/09/2005 |
| 6919260 | Method of manufacturing a substrate having shallow trench isolation A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide ... | 07/19/2005 |
| 6905939 | Process for forming silicon oxide material A thin layer of silicon oxide is formed by cyclic introduction of a silicon-containing precursor gas and an oxidizing gas separated by an intervening purge step. The resulting thin oxide layer enables subsequent conventional CVD of oxide to produce a more uniform de... | 06/14/2005 |
| 6900121 | Laser thermal annealing to eliminate oxide voiding Oxide voiding is eliminated was substantially reduced by laser thermal annealing. Embodiments include fabricating flash memory devices by depositing a BPSG over spaced apart transistors as the first interlayer dielectric with voids formed in gaps between the transis... | 05/31/2005 |
| 6890831 | Method of fabricating semiconductor device A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by ... | 05/10/2005 |
| 6872631 | Method of forming a trench isolation A method of forming a trench isolation in a substrate includes the steps of forming a trench groove in a substrate, forming a first electrically insulating layer which fills the trench groove and extends over an upper surface of the substrate, where the first electr... | 03/29/2005 |
| 6861295 | Low-pin-count chip package and manufacturing method thereof A low-pin-count chip package including a die pad for receiving a semiconductor chip and a plurality of connection pads electrically coupled to the semiconductor chip. The semiconductor chip, the die pad, and the connection pads are encapsulated in a package body suc... | 03/01/2005 |
| 6846686 | Semiconductor light-emitting device and method of manufacturing the same A semiconductor light-emitting device, including a first substrate of a first conductivity type, a first bonding layer provided on the first substrate and consisting essentially of a GaP material of the first conductivity type, a second bonding layer provided on the... | 01/25/2005 |
