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| Number | Title | Issue Date |
| 8062953 | Semiconductor devices with extended active regions A method of making a semiconductor device is achieved in and over a semiconductor layer. A trench is formed adjacent to a first active area. The trench is filled with insulating material. A masking feature is formed over a center portion of the trench to expose a fi... | 11/22/2011 |
| 8048765 | Method for fabricating a MOS transistor with source/well heterojunction and related structure According to an exemplary embodiment, a method for fabricating a MOS transistor, such as an LDMOS transistor, includes forming a gate stack over a well. The method further includes forming a recess in the well adjacent to a first sidewall of the gate stack. The meth... | 11/01/2011 |
| 7994017 | Method of manufacturing silicon carbide self-aligned epitaxial MOSFET for high powered device applications A self-aligned, silicon carbide power metal oxide semiconductor field effect transistor includes a trench formed in a first layer, with a base region and then a source region epitaxially regrown within the trench. A window is formed through the source region and int... | 08/09/2011 |
| 7981764 | Method for fabricating semiconductor device with vertical gate A method for fabricating a semiconductor device includes: forming a stack structure including pillar regions whose upper portion has a wider width than a lower portion over a substrate, the lower portion including at least a conductive layer; forming a gate insulati... | 07/19/2011 |
| 7947569 | Method for producing a semiconductor including a foreign material layer A method for producing a semiconductor including a material layer. In one embodiment a trench is produced having two opposite sidewalls and a bottom, in a semiconductor body. A foreign material layer is produced on a first one of the two sidewalls of the trench. The... | 05/24/2011 |
| 7906406 | Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured A process for manufacturing a semiconductor wafer including SOI-insulation wells includes forming, in a die region of a semiconductor body, buried cavities and semiconductor structural elements, which traverse the buried cavities and are distributed in the die regio... | 03/15/2011 |
| 7863151 | Method for manufacturing semiconductor device A manufacturing method for manufacturing a super-junction semiconductor device forms an oxide film and a nitride film on an n-type epitaxial layer exhibiting high resistance on an n-type semiconductor substrate exhibiting low resistance. The portion of the nitride f... | 01/04/2011 |
| 7855126 | Methods of fabricating a semiconductor device using a cyclic selective epitaxial growth technique and semiconductor devices formed using the same Devices and methods of fabricating a conductive pattern of such devices comprise a non-single crystalline semiconductor pattern formed on a single crystalline semiconductor substrate, an insulating spacer formed on a sidewall of the non-single crystalline semiconduc... | 12/21/2010 |
| 7749859 | Semiconductor devices and methods of manufacture thereof Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece having a buried layer disposed beneath a top portion of the workpiece. An isolation ring structure is disposed within the t... | 07/06/2010 |
| 7655533 | Semiconductor device having reduced standby leakage current and increased driving current and method for manufacturing the same A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the... | 02/02/2010 |
| 7553742 | Method(s) of forming a thin layer A method of forming a thin layer including providing a first single-crystalline silicon layer partially exposed through an opening in an insulation pattern and forming an epitaxial layer on the first single-crystalline silicon layer and forming an amorphous silicon ... | 06/30/2009 |
| 7517771 | Method for manufacturing semiconductor device having trench A method for manufacturing a semiconductor device includes steps of: forming a trench on a semiconductor substrate, which is made of silicon; and filling the trench with an epitaxial layer. The epitaxial layer is made of silicon, and the step of filling the trench i... | 04/14/2009 |
| 7439155 | Isolation techniques for reducing dark current in CMOS image sensors Isolation methods and devices for isolating regions of a semiconductor device. The isolation method and structure include forming an isolating trench in an active area and filling the trench with a doped conductive material containing silicon. Suitable conductive ma... | 10/21/2008 |
| 7435656 | Semiconductor device of transistor structure having strained semiconductor layer The semiconductor device comprises a p type Si substrate 10; a SiGe buffer layer 12 formed on the p type Si substrate 10 and having element isolation grooves 16 formed in the surface, which define an active region 18; a SiGe regrow... | 10/14/2008 |
| 7432605 | Overlay mark, method for forming the same and application thereof An overlay mark for checking the alignment accuracy between a lower layer and a lithography process for defining an upper layer is described, including a part of the lower layer having two first x-directional trenches, two first y-directional trenches, two second x-... | 10/07/2008 |
| 7407860 | Method of fabricating a complementary semiconductor device having a strained channel p-transistor Compression stress applying portions 20 of SiGe film are formed in the source/drain regions of the p-MOSA region 30a. Then, impurities are implanted in the p-MOS region 30a and the n-MOS region 30b to form shallow jun... | 08/05/2008 |
| 7402499 | Semiconductor device and method of manufacturing the same A semiconductor device includes a semiconductor substrate formed with a plurality of first element isolation trenches having respective first opening widths and a plurality of second element isolation trenches having larger opening widths than the first opening widt... | 07/22/2008 |
| 7390710 | Protection of tunnel dielectric using epitaxial silicon Layers of epitaxial silicon are used to protect the tunnel dielectric layer of a floating-gate memory cell from excessive oxidation or removal during the formation of shallow trench isolation (STI) regions. Following trench formation, the layers of epitaxial silicon... | 06/24/2008 |
| 7387941 | Method for fabricating semiconductor device A method for manufacturing a semiconductor device in accordance with an embodiment of the present invention provides a channel region formed over a device isolation structure to form a semiconductor device including a SOI (Silicon-on-Insulator) channel structure, th... | 06/17/2008 |
| 7371656 | Method for forming STI of semiconductor device A method for forming a STI of a semiconductor device includes steps of sequentially forming a pad oxide film and a pad nitride film on the semiconductor device and carrying out a pattern process PR; etching the pad oxide film and the nitride film and carrying out a ... | 05/13/2008 |
| 7368345 | Flash memory devices and methods of fabricating the same Flash memory devices and methods of fabricating the same are disclosed. A disclosed method comprises doping at least one active region of a substrate, and forming an etching mask layer on the active region. The etching mask layer defines an opening exposing a portio... | 05/06/2008 |
| 7358596 | Device isolation for semiconductor devices Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a semiconductive substrate; a second trench extending the overall trench depth in... | 04/15/2008 |
| 7358144 | Method for fabricating semiconductor device A method for fabricating a semiconductor device includes forming first, second, and third device structures in a semiconductor substrate. Each device structure includes a first film, a second film over the first film, and a third film over the second film. The first... | 04/15/2008 |
| 7354826 | Method for forming memory array bitlines comprising epitaxially grown silicon and related structure According to one exemplary embodiment, a method of fabricating a bitline in a memory array includes forming a trench in a substrate, where the trench has sidewalls and a bottom surface. The method further includes performing a selective epitaxial process to partiall... | 04/08/2008 |
| 7351633 | Method of fabricating semiconductor device using selective epitaxial growth A method of fabricating a semiconductor device using selective epitaxial growth (SEG) is disclosed. The method comprises; forming a seed window exposing a portion of a substrate through an interlayer insulating layer, growing a single crystal silicon SEG layer in th... | 04/01/2008 |
| 7319062 | Trench isolation method with an epitaxially grown capping layer A trench isolation method for a semiconductor device, wherein a capping layer formed of an insulating material fills a recess generated at a border edge between an active area and an inactive area. The border edge is defined by a trench filled with insulating materi... | 01/15/2008 |
| 7294536 | Process for manufacturing an SOI wafer by annealing and oxidation of buried channels A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.... | 11/13/2007 |
| 7294902 | Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation The invention relates to a trench isolation with a self-aligning surface sealing and a fabrication method for said surface sealing. In this case, the surface sealing may have an overlap region of the substrate surface or a receded region into which extends an electr... | 11/13/2007 |
| 7268043 | Semiconductor device and method of manufacturing the same A semiconductor device and a method of manufacturing the same is disclosed. A trench is formed in an active region of a semiconductor substrate. A doped layer is formed on the inner walls of the trench. The trench is filled up with a first semiconductor layer. A gat... | 09/11/2007 |
| 7268058 | Tri-gate transistors and methods to fabricate same Embodiments of the invention provide a method for effecting uniform silicon body height for silicon-on-insulator transistor fabrication. For one embodiment, a sacrificial oxide layer is disposed upon a semiconductor substrate. The oxide layer is etched to form a tre... | 09/11/2007 |
| 7262105 | Semiconductor device with silicided source/drains In a semiconductor device, a relatively deep germanium implant and activation thereof precedes deposition of the nickel for nickel silicide formation. The activation of the germanium causes the lattice constant in the region of the implant to be increased over the l... | 08/28/2007 |
| 7259069 | Semiconductor device and method of manufacturing the same A semiconductor device and a method of manufacturing the same is disclosed. A trench is formed in an active region of a semiconductor substrate. A doped layer is formed on the inner walls of the trench. The trench is filled up with a first semiconductor layer. A gat... | 08/21/2007 |
| 7259074 | Trench isolation method in flash memory device The present invention provides a trench isolation method in a flash memory device, by which stability and reliability of the device are enhanced in a manner of forming a pad oxide layer thick in the vicinity of an edge of a trench isolation layer. The present invent... | 08/21/2007 |
| 7247533 | Method of fabricating semiconductor device using selective epitaxial growth A method of fabricating a semiconductor device uses selective epitaxial growth (SEG), by which leakage current generation is minimized using lateral SEG growth in case a contact intrudes a shallow track isolation feature. The method includes steps of forming a sidew... | 07/24/2007 |
| 7244659 | Integrated circuits and methods of forming a field effect transistor Integrated circuits and methods of forming field effect transistors are disclosed. In one aspect, an integrated circuit includes a semiconductor substrate comprising bulk semiconductive material. Electrically insulative material is received within the bulk semicondu... | 07/17/2007 |
| 7239003 | Isolation techniques for reducing dark current in CMOS image sensors Isolation methods and devices for isolating regions of a semiconductor device. The isolation method and structure include forming an isolating trench in an active area and filling the trench with a doped conductive material containing silicon. Suitable conductive ma... | 07/03/2007 |
| 7221023 | Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same According to some embodiments of the invention, a method includes preparing a semiconductor substrate having an active region, doping channel ions in the active region, forming a planarized selective epitaxial growth (SEG) layer in a predetermined region of the acti... | 05/22/2007 |
| 7217634 | Methods of forming integrated circuitry The invention includes methods of forming integrated circuitry. In one implementation, a method of forming an integrated circuit includes forming a plurality of isolation trenches within semiconductive silicon-comprising material. The isolation trenches comprise sid... | 05/15/2007 |
| 7217633 | Methods for fabricating an STI film of a semiconductor device Methods for fabricating a shallow trench isolation (STI) of a semiconductor device are disclosed. A disclosed method includes: forming a trench on a semiconductor substrate, forming an oxide layer on the semiconductor substrate and the trench, forming a photoresist ... | 05/15/2007 |
| 7199017 | Methods of forming semiconductor circuitry The invention includes a method of forming semiconductor circuitry. A monocrystalline silicon substrate is provided, and a mask is formed which covers a first portion of the substrate and leaves a second portion uncovered. A trench is formed in the uncovered portion... | 04/03/2007 |
