Did You Know...
...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
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| Number | Title | Issue Date |
| 7371645 | Method of manufacturing a field effect transistor device with recessed channel and corner gate device Fabrication of recessed channel array transistors (RCAT) with a corner gate device includes forming pockets between a semiconductor fin that includes a gate groove and neighboring shallow trench isolations that extend along longs sides of the semiconductor fin. A pr... | 05/13/2008 |
| 7323394 | Method of producing element separation structure A method of producing an element separation structure includes the steps of: forming a first thermal oxide film on the substrate; forming a silicon nitride film on the first thermal oxide film; removing the first thermal oxide film and the silicon nitride film in an... | 01/29/2008 |
| 7271068 | Method of manufacture of semiconductor device A power MISFET, which has a desired gate breakdown voltage, can be manufactured will controlling an increase in parasitic capacitance. After depositing a polycrystalline silicon film on a substrate and embedding groove portions in the polycrystalline silicon film by... | 09/18/2007 |
| 7253462 | Semiconductor device A semiconductor device includes a semiconductor element that is set up on a semiconductor layer, a light shielding wall that is set up around the semiconductor element, a hole that is set up on the light shielding wall, and a wiring layer that is electrically connec... | 08/07/2007 |
| 7247584 | System and method for selectively increasing surface temperature of an object A system and method for selectively increasing the thermal effect of a radiant energy source to the surface of an object relative to the substrate is described in the context of rapid thermal processing of semiconductor wafers, and apparatus produced therefrom. A ra... | 07/24/2007 |
| 7238587 | Semiconductor device fabrication method According to the present invention, there is provided a semiconductor device fabrication method that coats a semiconductor substrate with a silazane perhydride polymer solution prepared by dispersing a silazane perhydride polymer in a solvent containing carbon, ther... | 07/03/2007 |
| 7205208 | Method of manufacturing a semiconductor device In a method of manufacturing a semiconductor device, a first trench is formed in a first region of a substrate and a second trench is formed in a second region of the substrate different from the first region. A depth of the first trench is less than that of the sec... | 04/17/2007 |
| 7205248 | Method of eliminating residual carbon from flowable oxide fill Methods of forming an oxide layer such as high aspect ratio trench isolations, and treating the oxide substrate to remove carbon, structures formed by the method, and devices and systems incorporating the oxide material are provided. ... | 04/17/2007 |
| 7160787 | Structure of trench isolation and a method of forming the same The present invention is directed toward a structure and method by which trench isolation for a wide trench and a narrow trench formed in first and second regions of a substrate may be achieved without formation of a void in an isolation layer, a groove exposing an ... | 01/09/2007 |
| 7135369 | Atomic layer deposited ZrAlO dielectric layers including ZrAlO An atomic layer deposited ZrAlxOy dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Pulsing a zirconium-c... | 11/14/2006 |
| 7102185 | Lightshield architecture for interline transfer image sensors An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring ... | 09/05/2006 |
| 7078315 | Method for eliminating inverse narrow width effects in the fabrication of DRAM device The present invention provides a method for eliminating inverse narrow width effects in the fabrication of DRAM devices. A semiconductor substrate is provided having thereon a shallow trench. The shallow trench surrounds an active area. A non-doped silicate glass (N... | 07/18/2006 |
| 7074690 | Selective gap-fill process Methods for selectively depositing a solid material on a substrate having gaps of dimension on the order of about 100 nm or less are disclosed. The methods involve exposing the substrate to a precursor of a solid material, such that the precursor forms liquid region... | 07/11/2006 |
| 7012010 | Methods of forming trench isolation regions In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and then converted, at least some of the silanol, to a compound includin... | 03/14/2006 |
| 7009811 | Surface planarization processes for the fabrication of magnetic heads and semiconductor devices Surface planarization processes for the fabrication of magnetic heads and semiconductor devices are described herein. In one illustrative example, magnetic structures are formed over a substrate and insulator materials are deposited over and around the magnetic stru... | 03/07/2006 |
| 6979590 | Methods of making electromechanical three-trace junction devices Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an up... | 12/27/2005 |
| 6979610 | Semiconductor device fabrication method The semiconductor device fabrication method comprises the step of forming a first insulation film 14 over a semiconductor substrate 10; the step of forming a semiconductor film 16 over the first insulation film 14; the step of forming a r... | 12/27/2005 |
| 6946348 | Low voltage high density trench-gated power device with uniformity doped channel and its edge termination technique Merging together the drift regions in a low-power trench MOSFET device via a dopant implant through the bottom of the trench permits use of a very small cell pitch, resulting in a very high channel density and a uniformly doped channel and a consequent significant r... | 09/20/2005 |
| 6943088 | Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding In a trench isolation structure of a semiconductor device, oxide liners are formed within the trenches, wherein a non-oxidizable mask is employed during various oxidation steps, thereby creating different types of liner oxides and thus different types of corner roun... | 09/13/2005 |
| 6939817 | Removal of carbon from an insulative layer using ozone A method of removing residual carbon deposits from a flowable, insulative material. The flowable, insulative material comprises silicon, carbon, and hydrogen and is a flowable oxide material or a spin-on, flowable oxide material. The residual carbon deposits are rem... | 09/06/2005 |
| 6919612 | Biasable isolation regions using epitaxially grown silicon between the isolation regions An improved isolation structure for use in an integrated circuit and a method for making the same is disclosed. In a preferred embodiment, an silicon dioxide, polysilicon, silicon dioxide stack is formed on a crystalline silicon substrate. The active areas are etche... | 07/19/2005 |
| 6916374 | Atomic layer deposition methods and atomic layer deposition tools An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effect... | 07/12/2005 |
| 6888212 | Method for trench isolation by selective deposition of low temperature oxide films A method of forming isolation regions in a silicon substrate comprising the steps of forming a trench in the silicon substrate, filling the trench with a silanol polymer material then heating the silanol polymer material so that silicon dioxide is formed in the tren... | 05/03/2005 |
| 6872631 | Method of forming a trench isolation A method of forming a trench isolation in a substrate includes the steps of forming a trench groove in a substrate, forming a first electrically insulating layer which fills the trench groove and extends over an upper surface of the substrate, where the first electr... | 03/29/2005 |
| 6838355 | Damascene interconnect structures including etchback for low-k dielectric materials A method for forming back-end-of-line (BEOL) interconnect structures in disclosed. The method and resulting structure includes etchback for low-k dielectric materials. Specifically, a low dielectric constant material is integrated into a dual or single damascene wir... | 01/04/2005 |
| 6838356 | Method of forming a trench isolation The present invention provides a method of forming a trench isolation in a substrate, which comprises the steps of: forming a trench groove in a substrate; forming a first electrically insulating layer which fills the trench groove and extends over an upper surface ... | 01/04/2005 |
| 6828162 | System and method for active control of BPSG deposition A system for monitoring and controlling a boron phosphorous doped silicon oxide (BPSG) deposition and reflow process is provided. The system includes one or more light sources, each light source directing light to one or more portions of a wafer upon which BPSG is d... | 12/07/2004 |
| 6794270 | Method for shallow trench isolation fabrication and partial oxide layer removal A method for forming thoroughly deposited shallow trench isolation. A first oxide layer is formed conformally over the surface of a semiconductor substrate and on a trench thereon with an aspect ratio greater than 3. A liquid etching shield is filled in the trench b... | 09/21/2004 |
| 6746934 | Atomic layer doping apparatus and method An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are diffused into the substrate. Each doping region is chemically separated fro... | 06/08/2004 |
| 6720233 | Method of producing trench insulation in a substrate In a method of producing a trench insulation in a silicon substrate a first silicon-oxide layer is deposited on a front surface of a sequence of layers including the silicon substrate. Then the first silicon-oxide layer is structured so as to define a mask for a sub... | 04/13/2004 |
| 6682820 | Recession resistant coated ceramic part A recession resistant coated ceramic part. The ceramic part has a ceramic substrate and a recession resistant coating disposed on the substrate. The coating includes a plurality of layers diffusion bonded to each other and to the substrate respectively. T... | 01/27/2004 |
| 6635550 | Semiconductor on insulator device architecture and method of construction An SOI architecture is provided that comprises an inner substrate 10 which has a buried conductor layer 12 formed on an outer surface thereof. A bonding layer 14 is used to provide a cohesive bond with a buried insulator layer 18. The semiconductor device... | 10/21/2003 |
| 6620703 | Method of forming an integrated circuit using an isolation trench having a cavity formed by reflowing a doped glass mask layer Isolation characteristics of an isolation trench can be enhanced. Elements to be isolated by an isolation trench (STI 2) are formed in active semiconductor regions shown by arrows 30 and 31 on a semiconductor substrate 1. The STI 2 is filled with SiOF.... | 09/16/2003 |
| 6583028 | Methods of forming trench isolation regions In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and then converted, at least some of the silanol, to a compou... | 06/24/2003 |
| 6495430 | Process for fabricating sharp corner-free shallow trench isolation structure A process for fabricating a sharp corner-free shallow trench isolation structure. First, a SiON layer and a mask layer are successively formed on a semiconductor substrate. The SiON layer and mask layer are patterned to form an opening, exposing the subst... | 12/17/2002 |
| 6465325 | Process for depositing and planarizing BPSG for dense trench MOSFET application A process for filling a trench having sidewalls and a floor in a semiconductor device or integrated circuit comprises: forming an insulating layer on the sidewalls and floor of a trench in a semiconductor substrate, substantially filling the trench with s... | 10/15/2002 |
| 6455394 | Method for trench isolation by selective deposition of low temperature oxide films A method of forming isolation regions in a silicon substrate comprising the steps of forming a trench in the silicon substrate, filling the trench with a silanol polymer material then heating the silanol polymer material so that silicon dioxide is formed ... | 09/24/2002 |
| 6426015 | Method of reducing undesired etching of insulation due to elevated boron concentrations A method is provided for reducing elevated boron concentrations (denoted as "boron spikes") in an insulating layer containing silicon, boron and other elements where the layer interfaces with surfaces of a semiconductor device. The method includes the ste... | 07/30/2002 |
| 6417071 | Sub-atmospheric pressure thermal chemical vapor deposition (SACVD) trench isolation method with attenuated surface sensitivity A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then formed upon the substrate and within the trench a gap filling silicon oxide trench fill layer employing an ... | 07/09/2002 |
| 6277706 | Method of manufacturing isolation trenches using silicon nitride liner In fabrication of a semiconductor device, firstly an isolation trench is formed on a substrate to isolate a plurality of semiconductor elements, and then a thermal oxide film is formed on a sidewall of the trench, whereupon a silicon oxide film is formed ... | 08/21/2001 |
