Quotables
"That’s an amazing invention, but who would ever want to use one of them?"
President Rutherford B. Hayes ; Said in 1876, after Alexander Graham Bell demonstrated the telephone to him at the White House
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8114756 | Method and manufacture for high voltage gate oxide formation after shallow trench isolation formation A method and manufacture for fabrication of flash memory is provided. In fabricating the periphery region of the flash memory, the low voltage gate oxides and high voltage gate oxides are grown to the same height as each other prior to STI etching. After STI etching... | 02/14/2012 |
| 8080463 | Semiconductor device manufacturing method and silicon oxide film forming method A semiconductor device manufacturing method has forming element isolation trenches in a semiconductor substrate, forming a silicon compound film in insides of the element isolation trenches in order to embed the element isolation trenches, conducting a first oxidati... | 12/20/2011 |
| 8053327 | Method of manufacture of an integrated circuit system with self-aligned isolation structures An integrated circuit system is provided including providing a substrate, forming an isolation structure base in the substrate without removal of the substrate, and forming a first transistor in the substrate next to the isolation structure base. ... | 11/08/2011 |
| 7825003 | Method of doping field-effect-transistors (FETs) with reduced stress/strain relaxation and resulting FET devices A method for fabricating a FET transistor for an integrated circuit by the steps of forming recesses in a substrate on both sides of a gate on the substrate, halo/extension ion implanting into the recesses, and filling the recesses with embedded strained layers comp... | 11/02/2010 |
| 7816225 | Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation Methods and apparatus provide for forming a semiconductor-on-insulator (SOI) structure, including subjecting a implantation surface of a donor semiconductor wafer to an ion implantation step to create a weakened slice in cross-section defining an exfoliation layer o... | 10/19/2010 |
| 7790567 | Semiconductor device and method for forming the same Provided is a semiconductor and a method for forming the same. The method includes forming a buried insulating layer locally in a substrate. The substrate is etched to form an opening exposing the buried insulating layer, and a silicon pattern spaced in at least one... | 09/07/2010 |
| 7781302 | Methods of fabricating semiconductor devices having isolation regions formed from annealed oxygen ion implanted regions Methods of fabricating a semiconductor device include forming a mask pattern on a semiconductor substrate and which exposes defined regions of the semiconductor substrate. Oxygen ions are implanted into the defined regions of the semiconductor substrate using the ma... | 08/24/2010 |
| 7767539 | Method of fabricating patterned SOI devices and the resulting device structures A method and resulting structure for fabricating a FET transistor for an integrated circuit on a silicon oxide (SOI) substrate comprising the steps of forming recesses in a substrate on both sides of a gate on the substrate, implanting oxygen ions into the recesses,... | 08/03/2010 |
| 7566629 | Patterned silicon-on-insulator layers and methods for forming the same In an aspect, a method is provided for forming a silicon-on-insulator (SOI) layer. The method includes the steps of (1) providing a silicon substrate; (2) selectively implanting the silicon substrate with oxygen using a low implant energy to form an ultra-thin patte... | 07/28/2009 |
| 7566630 | Buried silicon dioxide / silicon nitride bi-layer insulators and methods of fabricating the same Embodiments of the present invention relate to the fabrication of a buried bi-layer insulator of silicon oxide and silicon nitride in a microelectronic substrate, and to the buried silicon oxide/silicon nitride bi-layer insulator itself. The buried silicon oxide/sil... | 07/28/2009 |
| 7482243 | Ultra-thin Si channel MOSFET using a self-aligned oxygen implant and damascene technique The present invention provides a method of forming a thin channel MOSFET having low external resistance. The method comprises forming a dummy gate region atop a substrate; implanting oxide forming dopant through said dummy gate to create a localized oxide region in ... | 01/27/2009 |
| 7465642 | Methods for forming semiconductor structures with buried isolation collars A semiconductor structure including a trench formed in a substrate and a buried isolation collar that extends about sidewalls of the trench. The buried isolation collar is constituted by an insulator formed from a buried porous region of substrate material. The poro... | 12/16/2008 |
| 7439137 | Method for manufacturing semiconductor device In a MOSFET, after an element region is formed, a wiring layer is formed subsequently to a barrier metal layer, and hydrogen annealing is performed. However, in the case of an n-channel MOSFET, a threshold voltage is lowered due to an occlusion characteristic of the... | 10/21/2008 |
| 7429514 | Use of selective oxidation to form asymmetrical oxide features during the manufacture of a semiconductor device A sidewall oxidation process for use during the formation of a transistor such as a flash memory cell allows for improved control of a gate oxide profile. The method comprises doping transistor source and drain regions to different doping levels, then performing a t... | 09/30/2008 |
| 7384857 | Method to fabricate completely isolated silicon regions The construction of Shallow Trench Isolation, STI, regions is integrated in to a SIMOX fabrication process for a Silicon On Insulator, SOI, wafer. Prior to the beginning of the SOI process, a preferred nitrogen (N2) implant is applied to the silicon wafer... | 06/10/2008 |
| 7368359 | Method for manufacturing semiconductor substrate and semiconductor substrate A semiconductor substrate (100) is acquired by forming a mask with a target thickness on a major surface of a single-crystal silicon substrate, implanting oxygen ions to the major surface at a high temperature, forming a surface protection layer for blocking ... | 05/06/2008 |
| 7361570 | Semiconductor device having an implanted precipitate region and a method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor and an integrated circuit including the same. The semiconductor device 100, among other things, may include a substrate 110 having a lattice structure and having an... | 04/22/2008 |
| 7358161 | Methods of forming transistor devices associated with semiconductor-on-insulator constructions The invention encompasses a method of forming a semiconductor on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass. The insulative mass comprises silicon dioxide. A band of material is fo... | 04/15/2008 |
| 7323379 | Fabrication process for increased capacitance in an embedded DRAM memory An embedded memory system includes an array of dynamic random access memory (DRAM) cells, which are isolated with deep trench isolation, and logic transistors, which are isolated with shallow trench isolation. Each DRAM cell includes an access transistor and a capac... | 01/29/2008 |
| 7321144 | Semiconductor device employing buried insulating layer and method of fabricating the same A semiconductor device employs an asymmetrical buried insulating layer, and a method of fabricating the same. The semiconductor device includes a lower semiconductor substrate. An upper silicon pattern is located on the lower semiconductor substrate. The upper silic... | 01/22/2008 |
| 7314792 | Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo... | 01/01/2008 |
| 7312122 | Self-aligned element isolation film structure in a flash cell and forming method thereof A self-aligned element isolation film structure in a flash memory cell and a forming method thereof are disclosed. An example method of forming a self-aligned element isolation film structure in a flash memory cell forms an insulating layer on a semiconductor substr... | 12/25/2007 |
| 7312092 | Methods for fabrication of localized membranes on single crystal substrate surfaces A method is provided for fabricating thin membrane structures in localized surface regions of a single crystal substrate. In the method, ion implantation masks are patterned on the surface of the single crystal substrate with openings that define the localized surfa... | 12/25/2007 |
| 7294563 | Semiconductor on insulator vertical transistor fabrication and doping process A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conform... | 11/13/2007 |
| 7279376 | Method for manufacturing semiconductor device The present invention provides a technology for forming the trenches having different depths in one semiconductor substrate, which enables easily conducting the photo resist process employed for the etch process and forming trenches at higher depth dimension accurac... | 10/09/2007 |
| 7273788 | Ultra-thin semiconductors bonded on glass substrates A method for forming a semiconductor on insulator structure includes providing a glass substrate, providing a semiconductor wafer, and performing a bonding cut process on the semiconductor wafer and the glass substrate to provide a thin semiconductor layer bonded to... | 09/25/2007 |
| 7273797 | Methods of forming semiconductor-on-insulator constructions The invention encompasses a method of forming a semiconductor-on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass. The insulative mass comprises silicon dioxide. A band of material is fo... | 09/25/2007 |
| 7271389 | Neutron detection device and method of manufacture A neutron detection device includes a neutron conversion layer in close proximity to an active semiconductor layer. The device is preferably based on the modification of existing conventional semiconductor memory devices. The device employs a conventional SRAM memor... | 09/18/2007 |
| 7262110 | Trench isolation structure and method of formation In general, the present invention discloses at least one trench isolation region formed in a semiconductor substrate to electrically and/or optically isolate at least one active region from another active region. The at least one trench isolation region comprises a ... | 08/28/2007 |
| 7262428 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 08/28/2007 |
| 7259053 | Methods for forming a device isolation structure in a semiconductor device Methods of forming a device isolation structure in a semiconductor device are disclosed. A disclosed method comprises forming a p-type well and an n-type well in a semiconductor substrate; sequentially depositing a gate insulating layer and a gate electrode material... | 08/21/2007 |
| 7259074 | Trench isolation method in flash memory device The present invention provides a trench isolation method in a flash memory device, by which stability and reliability of the device are enhanced in a manner of forming a pad oxide layer thick in the vicinity of an edge of a trench isolation layer. The present invent... | 08/21/2007 |
| 7250351 | Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors Enhanced silicon-on-insulator transistors and methods are provided for implementing enhanced silicon-on-insulator transistors. The enhanced silicon-on-insulator (SOI) transistors include a thin buried oxide (BOX) layer under a device channel and a thick self-aligned... | 07/31/2007 |
| 7247569 | Ultra-thin Si MOSFET device structure and method of manufacture The present invention comprises a method for forming an ultra-thin channel MOSFET and the ultra-thin channel MOSFET produced therefrom. Specifically, the method comprises providing an SOI substrate having a buried insulating layer underlying an SOI layer; forming a ... | 07/24/2007 |
| 7235427 | Method for treating substrates for microelectronics and substrates obtained by said method An embodiment of a multilayer wafer according to the invention includes a base substrate, a first layer associated with the base substrate, and a second layer on the first layer on side opposite from the base substrate in an axial direction and having a lateral edge... | 06/26/2007 |
| 7229894 | Active cell isolation body of a semiconductor device and method for forming the same An active cell isolation body of a semiconductor device and a method for forming the same are disclosed. An example active cell isolation body of a semiconductor device includes a trench with a depth in a semiconductor substrate at an active cell isolation region, a... | 06/12/2007 |
| 7226846 | Method of dry etching semiconductor substrate to reduce crystal defects in a trench A silicon oxide film (12) and a silicon nitride film (13) are sequentially formed over a silicon substrate (11) having a plane orientation (100). A trench (14) is formed with the patterned silicon nitride (13) as a mask. Argon is i... | 06/05/2007 |
| 7226833 | Semiconductor device structure and method therefor Two different transistors types are made on different crystal orientations in which both are formed on SOI. A substrate has an underlying semiconductor layer of one of the crystal orientations and an overlying layer of the other crystal orientation. The underlying l... | 06/05/2007 |
| 7217589 | Deep photodiode isolation process A barrier implanted region of a first conductivity type located below an isolation region of a pixel sensor cell and spaced from a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The barrier implanted region is forme... | 05/15/2007 |
| 7217632 | Isolation methods in semiconductor devices Methods of forming a device isolation layer in a semiconductor substrate are disclosed. A disclosed method includes: forming a trench in a field area of a semiconductor substrate, growing a SiON layer on an inside of the trench by annealing in an ambience of NO gas,... | 05/15/2007 |
