Class 438/416 - With epitaxial semiconductor formation

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making junction isolated laterally spaced semiconductor
No. of patents: 81
Last issue date: 02/14/2012

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Number	Title	Issue Date
8114755	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess por...	02/14/2012
7951685	Method for manufacturing semiconductor epitaxial crystal substrate The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method fo...	05/31/2011
7790566	Semiconductor surface treatment for epitaxial growth A method is disclosed for preparing a surface of a Group III-Group V compound semiconductor for epitaxial deposition. The III-V semiconductor surface is treated with boron (B) at a temperature of between about 250° C. and about 350° C. A suitable form for supplyin...	09/07/2010
7338834	Strained silicon with elastic edge relaxation A thin blanket epitaxial layer of SiGe is grown on a silicon substrate to have a biaxial compressive stress in the growth plane. A thin epitaxial layer of silicon is deposited on the SiGe layer, with the SiGe layer having a thickness less than its critical thickness...	03/04/2008
7268646	Temperature controlled MEMS resonator and method for controlling resonator frequency There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a temperature compensated microelectromechanical resonator as well as fabricating, manufacturing, providing and/or controlling microelectromechanical reso...	09/11/2007
7250333	Method of fabricating a linearized output driver and terminator A method and apparatus for a linearized output driver and terminator is described. In one embodiment the method includes forming a gate electrode on a substrate, the portion of the substrate covered by the gate electrode defining a channel. The method further includ...	07/31/2007
7227173	Semiconductor devices and methods A method of forming a semiconductor device includes the following steps: providing a plurality of semiconductor layers; providing means for coupling signals to and/or from layers of the device; providing a quantum well disposed between adjacent layers of the device;...	06/05/2007
7205609	Methods of forming semiconductor devices including fin structures and related devices A method of forming a semiconductor device may include forming a fin structure extending from a substrate. The fin structure may include first and second source/drain regions and a channel region therebetween, and the first and second source/drain regions may extend...	04/17/2007
7199017	Methods of forming semiconductor circuitry The invention includes a method of forming semiconductor circuitry. A monocrystalline silicon substrate is provided, and a mask is formed which covers a first portion of the substrate and leaves a second portion uncovered. A trench is formed in the uncovered portion...	04/03/2007
7183576	Epitaxial and polycrystalline growth of SiGeCand SiCalloy layers on Si by UHV-CVD A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique ...	02/27/2007
7170126	Structure of vertical strained silicon devices A trench capacitor vertical-transistor DRAM cell in a SiGe wafer compensates for overhang of the pad nitride by forming an epitaxial strained silicon layer on the trench walls that improves transistor mobility, removes voids from the poly trench fill and reduces res...	01/30/2007
7135364	Method of fabricating semiconductor integrated circuit The lateral pnp transistor encompasses a p-type semiconductor substrate, an n-type first buried region disposed on the semiconductor substrate, an n-type uniform base region disposed on the first buried region, an n-type first plug region disposed in the uniform bas...	11/14/2006
7118976	Methods of manufacturing MOSFETs in semiconductor devices Methods of fabricating MOSFETs in semiconductor/r devices are disclosed. One example method may include forming an isolation layer on a semiconductor substrate and forming a capping layer thereon, forming an epitaxial active region which is not covered with the isol...	10/10/2006
7115955	Semiconductor device having a strained raised source/drain A manufacturable way to recess silicon that employs an end point detection method for the recess etch and allows tight tolerances on the recess is described for fabricating a strained raised source/drain layer. The method includes forming a monolayer comprising oxyg...	10/03/2006
7081391	Integrated circuit devices having buried insulation layers and methods of forming the same An integrated circuit device includes a gate electrode formed on an active region of an integrated circuit device and on a field isolation layer adjacent to the active region. A source region and a drain region are in the active region on alternate sides of the gate...	07/25/2006
7068125	Temperature controlled MEMS resonator and method for controlling resonator frequency There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a temperature compensated microelectromechanical resonator as well as fabricating, manufacturing, providing and/or controlling microelectromechanical reso...	06/27/2006
7063751	Semiconductor substrate formed by epitaxially filling a trench in a semiconductor substrate with a semiconductor material after smoothing the surface and rounding the corners A trench is formed in a semiconductor substrate through a mask composed of a silicon oxide film formed on the semiconductor substrate. Then, an edge portion at an opening portion of the mask is etched so that the width of the mask opening width is greater than the w...	06/20/2006
7045409	Semiconductor device having active regions connected together by interconnect layer and method of manufacture thereof A semiconductor device having active regions connected by an interconnect line, which includes first and second transistors each having active regions and formed spaced apart from each other in a semiconductor substrate, an isolation region for isolating the first a...	05/16/2006
7015517	Semiconductor device incorporating a defect controlled strained channel structure and method of making the same A semiconductor device includes a single crystal substrate and a dielectric layer overlying the substrate. The dielectric layer includes at least one opening having a first portion and an overlying second portion. The first portion has a depth and width, such that a...	03/21/2006
6995065	Selective post-doping of gate structures by means of selective oxide growth A method for doping a polysilicon gate conductor, without implanting the substrate in a manner that would effect source/drain formation is provided. The inventive method comprises forming at least one polysilicon gate region atop a substrate; forming oxide seed spac...	02/07/2006
6979631	Methods of forming semiconductor circuitry The invention includes a method of forming semiconductor circuitry. A monocrystalline silicon substrate is provided, and a mask is formed which covers a first portion of the substrate and leaves a second portion uncovered. A trench is formed in the uncovered portion...	12/27/2005
6967132	Methods of forming semiconductor circuitry The invention includes a method of forming semiconductor circuitry. A monocrystalline silicon substrate is provided, and a mask is formed which covers a first portion of the substrate and leaves a second portion uncovered. A trench is formed in the uncovered portion...	11/22/2005
6953741	Methods of fabricating contacts for semiconductor devices utilizing a pre-flow process Methods for fabricating a contact of a semiconductor device are provided by patterning an interlayer dielectric of the semiconductor device to form a contact hole that exposes a silicon-based region of a first impurity type. The exposed silicon-based region is doped...	10/11/2005
6939751	Method and manufacture of thin silicon on insulator (SOI) with recessed channel An RSD FET device with a recessed channel is formed with a raised silicon sources and drains and a gate electrode structure formed on an SOI structure (a Si layer formed on a substrate) by the steps as follows. Form a SiGe layer over the Si layer and a RSD layer ove...	09/06/2005
6929849	Embedded electrical traces A method for making a fine electrically conductive grid embedded in a polymer substrate. The method includes the steps of providing a polymer substrate, forming a pattern of grooves in the substrate, filling the grooves with electrically conductive powder, and then ...	08/16/2005
6927115	Method of fabricating semiconductor integrated circuit The lateral pnp transistor encompasses a p-type semiconductor substrate, an n-type first buried region disposed on the semiconductor substrate, an n-type uniform base region disposed on the first buried region, an n-type first plug region disposed in the uniform bas...	08/09/2005
6881641	Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same An epitaxially grown channel layer is provided on a well structure after ion implantation steps and heat treatment steps are performed to establish a required dopant profile in the well structure. The channel layer may be undoped or slightly doped, as required, so t...	04/19/2005
6809003	Bi-directional epitaxial doping technique A method of forming a semiconductor device on a substrate. The method includes forming a first epitaxial layer on the substrate. Next, a selected impurity is introduced to a surface of the first epitaxial layer. A second epitaxial layer is then formed on the surface...	10/26/2004
6764918	Structure and method of making a high performance semiconductor device having a narrow doping profile A structure and method of making an NPN heterojunction bipolar transistor (100) includes a semiconductor substrate (11) with a first region (82) containing a dopant (86) for forming a base region of the transistor. A second region (84	07/20/2004
6737724	Semiconductor device and method of manufacturing the same Disclosed is a semiconductor device including a transistor structure including an epitaxial silicon layer formed on a main surface of an n-type semiconductor substrate, source-drain diffusion layers formed on at least the epitaxial silicon layer, a channel region fo...	05/18/2004
6737324	Method for fabricating raised source/drain of semiconductor device A method for fabricating a raised source/drain of a semiconductor device is described. A gate structure is formed on a substrate, and then a source/drain with a shallow-junction is formed in the substrate beside the gate structure. A spacer is formed on the sidewall...	05/18/2004
6707062	Transistor in a semiconductor device with an elevated channel and a source drain The present invention relates to a transistor in a semiconductor device and method of manufacturing the same, more particularly to a new dual gate P+ salicide forming technology having an elevated channel and a source/drain using the selective SiGe epi-si...	03/16/2004
6656782	Process for manufacturing an isolated-gate transistor with an architecture of the substrate-on-insulator type, and corresponding transistor The source, drain and channel regions are produced in a silicon layer, completely isolated vertically from a carrier substrate by an insulating layer, and are bounded laterally by a lateral isolation region of the shallow trench type....	12/02/2003
6605498	Semiconductor transistor having a backfilled channel material A stressed channel is formed in a PMOS transistor by etching a recess and subsequently backfilling the recess with an epitaxially formed alloy of silicon, germanium, and an n-type dopant. The alloy has the same crystal structure as the underlying silicon,...	08/12/2003
6602769	Low-voltage punch-through bi-directional transient-voltage suppression devices and methods of making the same A bi-directional transient voltage suppression device with symmetric current-voltage characteristics has a lower semiconductor layer of first conductivity type, an upper semiconductor layer of first conductivity type, and a middle semiconductor layer adja...	08/05/2003
6555844	Semiconductor device with minimal short-channel effects and low bit-line resistance A transistor device that includes at least two transistors, each transistor including a source region, a drain region, and a shallow trench isolation formed between and contiguous with the source and drain regions, wherein the shallow trench isolation ele...	04/29/2003
6541355	Method of selective epitaxial growth for semiconductor devices A method of selective epitaxial growth for a semiconductor device is disclosed. By employing a hydrogen gas as a selectivity promoting gas in addition to a chlorine gas conventionally used, the method can guarantee the selectivity of epitaxial growth and ...	04/01/2003
6521508	Method of manufacturing a contact plug in a semiconductor device using selective epitaxial growth of silicon process There is disclosed a method of manufacturing a contact plug in a semiconductor device using selective epitaxial growth of silicon (SEG) process. The method includes forming a nitride film at a predetermined in a semiconductor substrate region except for t...	02/18/2003
6511885	Vertical MOS transistor and method of manufacturing the same There are provided a vertical MOS transistor in which a high frequency characteristic is improved by reducing a feedback capacitance, and a method of manufacturing the same. When a gate voltage is applied to a gate electrode, a channel is formed in a p- e...	01/28/2003
6495421	Manufacture of semiconductor material and devices using that material A method is described of manufacturing a semiconductor material having a zone (200) with p-conductivity type and n-conductivity type regions with dopant concentrations and dimensions such that, when the n- and p-conductivity type regions are depleted of f...	12/17/2002

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Class 438/416 - With epitaxial semiconductor formation