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| Number | Title | Issue Date |
| 8178416 | Method for making an electrically conducting mechanical interconnection member A method of fabricating an electrically conductive mechanical interconnection element (12) comprises: a first stage of electrochemically depositing a structure comprising a plurality of metal wires (2a) of sub-micrometric diameter projecting fro... | 05/15/2012 |
| 8148234 | Method for manufacturing a semiconductor structure, and a corresponding Semiconductor Structure A method for manufacturing a semiconductor structure is provided which includes the following operations: supplying a crystalline semiconductor substrate, providing a porous region adjacent to a surface of the semiconductor substrate, introducing a dopant into the p... | 04/03/2012 |
| 8003484 | Method for forming silicon oxide film, plasma processing apparatus and storage medium The present invention provides a method for forming a silicon oxide film, which has excellent insulating properties and higher quality that can enhance a yield in manufacture of semiconductor devices, while keeping advantageous points in a plasma oxidation process. ... | 08/23/2011 |
| 7977203 | Programmable via devices with air gap isolation Programmable via devices and methods for the fabrication thereof are provided. In one aspect, a programmable via device is provided. The programmable via device includes a first dielectric layer; a heater over the first dielectric layer; an air gap separating at lea... | 07/12/2011 |
| 7947565 | Forming method of porous low-k layer and interconnect process A method of forming a porous low-k layer is described. A CVD process is conducted to a substrate, wherein a framework precursor and a porogen precursor are supplied. In an end period of the supply of the framework precursor, the value of at least one deposition para... | 05/24/2011 |
| 7833873 | Method and structure to reduce contact resistance on thin silicon-on-insulator device A method (and system) of reducing contact resistance on a silicon-on-insulator device, including controlling a silicide depth in a source-drain region of the device. ... | 11/16/2010 |
| 7816224 | Method for fabricating an ultra thin silicon on insulator In one embodiment, the invention is a method for fabricating an ultra thin silicon on insulator. One embodiment of a method for fabricating an ultra thin silicon on insulator includes providing a silicon layer, saturating the silicon layer with at least one reactant... | 10/19/2010 |
| 7745302 | Method for making transmission electron microscope grid A method for making transmission electron microscope gird is provided. An array of carbon nanotubes is provided and drawing a carbon nanotube film from the array of carbon nanotubes. A substrate has a plurality of spaced metal girds attached on the substrate. The me... | 06/29/2010 |
| 7659178 | Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering, methods for fabricating such device structures, and methods for forming a semiconductor-on-insulator substrate. The semiconductor structure comprises a semiconducto... | 02/09/2010 |
| 7629224 | VLSI fabrication processes for introducing pores into dielectric materials Porous dielectric layers are produced by introducing pores in pre-formed composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conduct... | 12/08/2009 |
| 7588995 | Method to create damage-free porous low-k dielectric films and structures resulting therefrom Low dielectric constant dielectric films having a high degree of porosity suffer from poor mechanical strength and can be damaged during processing steps. Damage can be substantially eliminated or minimized by stuffing the pores of the dielectric film with a materia... | 09/15/2009 |
| 7531423 | Reduced-resistance finFETs by sidewall silicidation and methods of manufacturing the same In a first aspect, a first method of manufacturing a finFET is provided. The first method includes the steps of (1) providing a substrate; and (2) forming at least one source/drain diffusion region of the finFET on the substrate. Each source/drain diffusion region i... | 05/12/2009 |
| 7422957 | Semiconductor substrates having useful and transfer layers Methods for fabricating final substrates for use in optics, electronics, or optoelectronics are described. The method includes forming a zone of weakness beneath a surface of a source substrate to define a transfer layer; detaching the transfer layer from the source... | 09/09/2008 |
| 7422956 | Semiconductor device and method of making semiconductor device comprising multiple stacked hybrid orientation layers A semiconductor device comprising a substrate having a first crystal orientation is provided. A first insulating layer overlies the substrate and a plurality of silicon layers overlie the first insulating layer. A first silicon layer comprises silicon having a secon... | 09/09/2008 |
| 7365399 | Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost A semiconducting material that has all the advantages of prior art SOI substrates including, for example, low parasitic capacitance and leakage, without having floating body effects is provided. More specifically, the present invention provides a Semiconductor-on-Po... | 04/29/2008 |
| 7361583 | RF semiconductor devices and methods for fabricating the same RF semiconductor devices and methods of making the same are disclosed. In a disclosed method, a trench for defining an active region and an element isolation region is formed in a semiconductor substrate. One or more gate lines is then formed within the active regio... | 04/22/2008 |
| 7352019 | Capacitance reduction by tunnel formation for use with a semiconductor device A method used during the manufacture of a semiconductor device comprises providing at least first, second, and third spaced conductive structures, where the second conductive structure is interposed between the first and third conductive structures. A first dielectr... | 04/01/2008 |
| 7351648 | Methods for forming uniform lithographic features Methods for fabricating a semiconductor device include forming a first layer on an underlying layer, forming a hardmask on the first layer, and patterning holes through the hardmask and first layer. An overhang is formed extending over sides of the holes. A conforma... | 04/01/2008 |
| 7341923 | Substrate, manufacturing method therefor, and semiconductor device A step of forming the first substrate which has a separation layer and a Ge layer on the separation layer, and a step of forming a bonded substrate stack by bonding the first substrate to the second substrate through an insulating layer, and a step of dividing the b... | 03/11/2008 |
| 7335575 | Semiconductor constructions and semiconductor device fabrication methods A method of fabricating a semiconductor device includes etching a substrate to form a recess, the substrate being formed on a backside of a semiconductor wafer, forming pores in the substrate in an area of the recess, and forming in the recess a material having a th... | 02/26/2008 |
| 7329387 | Field-effect transistor, sensor using it, and production method thereof A sensor which has high measuring sensitivity and is excellent in response is provided by forming a porous film in a sensitive section of a field-effect transistor. It comprises a porous body, which is formed on a sensitive section (here, a gate insulating film) of ... | 02/12/2008 |
| 7329956 | Dual damascene cleaning method A semiconductor structure having a pore sealed portion of a dielectric layer is provided. Exposed pores of the dielectric material are sealed using an anisotropic plasma so that pores along the bottom of the opening are sealed, and pores along sidewalls of the openi... | 02/12/2008 |
| 7319069 | Structure having pores, device using the same, and manufacturing methods therefor A minute structure is provided in which electroconductive paths are only formed in nanoholes, and a material is filled in the nanoholes, which are disposed in a specific area, by using the electroconductive paths. The minute structure comprising pores comprises a) a... | 01/15/2008 |
| 7316967 | Flow method and reactor for manufacturing noncrystals A population of nanocrystals having a narrow and controllable size distribution and can be prepared by a segmented-flow method. ... | 01/08/2008 |
| 7303975 | Method for producing electrochemical capacitor electrode A method is provided for optimizing the physical characteristics of a coating solution for a polarizable electrode layer formed on a collector. A first step is carried out to prepare a coating solution that includes porous particles, a fluorine-based binder, a good ... | 12/04/2007 |
| 7303974 | Method for producing electrochemical capacitor electrode A method is provided for optimizing the physical characteristics of a coating solution for an undercoat layer formed between a polarizable electrode layer and surface-roughened collector. A first step is carried out to form an undercoat layer on a collector whose su... | 12/04/2007 |
| 7300854 | Method for producing a semiconductor component having a movable mass in particular, and semiconductor component produced according to this method A method of producing a semiconductor component, e.g., a multilayer semiconductor component, and a semiconductor component produced by this method, where the semiconductor component has, e.g., a mobile mass, i.e., an oscillator structure. A method easily and ... | 11/27/2007 |
| 7294557 | Method of increasing the area of a useful layer of material transferred onto a support A method for transferring a first substrate to a second substrate. First and second front faces of first and second substrates, respectively, are molecularly bonded to each other to provide a composite structure. The first front face has a first outline, the second ... | 11/13/2007 |
| 7294923 | Metallization scheme including a low modulus structure The present invention provides a metallization scheme, a method for manufacturing the metallization scheme, and an integrated circuit including the metallization scheme. In one aspect, the metallization scheme (300) includes a protective layer (320) lo... | 11/13/2007 |
| 7285471 | Process for transfer of a thin layer formed in a substrate with vacancy clusters Processes for forming semiconductor structure comprising a transfer layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect to defects and resulting structures therefrom. For example, a semiconductor o... | 10/23/2007 |
| 7282190 | Silicon layer production method and solar cell production method A solar cell is produced by dipping a multicrystalline silicon substrate 28 in a solution 24 containing silicon, growing a silicon layer on the substrate 28 while decreasing with time the temperature drop rate of the solution during the dipping ... | 10/16/2007 |
| 7279377 | Method and structure for shallow trench isolation during integrated circuit device manufacture A method suitable for use during fabrication of a semiconductor device such as a dynamic random access memory or a flash programmable read-only memory comprises etching through silicon nitride and pad oxide layers and into a semiconductor wafer to form a trench into... | 10/09/2007 |
| 7273776 | Methods of forming a P-well in an integrated circuit device The present invention is generally directed to a method of forming a p-well in an integrated circuit device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial material above an active layer of a substrate, forming a first doped ... | 09/25/2007 |
| 7271051 | Methods of forming a plurality of capacitor devices The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conduc... | 09/18/2007 |
| 7261919 | Silicon carbide and other films and method of deposition A method of depositing a ceramic film, particularly a silicon carbide film, on a substrate is disclosed in which the residual stress, residual stress gradient, and resistivity are controlled. Also disclosed are substrates having a deposited film with these controlle... | 08/28/2007 |
| 7253452 | Blue light emitting semiconductor nanocrystal materials A semiconductor nanocrystal includes a core including a first semiconductor material and an overcoating including a second semiconductor material. A monodisperse population of the nanocrystals emits blue light over a narrow range of wavelengths with a high quantum e... | 08/07/2007 |
| 7244513 | Stain-etched silicon powder The present invention is for a porous silicon powder comprising silicon particles wherein the outermost layers of said particles are porous. The present invention is also directed to a method of making this porous silicon powder using a stain etch method. The presen... | 07/17/2007 |
| 7238973 | Semiconductor member, manufacturing method thereof, and semiconductor device An SiGe layer is grown on a silicon substrate. The SiGe layer or the silicon substrate and SiGe layer are porosified by anodizing the SiGe layer to form a strain induction porous layer or a porous silicon layer and strain induction porous layer. An SiGe layer and st... | 07/03/2007 |
| 7235493 | Low-k dielectric process for multilevel interconnection using mircocavity engineering during electric circuit manufacture One embodiment of a method for forming a low-k dielectric for a semiconductor device assembly comprises forming a silicon dioxide layer, then forming a patterned masking layer such as silicon nitride on the silicon dioxide. Using the patterned nitride layer as a pat... | 06/26/2007 |
| 7214594 | Method of making semiconductor device using a novel interconnect cladding layer A method and apparatus are provided an interconnect cladding layer. In one embodiment, a first sacrificial layer is deposited over a substrate and patterned. In the vias created during the patterning operation, a conductive material is placed to create conductive in... | 05/08/2007 |
