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A self defense weapon formed as a memo pad and which is easily held by a person's fingers, therefore making it possible to provide protection from a mugger and also to quickly and easily write a record or a message without failure of missing or forgetting significant information under a stressful situation.
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| Number | Title | Issue Date |
| 7785982 | Structures containing electrodeposited germanium and methods for their fabrication Methods for electrodepositing germanium on various semiconductor substrates such as Si, Ge, SiGe, and GaAs are provided. The electrodeposited germanium can be formed as a blanket or patterned film, and may be crystallized by solid phase epitaxy to the orientation of... | 08/31/2010 |
| 7732297 | Method of manufacturing an insulating layer and method of manufacturing a semiconductor device using the insulating layer A method of forming an insulating layer and a method of manufacturing a semiconductor device using insulating layer are disclosed. A preliminary insulating layer including a material having a relatively low dielectric constant is formed on an object. An upper portio... | 06/08/2010 |
| 7396735 | Semiconductor element heat dissipating member, semiconductor device using same, and method for manufacturing same A semiconductor element heat dissipating member is provided which has excellent heat dissipation characteristics and adhesion characteristics and enables production of a semiconductor device at a low cost. A semiconductor device using the same, and a method of produ... | 07/08/2008 |
| 7361991 | Closed air gap interconnect structure A closed air gap interconnect structure is described. The structure includes discrete regions of a permanent support dielectric under the interconnect lines so that the lines are substantially surrounded by air except for the discrete regions of the support dielectr... | 04/22/2008 |
| 7244657 | Zeolite sol and method for preparing the same, composition for forming porous film, porous film and method for forming the same, interlevel insulator film, and semiconductor device The present invention provides a zeolite sol which can be formed into a porous film that can be thinned to an intended thickness by a method used in the ordinary semiconductor process, that excels in dielectric properties, adhesion, film consistency and mechanical s... | 07/17/2007 |
| 7223671 | Chemical conversion film of tantalum or niobium, method for forming the same and electrolytic capacitor using the same The present invention provides an electrolytic capacitor that operates stably even when used for a long period of time under severe conditions, and forms an intermediate composition portion of metal and oxide within a chemical conversion film to a thickness of 40 nm... | 05/29/2007 |
| 7179716 | Method of forming a metal-containing layer over selected regions of a semiconductor substrate The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a si... | 02/20/2007 |
| 7116573 | Switching element method of driving switching element rewritable logic integrated circuit and memory A switching element has an ion conductor capable of conducting metal ions for use in an electrochemical reaction therein, a first electrode and a second electrode which are disposed in contact with said ion conductor and spaced a predetermined distance from each oth... | 10/03/2006 |
| 7087980 | Film thickness measuring monitor wafer The object of the present invention is to provide a wafer having a structure of enabling an SiC wafer to be put to practical use as a wafer for monitoring a film thickness. For this purpose, an average surface roughness Ra of at least one surface of the SiC wafer is... | 08/08/2006 |
| 7084043 | Method for forming an SOI substrate, vertical transistor and memory cell with vertical transistor A method for producing a silicon-on-insulator layer structure on a silicon surface with any desired geometry can locally produce the silicon-on-insulator structure. The method includes formation of mesopores in the silicon surface region, oxidation of the mesopore s... | 08/01/2006 |
| 7081657 | MEMS and method of manufacturing MEMS The present invention relates to micro electro-mechanical systems (MEMS) and production methods thereof, and more particularly to vertically integrated MEMS systems. Manufacturing of MEMS and vertically integrated MEMS is facilitated by forming, preferably on a wafe... | 07/25/2006 |
| 7071532 | Adjustable self-aligned air gap dielectric for low capacitance wiring An adjustable self aligned low capacitance integrated circuit air gap structure comprises a first interconnect adjacent a second interconnect on an interconnect level, spacers formed along adjacent sides of the first and second interconnects, and an air gap formed b... | 07/04/2006 |
| 7060630 | Method of forming isolation film of semiconductor device Disclosed is a method of forming the isolation film in the semiconductor device. The method comprises the steps of sequentially forming a pad oxide film and a pad nitride film on a silicon substrate, forming a photoresist pattern through which an isolation region is... | 06/13/2006 |
| 6838354 | Method for forming a passivation layer for air gap formation Dummy features (64, 65, 48a, 48b) are formed within an interlevel dielectric layer (36). Passivation layers (32 and 54) are formed by electroless deposition to protect the underlying conductive regions (44, 48 | 01/04/2005 |
| 6835633 | SOI wafers with 30-100 Å buried oxide (BOX) created by wafer bonding using 30-100 Å thin oxide as bonding layer A method of fabricating a SOI wafer having a gate-quality, thin buried oxide region is provided. The wafer is fabricating by forming a substantially uniform thermal oxide on a surface of a Si-containing layer of a SOI substrate which includes a buried oxide region p... | 12/28/2004 |
| 6673693 | Method for forming a trench in a semiconductor substrate A method for forming a trench in a semiconductor substrate includes configuring a mask on the substrate. The mask has a window in which a substrate surface is uncovered. The substrate is electrochemically etched proceeding from the substrate surface. A po... | 01/06/2004 |
| 6664169 | Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus In a process for producing a semiconductor member, and a solar cell, making use of a thin-film crystal semiconductor layer, the process includes the steps of: (1) anodizing the surface of a first substrate to form a porous layer at least on one side of th... | 12/16/2003 |
| 6656806 | SOI structure and method of producing same A Silicon On Insulator (SOI) structure and method of producing an SOI structure that can prevent a short circuit between a Local Inter-Connect (LIC) and a well in the SOI structure is disclosed. The SOI structure includes a BOX layer of insulation materia... | 12/02/2003 |
| 6641662 | Method for fabricating ultra thin single-crystal metal oxide wave retarder plates and waveguide polarization mode converter using the same A method for fabricating ultra-thin single-crystal metal oxide wave retarder plates, such as a zeroth-order X-cut single-crystal LiNbO3 half-wave plate, comprises ion implanting a bulk birefringent metal oxide crystal at normal incidence throug... | 11/04/2003 |
| 6602757 | Self-adjusting thickness uniformity in SOI by high-temperature oxidation of SIMOX and bonded SOI A silicon-on-insulator substrate having improved thickness uniformity as well as a method of fabricating the same is provided. Specifically, improved thickness uniformity of a SOI substrate is obtained in the present invention by subjecting a bonded or SI... | 08/05/2003 |
| 6559069 | Process for the electrochemical oxidation of a semiconductor substrate In a process for the electrochemical oxidation of a semiconductor substrate that has recesses, such as for example, capacitor trenches or mesopores, formed in a silicon surface region, self-limited oxide formation takes place. The end of this formation is... | 05/06/2003 |
| 6537892 | Glass frit wafer bonding process and packages formed thereby A method of glass frit bonding wafers to form a package, in which the width of the glass bond line between the wafers is minimized to reduce package size. The method entails the use of a glass frit material containing a particulate filler material that es... | 03/25/2003 |
| 6515845 | Method for preparing nanoporous carbon materials and electric double-layer capacitors using them Disclosed herein is the fabrication method of producing nanoporous carbon materials with pore sizes ranging from 2 nanometer to 20 nanometer which can be used as electrode materials for a supercapacitor and an electric double layer capacitors being a kind... | 02/04/2003 |
| 6417069 | Substrate processing method and manufacturing method, and anodizing apparatus A porous layer is formed on an Si substrate using an anodizing apparatus having a conductive partition inserted between a cathode and an anode. First, the cathode and Si substrate are brought into electrical contact through a first electrolyte, and the co... | 07/09/2002 |
| 6403447 | Reduced substrate capacitance high performance SOI process A method for forming a semiconductor substrate is provided including the general sequential steps of: providing a handle wafer and a device wafer; implanting at least a first impurity region in a first surface of the device wafer; bonding the first surfac... | 06/11/2002 |
| 6380046 | Method of manufacturing a semiconductor device There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as... | 04/30/2002 |
| 6368938 | Process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate A process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate from thermally oxidized silicon wafer so that processing temperatures are limited to 900° C. is disclosed. The substrate is fabricated using H2 | 04/09/2002 |
| 6362075 | Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide Integrated circuits, semiconductor devices and methods for making the same are described. Each embodiment shows a diffused, doped backside layer in a device wafer that is oxide bonded to a handle wafer. The diffused layer may originate in the device wafer... | 03/26/2002 |
| 6352893 | Low temperature self-aligned collar formation A method for fabricating a semiconductor device, in accordance with the present invention, includes the steps of providing a semiconductor wafer having exposed p-doped silicon regions and placing the wafer in an electrochemical cell such that a solution i... | 03/05/2002 |
| 6274456 | Monolithic device isolation by buried conducting walls Surface to surface electrical isolation of integrated circuits has been achieved by forming N type moats that penetrate the silicon as deeply as required, including across the full thickness of a wafer. The process for creating the moats is based on trans... | 08/14/2001 |
| 6261892 | Intra-chip AC isolation of RF passive components A method of fabricating an integrated circuit having active components, conductors and isolation regions on a substrate is disclosed, including forming a portion of at least one of the isolation regions to expose a first area of the substrate, depositing ... | 07/17/2001 |
| 6197654 | Lightly positively doped silicon wafer anodization process A method of anodizing a lightly doped wafer wherein there is provided a lightly p-typed doped silicon wafer having a frontside and a backside. A p-type region is formed on the backside doped sufficiently to avoid inversion to n-type when a later applied c... | 03/06/2001 |
| 6140210 | Method of fabricating an SOI wafer and SOI wafer fabricated thereby In a method of fabricating an SOI wafer, an oxide film is formed on the surface of at least one of two silicon wafers; hydrogen ions or rare gas ions are implanted into the upper surface of one of the two silicon wafers in order to form a fine bubble laye... | 10/31/2000 |
| 6020250 | Stacked devices Chips having subsurface structures within or adjacent a horizontal trench in bulk single crystal semiconductor are presented. Structures include three terminal devices, such as FETs and bipolar transistors, rectifying contacts, such as pn diodes and Schot... | 02/01/2000 |
| 5994189 | High withstand voltage semiconductor device and manufacturing method thereof An n- layer is formed on a main surface of a p-type semiconductor substrate. A p- diffusion region is formed at a surface of n- layer. A p diffusion region is formed contiguous to one end of p- diffusion region.... | 11/30/1999 |
| 5950094 | Method for fabricating fully dielectric isolated silicon (FDIS) The present invention provides a method of fabricating fully dielectric isolated silicon (FDIS) by anodizing a buried doped silicon layer through trenches formed between active areas to form a porous silicon layer; oxidizing the porous silicon layer throu... | 09/07/1999 |
| 5830532 | Method to produce ultrathin porous silicon-oxide layer A method for producing a porous film on a silicon substrate is described. The substrate 14 is placed in a vacuum chamber in the presence of oxygen at specified pressure and temperature for a period of time to form a thin oxide film 10 thereon. Then the co... | 11/03/1998 |
| 4554059 | Electrochemical dielectric isolation technique Plane indicating moats are formed extending through an epitaxial layer into a substrate simultaneous with the formation of the isolation moats which terminate within the epitaxial layer. The substrate is ground to a predetermined thickness after formation... | 11/19/1985 |
| 4292730 | Method of fabricating mesa bipolar memory cell utilizing epitaxial deposition, substrate removal and special metallization A memory cell having two mesa bipolar transistors separated by a valley in which two doped polycrystalline load resistors are formed. Doped polycrystalline conductors connect the resistors to a respective backside metallic collector contact which is betwe... | 10/06/1981 |
| 4268348 | Method for making semiconductor structure 1. In a method for forming a semiconductor structure utilizing a semiconductor body, forming a grid structure in the semiconductor body, forming a support structure upon the grid structure, removing only a portion of the semiconductor body to provide a se... | 05/19/1981 |
