Class 438/402 - And gettering of substrate

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making laterally spaced electrically isolated
No. of patents: 92
Last issue date: 02/05/2008

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Number	Title	Issue Date
7326597	Gettering using voids formed by surface transformation One aspect of this disclosure relates to a method for creating a gettering site in a semiconductor wafer. In various embodiments, a predetermined arrangement of a plurality of holes is formed in the semiconductor wafer through a surface of the wafer. The wafer is an...	02/05/2008
7297630	Methods of fabricating via hole and trench A method of fabricating a via and a trench is disclosed. A disclosed method comprises: forming a via hole and a trench in a interlayer dielectric layer on a semiconductor substrate where a predetermined device is formed; depositing a thin Hf layer on the substrate; ...	11/20/2007
7273788	Ultra-thin semiconductors bonded on glass substrates A method for forming a semiconductor on insulator structure includes providing a glass substrate, providing a semiconductor wafer, and performing a bonding cut process on the semiconductor wafer and the glass substrate to provide a thin semiconductor layer bonded to...	09/25/2007
7262428	Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the...	08/28/2007
7235459	Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated circuitry such as memory integrated circuitry. ...	06/26/2007
7229891	Fabrication method for silicon-on defect layer in field-effect and bipolar transistor devices Semiconductor devices have device regions in which semiconductor properties such as spreading resistivity and its profile are significant. In making a p-type device region on a semiconductor wafer, an initial semiconductor device region is defined by a buried region...	06/12/2007
7160767	Method for making a semiconductor device that includes a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dummy dielectric layer that is at least about 10 angstroms thick on a substrate, and forming a sacrificial layer on the dummy dielectric layer. After removing the sacrificial la...	01/09/2007
7155803	Method of manufacturing a sensor element having integrated reference pressure A pressure sensor includes a pressure sensor house assembly which contains a reference cavity, in which a vacuum exists, and a getter capable of being thermally activated. The getter is activated by directly contacting the getter with an exterior heated body, conduc...	01/02/2007
7157385	Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silico...	01/02/2007
7153753	Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the...	12/26/2006
7144829	Method for fabricating semiconductor device and semiconductor substrate A first thermal treatment, which is performed at a temperature within 650–750° C. for 30–240 minutes, and thereafter a second thermal treatment, which is performed at a temperature within 900–1100° C. for 30–120 minutes, are performed as the initial therma...	12/05/2006
7129182	Method for etching a thin metal layer A method for etching a metal layer is described. That method comprises forming a metal layer on a substrate, then exposing part of the metal layer to a wet etch chemistry that comprises an active ingredient with a diameter that exceeds the thickness of the metal lay...	10/31/2006
7125815	Methods of forming a phosphorous doped silicon dioxide comprising layer This invention includes methods of forming phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of forming a phosphorus doped silicon dioxide comprisin...	10/24/2006
7084048	Process for metallic contamination reduction in silicon wafers A process for removing a contaminant selected from among copper, nickel, and a combination thereof from a silicon wafer having a surface and an interior. The process comprises cooling the silicon wafer in a controlled atmosphere from a temperature at or above an oxi...	08/01/2006
7078312	Method for controlling etch process repeatability Plasma etch processes incorporating etch chemistries which include hydrogen. In particular, high density plasma chemical vapor deposition-etch-deposition processes incorporating etch chemistries which include hydrogen that can effectively fill high aspect ratio (typ...	07/18/2006
7074692	Method for reducing a short channel effect for NMOS devices in SOI circuits Methods of reducing a short channel phenomena for an NMOS device formed in an SOI layer, wherein the short channel phenomena is created by boron movement from a channel region to adjacent insulator regions, has been developed. A first embodiment of this invention en...	07/11/2006
7075002	Thin-film photoelectric conversion device and a method of manufacturing the same A method of manufacturing a thin-film solar cell, comprising the steps of: forming an amorphous silicon film on a substrate; placing a metal element that accelerates the crystallization of silicon in contact with the surface of the amorphous silicon film; subjecting...	07/11/2006
7064414	Heater for annealing trapped charge in a semiconductor device A structure and associated method for annealing a trapped charge from a semiconductor device. The semiconductor structure comprises a substrate and a first heating element. The substrate comprises a bulk layer, an insulator layer and a device layer. The first heatin...	06/20/2006
7061068	Shallow trench isolation structures having uniform and smooth topography Ions are implanted into the dielectric layer and/or barrier layer over a semiconductor substrate to change the polish rates of either or both layers during formation of a shallow trench isolation (STI) structure. The ion implantation can change or affect the polish ...	06/13/2006
7053010	Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over capacitor arrays of memory cells. In one implementation, a semicondu...	05/30/2006
7037779	Semiconductor device and manufacturing method thereof In a thin film transistor, a metallic element promoting crystallization of an amorphous silicon film is effectively removed and the productivity is improved. By using a silicon film containing an element belonging to the group 15 such as phosphorus through co...	05/02/2006
7037845	Selective etch process for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, and modifying a first portion of the high-k gate dielectric layer to ensure that it may be removed selectively to a second portion o...	05/02/2006
7012010	Methods of forming trench isolation regions In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and then converted, at least some of the silanol, to a compound includin...	03/14/2006
7008854	Silicon oxycarbide substrates for bonded silicon on insulator A method for forming a semiconductor on insulator structure includes forming a semiconductor layer on an insulating substrate, where the substrate is a different material than the semiconductor layer, and has a coefficient of thermal expansion substantially equal to...	03/07/2006
6974764	Method for making a semiconductor device having a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, and forming a first metal layer on a first part of the dielectric layer, leaving a second part of the dielectric layer exposed. After a second m...	12/13/2005
6958264	Scribe lane for gettering of contaminants on SOI wafers and gettering method A method of manufacturing a semiconductor device on a silicon-on-insulator wafer including a silicon active layer having at least two die pads formed thereon, the at least two die pads separated by at least one scribe lane, including the steps of forming at least on...	10/25/2005
6949430	Semiconductor processing methods Semiconductor processing methods of forming integrated circuitry, and in particular, dynamic random access memory (DRAM) circuitry are described. In one embodiment, a single masking step is utilized to form mask openings over a substrate, and both impurities are pro...	09/27/2005
6939815	Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a metal oxide layer on a substrate, converting at least part of the metal oxide layer to a metal layer; and oxidizing the metal layer to generate a metal oxide high-k gate dielect...	09/06/2005
6929984	Gettering using voids formed by surface transformation One aspect of this disclosure relates to a method for creating a gettering site in a semiconductor wafer. In various embodiments, a predetermined arrangement of a plurality of holes is formed in the semiconductor wafer through a surface of the wafer. The wafer is an...	08/16/2005
6830986	SOI semiconductor device having gettering layer and method for producing the same An SOI semiconductor device includes at least an SOI substrate including an insulating film and a semiconductor layer formed on the insulating film; and an active semiconductor element formed on the semiconductor layer. The active semiconductor element is formed in ...	12/14/2004
6767782	Manufacturing method of semiconductor device Charge-up damages to a substrate are reduced in a manufacturing process using plasma, and the reliability of a semiconductor device is improved. By forming an insulating film on the back of a substrate before a step of forming a first wiring layer, even if a ...	07/27/2004
6735845	Method of producing an integrated reference pressure sensor element A method of manufacturing a pressure sensor house assembly which contains a reference cavity, in which a vacuum exists, and a getter capable of being thermally activated. The getter is activated by directly contacting the getter with an exterior heated body, conduct...	05/18/2004
6686259	Method for manufacturing solid state image pick-up device In a method for manufacturing a solid state image pick up device capable of improving gettering efficiency a semiconductor substrate having a front side on which a solid state image pick-up device may be formed, and a rear side opposite to the front side ...	02/03/2004
6670259	Inert atom implantation method for SOI gettering The present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of (1) providing a silicon-on-insulator semiconductor wafer having at least one surface of a silicon film; (2) implanting an inert atom into ...	12/30/2003
6642123	Method of fabricating a silicon wafer including steps of different temperature ramp-up rates and cool-down rates A method of fabricating a silicon wafer, which includes the steps of preparing a silicon wafer by slicing, grinding, and cleaning an ingot, inserting the silicon wafer in a diffusion furnace having an ambience of one of Ar, N2 and inert gas inc...	11/04/2003
6635517	Use of disposable spacer to introduce gettering in SOI layer A method of forming a self-aligned gettering region within an SOI substrate is provided. Specifically, the inventive method includes the steps of forming a disposable spacer on each vertical sidewall of a patterned gate stack region, the patterned gate st...	10/21/2003
6589839	Dielectric cure for reducing oxygen vacancies A unique electrochemical process fills oxygen vacancies in dielectrics while reducing oxidation of nearby electrodes and conductors. Preferably, an electromagnetic field or bias is applied to a dielectric. The bias causes oxygen vacancies in the dielectri...	07/08/2003
6580170	Semiconductor device protective overcoat with enhanced adhesion to polymeric materials An integrated circuit device with a low stress, thin film, protective overcoat having enhanced adhesion both to polymeric materials used in packaging semiconductor devices, and within the passivating film layers, including the following sequence of materi...	06/17/2003
6551866	Method of manufacturing a semiconductor memory device A method of manufacturing a semiconductor memory device comprising: a step of forming a storage node in which a conductive layer 7 to be the storage node is formed in the vicinity of single crystalline silicon 3 formed on an insulator 2, a gettering step ...	04/22/2003
6524928	Semiconductor device and method for manufacturing the same A semiconductor and a method of manufacturing thereof form a region with a sufficient gettering effect. A p-type channel MOSFET and an n-type channel MOSFET are formed in an n-type semiconductor layer, which is isolated in a form of islands on an SOI subs...	02/25/2003

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Class 438/402 - And gettering of substrate