Mark Twain (Samuel L. Clemens) received Patent No. 121,992 for "An Improvement in Adjustable and Detachable Straps for Garments." He later received two more patents: one for a self-pasting scrapbook and one for a game to help players remember important historical dates.
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| Number | Title | Issue Date |
| 8187947 | Capacitor structure in trench structures of semiconductor devices and semiconductor devices comprising capacitor structures of this type and methods for fabricating the same A capacitor structure in trench structures of a semiconductor device includes conductive regions made of metallic and/or semiconducting materials. The conducting regions are surrounded by a dielectric and form stacked layers in the trench structure of the semiconduc... | 05/29/2012 |
| 8048756 | Method for removing metal layers formed outside an aperture of a BPSG layer utilizing multiple etching processes including electrochemical-mechanical polishing A microelectronic substrate and method for removing adjacent conductive and nonconductive materials from a microelectronic substrate. In one embodiment, the microelectronic substrate includes a substrate material (such as borophosphosilicate glass) having an apertur... | 11/01/2011 |
| 7927959 | Method of patterning a metal on a vertical sidewall of an excavated feature, method of forming an embedded MIM capacitor using same, and embedded memory device produced thereby A method of patterning a metal (141, 341, 841) on a vertical sidewall (132, 332, 832) of an excavated feature (130, 330, 830) includes placing a material (350) in the excavated feature such that a portion (435) of the metal is expo... | 04/19/2011 |
| 7915133 | Method of forming a trench capacitor A method of forming a ring-type capacitor is provided. The method includes providing a substrate; forming a patterned mask layer on the substrate, the patterned mask layer defining a ring pattern; removing the substrate by using the patterned mask layer as a mask to... | 03/29/2011 |
| 7807541 | Concentric or nested container capacitor structure for integrated circuits Disclosed are embodiments for a container capacitor structure in which at least two container capacitors, e.g., an inner and outer container capacitor, are made concentric and nested with respect to one another. The nested capacitors are formed in one embodiment by ... | 10/05/2010 |
| 7781297 | Semiconductor device and method of fabricating the same The present invention discloses a semiconductor device and a method of manufacture thereof. The present invention prevents from leaning or collapsing in the subsequent dip-out process by making the bottom plate of adjacent capacitors to be connected each other and s... | 08/24/2010 |
| 7776707 | Method for manufacturing dielectric memory A method includes the steps of: forming a first insulation film on a substrate; forming a hole in the first insulation film; forming a lower electrode on a bottom surface and a sidewall surface of the hole; forming a capacitor insulation film on the lower electrode;... | 08/17/2010 |
| 7763519 | Method for fabricating an interconnect arrangement with increased capacitive coupling and associated interconnect arrangement A method for fabricating an interconnect arrangement with increased capacitive coupling is described. A trench structure is formed in a first dielectric having a capacitor region with a first aspect ratio and an interconnect region with a second aspect ratio connect... | 07/27/2010 |
| 7763520 | Capacitor device with a layer structure disposed in a meander-shaped manner A capacitor device includes a substrate, a first conductive structure, a second conductive structure, a dielectric layer structure, and a recess in the substrate. The first and second conductive structures are disposed on opposite sides of the dielectric layer struc... | 07/27/2010 |
| 7749854 | Method for making a self-converged memory material element for memory cell A self-converged memory material element is created during the manufacture of a memory cell comprising a base layer, with a bottom electrode, and an upper layer having a third, planarization stop layer over the base layer, a second layer over the third layer, and th... | 07/06/2010 |
| 7678659 | Method of reducing current leakage in a metal insulator metal semiconductor capacitor and semiconductor capacitor thereof A method for reducing leakage current in a semiconductor capacitor. The method includes providing a top plate for collecting charge, providing a bottom plate for collecting an opposing charge to the top plate, providing a dielectric layer for insulation between the ... | 03/16/2010 |
| 7615460 | Hard mask technique in forming a plug A method for manufacturing a semiconductor device includes the steps of forming a conductive hard mask coupled to the semiconductor substrate via discharge plugs on a thick insulating film, selectively etching the thick insulating film by using the conductive hard m... | 11/10/2009 |
| 7557012 | Method for forming surface strap A method for forming a surface strap includes forming a deep trench capacitor having a conductive connection layer on its surface in the substrate and the conductive connection layer in contact with the conductive layer; forming a poly-Si layer covering the pad laye... | 07/07/2009 |
| 7488665 | Structurally-stabilized capacitors and method of making of same Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures, i.e., those having large height/width (H/W) ratios, which are mechan... | 02/10/2009 |
| 7482240 | Method for manufacturing semiconductor device Disclosed herein is a method for manufacturing a semiconductor device. According to the present invention, an USG (undoped silicate glass) layer is utilized during a process of forming a capacitor to leave a hard mask layer and a polysilicon layer on the top surface... | 01/27/2009 |
| 7439151 | Method and structure for integrating MIM capacitors within dual damascene processing techniques A method for integrating the formation of metal-insulator-metal (MIM) capacitors within dual damascene processing includes forming a lower interlevel dielectric (ILD) layer having a lower capacitor electrode and one or more lower metal lines therein, the ILD layer h... | 10/21/2008 |
| 7439150 | Method of manufacturing a semiconductor device In one embodiment, to fabricate a semiconductor device, a first insulation interlayer is formed on a substrate. A contact pad is formed through the first insulation interlayer. An etch stop layer and a second insulation interlayer are sequentially formed on the firs... | 10/21/2008 |
| 7416952 | Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer A dielectric interlayer, especially for a storage capacitor, is formed from a layer sequence subjected to a temperature process, wherein the layer sequence has at least a first metal oxide layer and a second metal oxide layer formed by completely oxidizing a metal n... | 08/26/2008 |
| 7416953 | Vertical MIM capacitors and method of fabricating the same A method of fabricating a vertical MIM capacitor. An insulation layer is formed on the substrate. The insulation layer is patterned to form an opening in a predetermined area of a core electrode. Then, the opening is filled to form a sacrificial plug. Subsequently, ... | 08/26/2008 |
| 7410863 | Methods of forming and using memory cell structures A method of filling vias for a PCRAM cell with a metal is described. A PCRAM intermediate structure including a substrate, a first conductor, and an insulator through which a via extends has a metallic material formed within the via and on a surface of the insulator... | 08/12/2008 |
| 7410864 | Trench and a trench capacitor and method for forming the same A method for fabricating a trench includes providing a semiconductor substrate made of a semiconductor material. A trench is etched into a surface of the semiconductor substrate such that a trench wall is produced. At least one layer is provided on the trench wall. ... | 08/12/2008 |
| 7404829 | Electrode-separator combination for improved assembly of layered electrolytic capacitors This disclosure provides methods for assembling multiple anode stacked capacitor configurations with a temporary adhesive to aide in the alignment of separator materials and electrodes without sacrificing energy density, and electrolytic capacitors comprising such c... | 07/29/2008 |
| 7393741 | Methods of forming pluralities of capacitors The invention comprises methods of forming pluralities of capacitors. In one implementation, metal is formed over individual capacitor storage node locations on a substrate. A patterned masking layer is formed over the metal. The patterned masking layer comprises op... | 07/01/2008 |
| 7381613 | Self-aligned MIM capacitor process for embedded DRAM A semiconductor device includes a group of capacitors and a trench. Each capacitor includes a first conductive material layer, a dielectric layer, and a second conductive material layer. The dielectric layer is located between the first and second conductive materia... | 06/03/2008 |
| 7382012 | Reducing parasitic capacitance of MIM capacitor in integrated circuits by reducing effective dielectric constant of dielectric layer A memory device having improved sensing speed and reliability and a method of forming the same are provided. The memory device includes a first dielectric layer having a low k value over a semiconductor substrate, a second dielectric layer having a second k value ov... | 06/03/2008 |
| 7364965 | Semiconductor device and method of fabrication A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the su... | 04/29/2008 |
| 7364979 | Capcitor with single crystal tantalum oxide layer and method for fabricating the same A capacitor and a method for fabricating the same are provided. The capacitor includes: a substrate; an inter-layer insulation layer formed over the substrate and including a contact hole; a storage node formed over the inter-layer insulation layer and filled into t... | 04/29/2008 |
| 7361549 | Method for fabricating memory cells for a memory device The invention provides a method for fabricating a memory device having memory cells which are formed on a microstructured driving unit (100), in which method a shaping layer (104) is provided and is patterned in such a manner that vertical trench struc... | 04/22/2008 |
| 7361560 | Method of manufacturing a dielectric layer in a memory device that includes nitriding step A method for manufacturing a dielectric layer structure for a non-volatile memory cell is provided. A method includes forming a first dielectric layer for tunneling on a semiconductor substrate, a second dielectric layer on the first dielectric layer to store charge... | 04/22/2008 |
| 7358164 | Crystal imprinting methods for fabricating substrates with thin active silicon layers Methods of forming semiconductor structures characterized by a thin active silicon layer on an insulating substrate by a crystal imprinting or damascene approach. The methods include patterning an insulating layer to define a plurality of apertures, filling the aper... | 04/15/2008 |
| 7355281 | Method for making semiconductor device having a high-k gate dielectric layer and a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, then forming a trench within the first dielectric layer. After forming a second dielectric layer on the substrate, a first metal layer is ... | 04/08/2008 |
| 7354822 | Method of forming a MOSFET with dual work function materials A vertical pass transistor used in a DRAM cell for maintaining a low total leakage current and providing adequate drive current is described together with a method of fabricating such a device. The transistor gate is engineered in lieu of the channel. The vertical p... | 04/08/2008 |
| 7348234 | Methods of forming capacitor constructions The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a si... | 03/25/2008 |
| 7348654 | Capacitor and inductor scheme with e-fuse application RF devices formed in integrated circuit devices include a top metal level overlying a substrate. The top metal level comprises pads and portions of planned RF devices and an RF metal level overlying the top metal level completes the RF devices which may be an interc... | 03/25/2008 |
| 7338878 | Method for forming capacitor in semiconductor device Upon a deep-hole capacitor fabrication, a hole is formed in an insulator layer, and then a film of a conductive material is formed on the insulator layer and on the whole inner surface of the hole. The film and the insulator layer are exposed to a chemical-mechanica... | 03/04/2008 |
| 7332401 | Method of fabricating an electrode structure for use in an integrated circuit An electrode structure includes a first layer of conductive material and a dielectric layer formed on a surface of the first layer. An opening is formed in the dielectric layer to expose a portion of the surface of the first layer. A binding layer is formed on the d... | 02/19/2008 |
| 7332390 | Semiconductor memory device and fabrication thereof A semiconductor memory device and fabrication method thereof. In a semiconductor memory device, each memory cell comprises a deep trench and a capacitor disposed on the lower portion thereof. A collar oxide layer having a first second sidewalls is disposed on the de... | 02/19/2008 |
| 7329939 | Metal-insulator-metal capacitor and method of fabricating same A metal-insulator-metal (MIM) capacitor including a metal layer, an insulating layer formed on the metal layer, at least a first opening and at least a second opening formed in the first insultaing layer, a dielectric layer formed in the first opening, a conductive ... | 02/12/2008 |
| 7326626 | Capacitor and method for manufacturing the same The capacitor of the present invention comprises: an opening part formed in an interlayer insulating film on a semiconductor substrate; a lower electrode made of a polycrystalline silicon with an uneven surface part; a chemical oxide film formed on the uneven surfac... | 02/05/2008 |
| 7326985 | Method for fabricating metallic bit-line contacts A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer may be introduced between th... | 02/05/2008 |