In 1879, Auguste Bartholdi received design patent number 11,023 titled "Design for a Statue". It was for the Statue of Liberty.
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| Number | Title | Issue Date |
| 8187944 | Patterned capacitor ground shield for inductor in an integrated circuit Integrated circuits are disclosed including at least one inductor-capacitor component, where each of the inductor-capacitor components includes an inductor and a capacitor constructed between the inductor and a substrate. The inductor includes at least one metal loo... | 05/29/2012 |
| 8183121 | Carbon-based films, and methods of forming the same, having dielectric filler material and exhibiting reduced thermal resistance Methods in accordance with aspects of this invention form microelectronic structures in accordance with other aspects this invention, such as non-volatile memories, that include (1) a bottom electrode, (2) a resistivity-switchable layer disposed above and in contact... | 05/22/2012 |
| 8168506 | On/off ratio for non-volatile memory device and method This application describes a method of forming a switching device. The method includes forming a first dielectric material overlying a surface region of a substrate. A bottom wiring material is formed overlying the first dielectric material and a switching material ... | 05/01/2012 |
| 8153497 | Lanthanide dielectric with controlled interfaces Methods and devices for a dielectric are provided. One method embodiment includes forming a passivation layer on a substrate, wherein the passivation layer contains a composition of silicon, oxygen, and nitrogen. The method also includes forming a lanthanide dielect... | 04/10/2012 |
| 8119491 | Methods of fabricating passive element without planarizing and related semiconductor device Methods of fabricating a passive element and a semiconductor device including the passive element are disclosed including the use of a dummy passive element. A dummy passive element is a passive element or wire which is added to the chip layout to aid in planarizati... | 02/21/2012 |
| 8110474 | Method of making micromodules including integrated thin film inductors Micromodules and methods of making them are disclosed. An exemplary micromodule includes a substrate having a thin film inductor, and a bumped die mounted on the substrate and over the thin film inductor. ... | 02/07/2012 |
| 8110473 | Semiconductor device comprising multilayer dielectric film and related method A semiconductor device including a multilayer dielectric film and a method for fabricating the semiconductor device are disclosed. The multilayer dielectric film includes a type-one dielectric film having a tetragonal crystalline structure, wherein the type-one diel... | 02/07/2012 |
| 8101493 | Capacitor of semiconductor device and method for manufacturing the same A capacitor of a semiconductor device and a method for manufacturing the same includes a lower metal layer on and/or over a semiconductor substrate; an insulating layer formed on and/or over the lower metal layer with step difference; and an upper electrode on and/o... | 01/24/2012 |
| 8097520 | Integration of passive device structures with metal gate layers A passive device structure includes an unpatterned metal gate layer formed in a passive device region of a semiconductor device; an insulator layer formed upon the unpatterned metal gate layer; a semiconductor layer formed upon the insulator layer; and one or more m... | 01/17/2012 |
| 8097521 | Electronic device comprising an integrated circuit and a capacitance element An electronic device (ICD) comprises an integrated circuit (AIC) and a capacitance element (PIC). The integrated circuit (AIC) is provided with a plurality of circuit contact pairs (CI). The capacitance element (PIC) is provided with a plurality of capacitance conta... | 01/17/2012 |
| 8093134 | Phase change memory device with heater electrodes having fine contact area and method for manufacturing the same A phase change memory device includes a semiconductor substrate having a conductive region, a heater electrode formed on the semiconductor substrate and including a connection element which is composed of carbon nanotubes electrically connected with the conductive r... | 01/10/2012 |
| 8071456 | Semiconductor device and method of manufacturing the same Any of a plurality of contact plugs which reaches a diffusion layer serving as a drain layer of an MOS transistor has an end provided in contact with a lower surface of a thin insulating film provided selectively on an interlayer insulating film. A phase change film... | 12/06/2011 |
| 8048755 | Resistive memory and methods of processing resistive memory Resistive memory and methods of processing resistive memory are described herein. One or more method embodiments of processing resistive memory include conformally forming a cell material in an opening in an interlayer dielectric such that a seam is formed in the ce... | 11/01/2011 |
| 8039353 | Semiconductor device and manufacturing method of semiconductor device The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered... | 10/18/2011 |
| 8017490 | Methods of forming metal-insulator-metal (MIM) capacitors with passivation layers on dielectric layers Methods of forming a dielectric layer of a MIM capacitor can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are al... | 09/13/2011 |
| 7985653 | Semiconductor chip with coil element over passivation layer A method for fabricating a circuitry component includes providing a semiconductor substrate, a first coil over said semiconductor substrate, a passivation layer over said first coil; and depositing a second coil over said passivation layer and over said first coil. ... | 07/26/2011 |
| 7981756 | Common plate capacitor array connections, and processes of making same A process of forming a semiconductive capacitor device for a memory circuit includes forming a first capacitor cell recess and a second capacitor cell recess that are spaced apart by a capacitor cell boundary of a first height. The process includes lowering the firs... | 07/19/2011 |
| 7981758 | Systems and methods to laminate passives onto substrate A method may include depositing a dielectric layer onto a substrate, removing portions of the dielectric layer to create a plurality of separated non-removed portions of the dielectric layer, depositing one or more passive electronic components into each of the plur... | 07/19/2011 |
| 7981757 | Semiconductor component and method of manufacture A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in ... | 07/19/2011 |
| 7968419 | Back-to-back metal/semiconductor/metal (MSM) Schottky diode A method is provided for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor. The method deposits a Si semiconductor layer between a bottom electrode and a top electrode, and forms a MSM diode having a threshold vo... | 06/28/2011 |
| 7955942 | Semiconductor device and method of forming a 3D inductor from prefabricated pillar frame A semiconductor device is made by mounting a semiconductor die over a carrier. A ferromagnetic inductor core is formed over the carrier. A prefabricated pillar frame is formed over the carrier, semiconductor die, and inductor core. An encapsulant is deposited over t... | 06/07/2011 |
| 7935607 | Integrated passive device with a high resistivity substrate and method for forming the same According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (72), is provided. An insulating dielectric layer (32) having a thickness (36) of at least 4 microns is ... | 05/03/2011 |
| 7923341 | Higher selectivity, method for passivating short circuit current paths in semiconductor devices A method for passivating short circuit defects in a thin film large area photovoltaic device in accordance with an exemplary embodiment is provided. The method employs a passivation agent and a counter electrode disposed in said passivation agent. The method include... | 04/12/2011 |
| 7919383 | Capacitor element manufacturing jig and capacitor element manufacturing method The invention relates to a jig for producing capacitor elements, which is formed of resin material and is used for accommodate a plurality of capacitor element substrates therein to thereby batch-process the substrates. The jig is characterized in that portions of t... | 04/05/2011 |
| 7915132 | Corresponding capacitor arrangement and method for making the same The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is formed at the surface of a carrier substrate and a first capacitor electrode with a multiplicity of interspac... | 03/29/2011 |
| 7897472 | Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits Methods for forming multiple inductors on a semiconductor wafer are described. A plating layer and a photoresist layer are applied over a semiconductor wafer. Recess regions are etched in the photoresist layer using photolithographic techniques, which exposes portio... | 03/01/2011 |
| 7888227 | Integrated circuit inductor with integrated vias Integrated circuit inductors (5) are formed by interconnecting various metal layers (10) in an integrated circuit with continuous vias (200). Using continuous vias (200) improves the Q factor over existing methods for high frequency appli... | 02/15/2011 |
| 7875524 | Method of fabricating an inductor for a semiconductor device The inductor for a semiconductor device includes at least one dielectric pattern selectively formed on a top of the interlayer dielectric, at least one first metal wire formed on a top of the interlayer dielectric, at least one second metal wire formed on a top of t... | 01/25/2011 |
| 7871889 | Capacitor and method for fabricating the same A capacitor includes a lower electrode, a first dielectric layer formed over the lower electrode, a second dielectric layer formed over the first dielectric layer, wherein the second dielectric layer includes an amorphous high-k dielectric material, a third dielectr... | 01/18/2011 |
| 7858483 | Method for fabricating capacitor of semiconductor device A method for forming a capacitor of a semiconductor device includes forming a first insulation layer having a storage node plug on a semiconductor substrate; forming an etch stop layer and a second insulation layer sequentially on the substrate having the first insu... | 12/28/2010 |
| 7851322 | Fabricating method of packaging structure A fabricating method of packaging structure is provided. First, a capacitive element is formed. Then, a first dielectric layer is formed on a first electronic component by performing a build-up process, an interconnection is formed in the first dielectric layer, and... | 12/14/2010 |
| 7851321 | Semiconductor integrated circuit devices having high-Q wafer back-side capacitors Methods are provided for fabricating semiconductor IC (integrated circuit) chips having high-Q on-chip capacitors formed on the chip back-side and connected to integrated circuits on the chip front-side using through-wafer interconnects. In one aspect, a semiconduct... | 12/14/2010 |
| 7838380 | Method for manufacturing passive device and semiconductor package using thin metal piece A method for manufacturing passive devices and semiconductor packages using a thin metal piece is provided. According to the method, an adhesive layer is formed on a dummy substrate; a thin metal piece is bonded on the adhesive layer; a masking material is attached ... | 11/23/2010 |
| 7838379 | Non-volatile memory device and method of manufacturing the same In a phase change memory, electric property of a diode used as a selection device is extremely important. However, since crystal grain boundaries are present in the film of a diode using polysilicon, it involves a problem that the off leak property varies greatly ma... | 11/23/2010 |
| 7829426 | Semiconductor component and method of manufacture A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in ... | 11/09/2010 |
| 7829425 | Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits An apparatus and method for wafer level fabrication of high value inductors directly on top of semiconductor integrated circuits. The apparatus and method includes fabricating a semiconductor wafer including a plurality of dice, each of the dice including power circ... | 11/09/2010 |
| 7829427 | Method of fabricating a high Q factor integrated circuit inductor A method of forming an inductor. The method including: (a) forming a dielectric layer on a top surface of a substrate; after (a), (b) forming a lower trench in the dielectric layer; after (b), (c) forming a resist layer on a top surface of the dielectric layer; afte... | 11/09/2010 |
| 7820520 | Semiconductor device with capacitor and/or inductor and method of making An integrated circuit has a plurality of terminals for making electrical connection to the integrated circuit. At least one device is formed adjacent an outer edge of the integrated circuit. The device includes at least one metal conductor for forming an edge seal f... | 10/26/2010 |
| 7807540 | Back end thin film capacitor having plates at thin film resistor and first metallization layer levels An integrated circuit back end capacitor structure includes a first dielectric layer on a substrate, a thin film bottom plate on the first dielectric layer, and a second dielectric layer on the first dielectric layer and the bottom plate, and a thin film top plate d... | 10/05/2010 |
| 7803686 | Methods for etching doped oxides in the manufacture of microfeature devices Methods for selectively etching doped oxides in the manufacture of microfeature devices are disclosed herein. An embodiment of one such method for etching material on a microfeature workpiece includes providing a microfeature workpiece including a doped oxide layer ... | 09/28/2010 |