Class 438/349 - Pedestal base

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a bipolar transistor wherein the base
No. of patents: 43
Last issue date: 01/10/2012

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Number	Title	Issue Date
8093132	Method of manufacturing a bipolar junction transistor A bipolar junction transistor and a method of manufacturing a bipolar junction transistor are disclosed. An exemplary bipolar junction transistor includes a second conductivity type base region in a first conductivity type substrate, step-shaped recesses in the base...	01/10/2012
7364976	Selective etch for patterning a semiconductor film deposited non-selectively A method to selectively etch, and hence pattern, a semiconductor film deposited non-selectively is described. In one embodiment, a carbon-doped silicon film is deposited non-selectively such that the film forms an epitaxial region where deposited on a crystalline su...	04/29/2008
7238565	Methodology for recovery of hot carrier induced degradation in bipolar devices A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avala...	07/03/2007
7141865	Low noise semiconductor amplifier A Low Noise semiconductor amplifier structure formed from layers of differently doped semiconductor material. This structure when properly biased will amplify voltage signals applied to the input terminal (Base1 or signal-base), and provide the same signal, a...	11/28/2006
7091082	Semiconductor method and device A method for enhancing operation of a bipolar light-emitting transistor includes the following steps: providing a bipolar light-emitting transistor having emitter, base, and collector regions; providing electrodes for coupling electrical signals with the emitter, ba...	08/15/2006
7074685	Method of fabrication SiGe heterojunction bipolar transistor A method of fabricating a semiconductor device includes a SiGe(C) heterojunction bipolar transistor using a non-selective epitaxial growth where an insulating layer is formed on a substrate and a layer structure including a conductive layer is provided on the insula...	07/11/2006
7005476	Multicomponent coating and adhesive material Disclosed is a multicomponent, isocyanate-terminated or silane-functionalized coating and adhesive material which is continuously produced by mixing the individual components and by heating the latter and continuing mixing until said components reach a liquid state,...	02/28/2006
6967144	Low doped base spacer for reduction of emitter-base capacitance in bipolar transistors with selectively grown epitaxial base A bipolar transistor structure includes a collector region having a first conductivity type formed in a semiconductor substrate. A base region is formed over the collector region; the base region includes a highly doped lower layer having a second conductivity type ...	11/22/2005
6936530	Deposition method for Si-Ge epi layer on different intermediate substrates A method of forming an Si—Ge epitaxial layer comprising the following steps. A structure is provided and a doped Si—Ge seed layer is formed thereover. The doped Si—Ge seed layer having increased nucleation sites. A Si—Ge epitaxial layer upon the doped Si—G...	08/30/2005
6930011	Semiconductor device with a bipolar transistor, and method of manufacturing such a device A semiconductor device includes a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is pro...	08/16/2005
6924203	Double HBT base metal micro-bridge A heterojunction bipolar transistor (HBT) device structure is provided which facilitates the reduction of the base-collector capacitance and a method for making the same. The base-collector capacitance is decreased by fabricating a base micro-bridge connecting a bas...	08/02/2005
6855614	Sidewalls as semiconductor etch stop and diffusion barrier Methods and apparatus of forming a semiconductor device using pedestals and sidewalls. The pedestals and sidewalls may provide an etch stop and/or a diffusion barrier during manufacture of a semiconductor device. Processes of forming diode connected vertical cylindr...	02/15/2005
6847061	Elimination of implant damage during manufacture of HBT During the conventional manufacture of HBTs, implant damage occurs which leads to enhanced internal base diffusion. This problem has been overcome by making the base and base contact area from a single, uniformly doped layer of silicon-germanium. Instead of an ion i...	01/25/2005
6780695	BiCMOS integration scheme with raised extrinsic base A method of forming a BiCMOS integrated circuit having a raised extrinsic base is provided. The method includes first forming a polysilicon layer atop a surface of a gate dielectric which is located atop a substrate having device areas for forming at least one bipol...	08/24/2004
6767798	Method of forming self-aligned NPN transistor with raised extrinsic base A self-aligned bipolar transistor and a method of formation thereof are provided. The bipolar transistor has a raised extrinsic base such that the link base resistance is reduced by providing an extrinsic base which is thicker than the intrinsic base. The increase i...	07/27/2004
6764918	Structure and method of making a high performance semiconductor device having a narrow doping profile A structure and method of making an NPN heterojunction bipolar transistor (100) includes a semiconductor substrate (11) with a first region (82) containing a dopant (86) for forming a base region of the transistor. A second region (84	07/20/2004
6713361	Method of manufacturing a bipolar junction transistor including undercutting regions adjacent to the emitter region to enlarge the emitter region According to one embodiment of the invention, a method for manufacturing bipolar junction transistors includes disposing a first oxide layer between a semiconductor substrate and a base polysilicon layer, forming a dielectric layer outwardly from the base polysilico...	03/30/2004
6617220	Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base An epitaxial base bipolar transistor including an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on a portion of the single crystal layer; a raised extrinsic base on a surface of the semiconductor substrate; an insul...	09/09/2003
6551889	Method of producing a SI-GE base heterojunction bipolar device A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. Afte...	04/22/2003
6506659	High performance bipolar transistor In one disclosed embodiment, a collector is deposited and a base is grown on the collector, for example, by epitaxially depositing either silicon or silicon-germanium. An emitter is fabricated on the base followed by implant doping an extrinsic base regio...	01/14/2003
6482712	Method for fabricating a bipolar semiconductor device A method for fabricating a bipolar device, including the steps of forming an epitaxial growth retarding layer on a substrate at a predetermined angle, forming a collector layer on the substrate so that the collector layer is adjacent the epitaxial growth ...	11/19/2002
6180442	Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method The present invention relates to a method for fabricating an integrated circuit including an NPN-type bipolar transistor, including the steps of defining a base-emitter location of the transistor with polysilicon spacers resting on a silicon nitride layer...	01/30/2001
6156594	Fabrication of bipolar/CMOS integrated circuits and of a capacitor The present invention relates to a method for fabricating an integrated circuit including MOS transistors and a bipolar transistor of NPN type, including the steps of: forming the MOS transistors, covering the entire structure with a protection layer, ope...	12/05/2000
6153488	Method for producing semiconductor device, and semiconductor device produced by same A method for producing a semiconductor device including a bipolar transistor, has the steps of: forming an element isolating region in a major surface of a semiconductor substrate to define an element forming region to form a collector region in the eleme...	11/28/2000
6020246	Forming a self-aligned epitaxial base bipolar transistor An improved method and an apparatus for forming a self-aligned epitaxial base bipolar transistor in a semiconductor material is disclosed. The method of the invention involves forming an intrinsic base region formed by growing an epitaxial semiconductor m...	02/01/2000
5976941	Ultrahigh vacuum deposition of silicon (Si-Ge) on HMIC substrates The present invention presents a method in which semiconductor heterojunction and homojunction materials are selectively formed on silicon pedestals in an HMIC after the high temperature processing steps in fabricating the HMIC structure are completed....	11/02/1999
5824589	Method for forming bipolar transistor having a reduced base transit time A bipolar transistor has a performance and high reliability, which are by enhancing a withstand voltage between an emitter and a base. The bipolar transistor includes a first impurity diffusion layer in a semiconducting substrate, a first conductive film ...	10/20/1998
5391503	Method of forming a stacked semiconductor device wherein semiconductor layers and insulating films are sequentially stacked and forming openings through such films and etchings using one of the insulating films as a mask According to this invention, a base extracting electrode is formed using a polysilicon side wall self-aligned with a base region so as to reduce a collector-base parasitic capacitance of a transistor. A base layer is formed on a semiconductor substrate by...	02/21/1995
5350700	Method of fabricating bipolar transistors with buried collector region A method of fabricating a bipolar transistor with a buried subcollector by forming a collector layer and a base layer in a semiconductor substrate. A polysilicon layer is deposited over the base layer and spaced emitter and base contact regions formed in ...	09/27/1994
5234844	Process for forming bipolar transistor structure A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions h...	08/10/1993
5106767	Process for fabricating low capacitance bipolar junction transistor This invention relates to a bipolar transistor which incorporates, in a raised base regime, an emitter, collector pedestal and intrinsic and extrinsic bases all of which are self-aligned. The invention also relates to a process for fabricating such device...	04/21/1992
5091323	Process for the fabrication of bipolar device In a process for the fabrication of a bipolar semiconductor device having a substrate, the substrate defining a working surface, and a collector region of a first conductivity type formed within the substrate at a position adjacent to the working surface,...	02/25/1992
5064772	Bipolar transistor integrated circuit technology An integrated circuit bipolar transistor is described wherein the relative semiconductor electrode areas are established by an electrode pedestal that includes a base contact positioning feature and wiring constraints are relaxed by a base pedestal that f...	11/12/1991
5059544	Method of forming bipolar transistor having self-aligned emitter-base using selective and non-selective epitaxy Selective and non-selective epitaxial growth is utilized to form a bipolar transistor having self-aligned emitter and base regions. A substrate of semiconductor material of a first conductivity type is provided and a first layer of semiconductor material ...	10/22/1991
4876212	Process for fabricating complimentary semiconductor devices having pedestal structures A process for fabricating complimentary semiconductor devices having pedestal structures wherein both PNP and NPN transistors are formed simultaneously on the same substrate. After polysilicon layers have been patterned and etched, various polysilicon reg...	10/24/1989
4851362	Method for manufacturing a semiconductor device A method for manufacturing a semicondcutor device includes, steps of forming a poly silicon layer at a predetermined area for a base electrode on a surface of a thin insulating film, forming an insulating film at a sidewall of the exposed poly silicon lay...	07/25/1989
4849371	Monocrystalline semiconductor buried layers for electrical contacts to semiconductor devices A method and product for monocrystalline semiconductor buried layer contacts formed from recrystallized polycrystalline buried layers....	07/18/1989
4829016	Bipolar transistor by selective and lateral epitaxial overgrowth Silicon epitaxial lateral overgrowth (ELO) techniques are employed to fabricate bipolar transistors. ELO bipolar devices have may advantages in reducing parasitic values. Because the heavily doped buried layer (or sub-collector) is eliminated in ELO struc...	05/09/1989
4728391	Pedestal transistors and method of production thereof The present invention describes a method of producing an MOS, bipolar and Bimos pedestal transistor wherein the source, drain, and gate metals are in place prior to the source/drain diffusion in a MOS transistor; and the emitter and base metals are in pla...	03/01/1988
4609413	Method for manufacturing and epitaxially isolated semiconductor utilizing etch and refill technique An improved means and method is provided for forming isolated device regions suitable for the construction of control circuits and devices, in the presence of and isolated from other device regions suitable for the construction of bottom-contact power dev...	09/02/1986

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Class 438/349 - Pedestal base