Process For Propelling Foodstuffs or the Like into a Crowd
A method of launching foodstuffs into a crowd for promotional and entertainment purposes.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7875523 | HBT with emitter electrode having planar side walls A heterojunction bipolar transistor is formed with an emitter electrode that comprises an emitter epitaxy underlying an emitter metal cap and that has horizontal dimensions that are substantially equal to the emitter metal cap. ... | 01/25/2011 |
| 7838377 | Power semiconductor devices with mesa structures and buffer layers including mesa steps A bipolar junction transistor includes a collector having a first conductivity type, a drift layer having the first conductivity type on the collector, a base layer on the drift layer and having a second conductivity type opposite the first conductivity type, a ligh... | 11/23/2010 |
| 7741186 | Creating increased mobility in a bipolar device The mobility of charge carriers in a bipolar (BJT) device is increased by creating compressive strain in the device to increase mobility of electrons in the device, and creating tensile strain in the device to increase mobility of holes in the device. The compressiv... | 06/22/2010 |
| 7678657 | System and method for manufacturing an emitter structure in a complementary bipolar CMOS transistor manufacturing process A system and method are disclosed for manufacturing an emitter structure in a complementary bipolar complementary metal oxide semiconductor (CBiCMOS) transistor manufacturing process. A protective layer is formed over an emitter layer in a transistor structure and l... | 03/16/2010 |
| 7598149 | Micro-leds An array of light emitting devices, each device comprising a sloped wall mesa (24) of luminescent semiconductor material. Extending over the sloped wall mesas (24) is a metal contact (30). The array can be arranged as a parallel addressable syst... | 10/06/2009 |
| 7579252 | Self aligned process for BJT fabrication Methods for forming a SiC BJT having a low base resistance and minimal emitter width are provided. The methods incorporate a plated shadow metal layer overhanging the emitter mesa. The mushroom-shaped shadow metal layer can then act as either a deposition shadow mas... | 08/25/2009 |
| 7566626 | System and method for providing a fully self aligned bipolar transistor using modified cavity formation to optimize selective epitaxial growth A system and method are disclosed for providing a fully self aligned bipolar transistor using modified cavity formation to optimize selective epitaxial growth. A collector of a transistor is formed and at least two layers of silicon oxide are formed above the collec... | 07/28/2009 |
| 7465638 | Bipolar transistor and fabricating method thereof There is provided a bipolar transistor (with a respective fabrication method) that provides superior noise characteristics and gain diffusion. The fabricating method includes forming a first base region at a collector region, which in turn is formed on a substrate. ... | 12/16/2008 |
| 7368361 | Bipolar junction transistors and method of manufacturing the same A substrate has a collector region of a first conductivity type, and a base layer of a single crystalline structure and including impurities of a second conductivity type is located over the collector region. An emitter region is defined at least in part by impuriti... | 05/06/2008 |
| 7365403 | Semiconductor topography including a thin oxide-nitride stack and method for making the same A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon dioxide layer. In addition, a method is provided which includes grow... | 04/29/2008 |
| 7342293 | Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same The present invention relates to bipolar junction transistors (BJTS). The collector region of each BJT is located in a semiconductor substrate surface and adjacent to a first shallow trench isolation (STI) region. A second STI region is provided, which extends betwe... | 03/11/2008 |
| 7336038 | Method and apparatus for single-ended conversion of DC to AC power for driving discharge lamps The present disclosure introduces a simple method and apparatus for converting DC power to AC power, and, specifically, to single-ended inverter circuits for driving discharge lamps such as a Cold Cathode Fluorescent Lamp (CCFL) or an External Electrode Fluorescent ... | 02/26/2008 |
| 7329941 | Creating increased mobility in a bipolar device The mobility of charge carriers in a bipolar (BJT) device is increased by creating compressive strain in the device to increase mobility of electrons in the device, and creating tensile strain in the device to increase mobility of holes in the device. The compressiv... | 02/12/2008 |
| 7320922 | Integrated circuit and method for manufacturing an integrated circuit on a semiconductor chip An integrated circuit on a semiconductor chip is provided with a first bipolar transistor and a second bipolar transistor. The first bipolar transistor has a first collector region of a first conductivity type, grown by at least one epitaxial layer, and the second b... | 01/22/2008 |
| 7288829 | Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the... | 10/30/2007 |
| 7288828 | Metal oxide semiconductor transistor device A metal-oxide-semiconductor (MOS) transistor device is provided. The MOS transistor device includes a substrate, a gate structure, a spacer, a source/drain region and a barrier layer. The gate structure is disposed on the substrate. The gate structure includes a gat... | 10/30/2007 |
| 7273789 | Method of fabricating heterojunction bipolar transistor Provided is a method of fabricating a heterojunction bipolar transistor (HBT). The method includes: sequentially depositing a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter capping layer on a substrate; forming an emitter elec... | 09/25/2007 |
| 7268027 | Method of manufacturing photoreceiver Disclosed is a method of manufacturing a photoreceiver, including sequentially laminating a buffer layer, a channel layer, a barrier layer, and a cap layer on a substrate; forming a mesa for HEMT and MSM PD by removing the buffer layer, the channel layer, the barrie... | 09/11/2007 |
| 7262483 | Semiconductor device and method for manufacturing the same By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed o... | 08/28/2007 |
| 7211821 | Devices with optical gain in silicon A photonic device includes a silicon semiconductor based superlattice. The superlattice has a plurality of layers that form a plurality of repeating units. At least one of the layers in the repeating unit is an optically active layer with at least one species of rar... | 05/01/2007 |
| 7208387 | Method for manufacturing compound semiconductor wafer and compound semiconductor device A method for producing a compound semiconductor wafer used for production of HBT by vapor growth of a sub-collector layer, a collector layer, a base layer and an emitter layer in this turn on a compound semiconductor substrate using MOCVD method wherein the base lay... | 04/24/2007 |
| 7192838 | Method of producing complementary SiGe bipolar transistors Method of producing complementary SiGe bipolar transistors. In a method of producing complementary SiGe bipolar transistors, interface oxide layers (38, 58) for NPN and PNP emitters (44, 64), are separately formed and emitter polysilicon (40, 60... | 03/20/2007 |
| 7173274 | Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe bas... | 02/06/2007 |
| 7170184 | Treatment of a ground semiconductor die to improve adhesive bonding to a substrate Methods are provided to improve the adhesive bonding of a semiconductor die to a substrate through an adhesive paste by forming a layer of silicon dioxide on the back surface of the semiconductor die prior to applying the adhesive paste. Contacting the semiconductor... | 01/30/2007 |
| 7166894 | Schottky power diode with SiCOI substrate and process for making such diode The present invention relates to a power junction device including a substrate of the SiCOI type with a layer of silicon carbide (16) insulated from a solid carrier (12) by a buried layer of insulant (14), and including at least one Schottky con... | 01/23/2007 |
| 7104850 | Low insertion-force connector terminal, method of producing the same and substrate for the same The present invention is to provide low insertion-force connector terminals. A self-assembled monolayer is deposited on the surface of the connector terminals. The deposited connector terminals do not require a special lever for adjusting contact pressure. The conne... | 09/12/2006 |
| 7084044 | Optoelectronic device and method of manufacture thereof The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over... | 08/01/2006 |
| 7084041 | Bipolar device and method of manufacturing the same including pre-treatment using germane gas A method of manufacturing a bipolar device including pre-treatment using germane gas and a bipolar device manufactured by the same. The method includes forming a single crystalline silicon layer for a base region on a collector region; and forming a polysilicon laye... | 08/01/2006 |
| 7084040 | Method for growth of group III-V semiconductor material on a dielectric Formation of a regrowth layer of a Group III–V semiconductor material is facilitated by prior formation of an intermediate layer, selected primarily for its smooth morphology properties. The intermediate layer is formed over an underlying substrate and over a diel... | 08/01/2006 |
| 7067581 | Repulpable PSAs The invention relates to a repulpable pressure-sensitive adhesive. Provision is made for the repulpable pressure-sensitive adhesive to comprise at least one polyacrylate-based block copolymer. ... | 06/27/2006 |
| 7060583 | Method for manufacturing a bipolar transistor having a polysilicon emitter In the inventive method for manufacturing a bipolar transistor having a polysilicon emitter, a collector region of a first conductivity type and, adjoining thereto, a basis region of a second conductivity type will be generated at first. At least one layer of an ins... | 06/13/2006 |
| 7056447 | Semiconductor processing methods Embodiments in accordance with the present invention provide for removing organic materials from substrates, for example substrates employed in the fabrication of integrated circuits, liquid crystal displays and the like. Such embodiments also provide for forming se... | 06/06/2006 |
| 7026190 | Method of manufacturing circuit device Wire bonding is performed efficiently by pressing circumference end of a block of a conductive foil by a clamper, and by performing wire bonding of a circuit element of a mounting portion in the block and the conductive pattern in a lump. At a time of wire bonding, ... | 04/11/2006 |
| 7026666 | Self-aligned NPN transistor with raised extrinsic base A self-aligned bipolar transistor and a method of formation thereof are provided. The bipolar transistor has a raised extrinsic base such that the link base resistance is reduced by providing an extrinsic base which is thicker than the intrinsic base. The increase i... | 04/11/2006 |
| 7008851 | Silicon-germanium mesa transistor A method in the fabrication of a silicon-germanium mesa transistor in a semiconductor process flow comprises the steps of providing a p-type doped silicon bulk substrate (10) having an n+-type doped surface region (31) being a subcollector; ... | 03/07/2006 |
| 6987052 | Method for making enhanced substrate contact for a semiconductor device A method of forming a semiconductor structure in a semiconductor wafer includes the steps of forming an epitaxial layer on at least a portion of a semiconductor substrate of a first conductivity type and forming at least one trench through the epitaxial layer to at ... | 01/17/2006 |
| 6979626 | Method for fabricating a self-aligned bipolar transistor having increased manufacturability and related structure According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated o... | 12/27/2005 |
| 6924203 | Double HBT base metal micro-bridge A heterojunction bipolar transistor (HBT) device structure is provided which facilitates the reduction of the base-collector capacitance and a method for making the same. The base-collector capacitance is decreased by fabricating a base micro-bridge connecting a bas... | 08/02/2005 |
| 6919253 | Method of forming a semiconductor device including simultaneously forming a single crystalline epitaxial layer and a polycrystalline or amorphous layer A method of fabricating a semiconductor device according to the present invention includes a step A of forming a polycrystalline or amorphous preliminary semiconductor layer on a surface of a substrate so as to have an opening portion and a step B of simultaneously ... | 07/19/2005 |
| 6893933 | Bipolar transistors with low-resistance emitter contacts Many integrated circuits include a type of transistor known as a bipolar junction transistor, which has an emitter contact formed of polysilicon. Unfortunately, polysilicon has a relatively high electrical resistance that poses an obstacle to improving switching spe... | 05/17/2005 |