Class 438/338 - Having multiple emitter or collector structure

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a lateral bipolar transistor having plural
No. of patents: 36
Last issue date: 08/23/2011

Number	Title	Issue Date
8003475	Method for fabricating a transistor structure A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and...	08/23/2011
7371650	Method for producing a transistor structure A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and...	05/13/2008
7320922	Integrated circuit and method for manufacturing an integrated circuit on a semiconductor chip An integrated circuit on a semiconductor chip is provided with a first bipolar transistor and a second bipolar transistor. The first bipolar transistor has a first collector region of a first conductivity type, grown by at least one epitaxial layer, and the second b...	01/22/2008
7317215	SiGe heterojunction bipolar transistor (HBT) A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base a...	01/08/2008
7247892	Imaging array utilizing thyristor-based pixel elements An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate. Each thyristor-based pixel element includes complementary n-type and p-ty...	07/24/2007
7226835	Versatile system for optimizing current gain in bipolar transistor structures Disclosed are apparatus and methods for designing electrical contact for a bipolar emitter structure. The area of an emitter structure (106, 306, 400, 404) and the required current density throughput of an electrical contact structure (108, 308, 402, 406	06/05/2007
7176099	Hetero-junction bipolar transistor and manufacturing method thereof A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layer 110 that is made of GaAs; an n-type first collector 121 that is made of a semiconductor material with a ...	02/13/2007
7098113	Method and system for providing a power lateral PNP transistor using a buried power buss A power lateral PNP device is disclosed which includes an epitaxial layer; a first and second collector region embedded in the epitaxial layer; an emitter region between the first and second collector regions. Therefore slots are placed in each of the regions. Accor...	08/29/2006
7098112	Preparation of field emission array comprising nanostructures A field emission array which does not contain any organic material is manufactured by separately preparing nanostructures whose one ends were coated and then adhering the coated ends of the nanostructures to a metal electrode layer formed on a substrate. ...	08/29/2006
6962842	Method of removing a sacrificial emitter feature in a BICMOS process with a super self-aligned BJT A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited u...	11/08/2005
6891230	Bipolar ESD protection structure The invention describes the fabrication and structure of an ESD protection device for integrated circuit semiconductor devices with improved ESD protection and resiliency. A vertical bipolar npn transistor forms the basis of the protection device. To handle the larg...	05/10/2005
6855613	Method of fabricating a heterojunction bipolar transistor A method of fabricating a III-V heterostructure semiconductor device. The method includes the steps of forming at least one conductive post overlying a semiconductor region to form a structure, encapsulating the structure and the conductive post to form a planarized...	02/15/2005
6815301	Method for fabricating bipolar transistor A method for fabricating a bipolar transistor includes: a first step of implanting, along the normal direction of the principle surface of a first-conductive-type semiconductor single crystalline substrates ions of a second-conductive-type first impurity into the se...	11/09/2004
6784064	Heterojunction bipolar transistor and method of making heterojunction bipolar transistor A method of making a heterojunction bipolar transistor comprises the steps of: forming a mask layer on a compound semiconductor film by using a photomask for forming an emitter; and forming the emitter by wet-etching the compound semiconductor film by using the mask...	08/31/2004
6720625	Bipolar ESD protection structure The invention describes the fabrication and structure of an ESD protection device for integrated circuit semiconductor devices with improved ESD protection and resiliency. A vertical bipolar npn transistor forms the basis of the protection device. To handle the larg...	04/13/2004
6673703	Method of fabricating an integrated circuit A method of fabricating an integrated circuit including a monocrystalline silicon substrate, a layer of polycrystalline silicon on the top surface of the substrate and doped with at least two dopants with different rates of diffusion, in which method anne...	01/06/2004
6664609	High frequency differential amplification circuit with reduced parasitic capacitance Disclosed is a circuit layout of a differential amplification circuit that constitutes a Gilbert cell, in which two multiple finger bipolar transistors forming a differential amplifier are positioned substantially axially symmetrical to each other. The lo...	12/16/2003
6645820	Polycrystalline silicon diode string for ESD protection of different power supply connections An ESD protection circuit protects integrated circuits having multiple power supply voltage sources from damage when an ESD event causes excessive differential voltages between the multiple separate power supply voltage sources. The ESD protection circuit...	11/11/2003
6524921	Methods of forming bipolar transistor constructions The invention includes a bipolar transistor construction having a collector region, emitter region, and base region extending within a semiconductive material substrate. The construction further comprises separate access regions associated with the base r...	02/25/2003
6503809	Method and system for emitter partitioning for SiGe RF power transistors A power transistor includes a plurality of emitter regions and a plurality of base contacts. In order to decrease base resistance, each of the plurality of emitter regions is adjacent to at least four base contacts. The entire transistor includes multiple...	01/07/2003
6472286	Bipolar ESD protection structure The invention describes the fabrication and structure of an ESD protection device for integrated circuit semiconductor devices with improved ESD protection and resiliency. A vertical bipolar npn transistor forms the basis of the protection device. To hand...	10/29/2002
6372596	Method of making horizontal bipolar transistor with insulated base structure In one embodiment of a horizontal bipolar transistor constructed in accordance with the teachings of this invention, oxygen is implanted into the horizontal bipolar transistor to provide a silicon dioxide layer between the base and the collector and emitt...	04/16/2002
6140170	Manufacture of complementary MOS and bipolar integrated circuits Complementary vertical bipolar and DMOS devices are formed in a single substrate with fully isolated wells and retrograde well doping. The retrograde well doping results from a process in which the complementary wells are formed in a silicon substrate and...	10/31/2000
6127236	Method of forming a lateral bipolar transistor A substantially concentric lateral bipolar transistor and the method of forming same. A base region is disposed about a periphery of an emitter region, and a collector region is disposed about a periphery of the base region to form the concentric lateral ...	10/03/2000
6103584	Uniform current density and high current gain bipolar transistor A bipolar transistor designed to support a substantially uniform current density in base and collector regions to prevent the characteristic early fall-off of bipolar transistor current gain, and to improve the forward safe operating area performance. The...	08/15/2000
5869381	RF power transistor having improved stability and gain Increased gain and improved stability are realized in using resistive emitter ballasting by including integrated capacitive elements in parallel with the resistive elements in the emitter circuit. A feature of the invention is an integrated capacitor stru...	02/09/1999
5444004	CMOS process compatible self-alignment lateral bipolar junction transistor A self aligned lateral BJT is disclosed which has a lightly doped first region of a first conductivity type, e.g., P-type. A heavily doped polysilicon region, of a second conductivity type, e.g., N-type, is provided on a portion of a surface of the first ...	08/22/1995
5393678	Method for making collector arrangement for magnetotransistor A collector arrangement for a magnetotransistor (10, 25, 30) and a method for making the magnetotransistor (10, 25, 30). A portion of a semiconductor substrate (11) is doped to form a base region (13). The base region is doped to form an emitter region (1...	02/28/1995
5387553	Method for forming a lateral bipolar transistor with dual collector, circular symmetry and composite structure A lateral PNP bipolar transistor includes concentric circular emitter and annular base and dual collector regions. The inner collector region is moderately doped to provide good punch-through and Early voltage performance. The outer collector region is hi...	02/07/1995
5166094	Method of fabricating a base-coupled transistor logic A base-coupled logic gate is characterized by input Schottky diodes that are directly formed on the base region of the switching transistor for the gate. A logic of this type provides flexible circuit arrangements and savings in required area, while achie...	11/24/1992
4956305	Process for fabricating an integrated circuit The invention relates to a pnp lateral transistor comprised of two regions of p-type conductivity which are incorporated into the surface of a semiconductor area of n-type conductivity and constitute the emitter and collector regions. The portion of the s...	09/11/1990
4910159	Method for incrementally increasing the collector area of a lateral PNP transistor during electrical testing of an integrated device on wafer The collector area of a lateral PNP transistor may be incrementally increased during an electic testing step on wafer of an integrated circuit by purposely forming an auxiliary p-type diffused collector region having fractional dimensions near the primary...	03/20/1990
4160988	Integrated injection logic (I-squared L) with double-diffused type injector A semiconductor structure, and method for fabrication, including a semiconductor body of one conductivity type having a major surface. A layer of opposite conductivity material is formed on said surface, said layer having an upper planar surface generally...	07/10/1979
4137109	Selective diffusion and etching method for isolation of integrated logic circuit An integrated injection logic circuit, wherein the inverted, multi-collector transistor of each cell includes active base regions separated by dielectric isolation, and wherein a heavily-doped channel-stop layer is selectively located along the sidewalls ...	01/30/1979
4115797	Integrated injection logic with heavily doped injector base self-aligned with injector emitter and collector An integrated injection logic semiconductor structure having a double diffused lateral PNP transistor and an inverted vertical NPN transistor includes an extended region of epitaxial silicon doped N type by introduction of suitable impurity from two separ...	09/19/1978
4075039	Integrated logic circuit and method of fabrication An integrated injection logic circuit having improved operating characteristics is provided, comprising an inverted, multiple-collector transistor having base regions characterized by a central active portion surrounded by a heavily-doped extrinsic base r...	02/21/1978

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Class 438/338 - Having multiple emitter or collector structure