Class 438/332 - Lightly doped junction isolated resistor

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process wherein the resistive element is in the form of
No. of patents: 38
Last issue date: 06/08/2010

Number	Title	Issue Date
7732293	Tunable semiconductor diodes A diode structure fabrication method. In a P− substrate, an N+ layer is implanted. The N+ layer has an opening whose size affects the breakdown voltage of the diode structure. Upon the N+ layer, an N− layer is formed. Then, a P+ region is formed to serve as an a...	06/08/2010
7439145	Tunable semiconductor diodes A diode structure fabrication method. In a P− substrate, an N+ layer is implanted. The N+ layer has an opening whose size affects the breakdown voltage of the diode structure. Upon the N+ layer, an N− layer is formed. Then, a P+ region is formed to serve as an a...	10/21/2008
7314786	Metal resistor, resistor material and method A metal resistor and resistor material and method of forming the metal resistor are disclosed. The metal resistor may include an infused metal selected from the group consisting of: copper (Cu) infused with at least one of silicon (Si), nitrogen (N2), car...	01/01/2008
7285472	Low tolerance polysilicon resistor for low temperature silicide processing Various methods of fabricating a high precision, silicon-containing resistor in which the resistor is formed as a discrete device integrated in complementary metal oxide semiconductor (CMOS) processing utilizing low temperature silicidation are provided. In some emb...	10/23/2007
7238582	Semiconductor device and process of producing the same The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same...	07/03/2007
7232733	Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein A method of forming an integrated circuit configured to accommodate higher voltage and low voltage devices. In one embodiment, the method of forming the integrated circuit includes forming a transistor by forming a gate over a semiconductor substrate. The method of ...	06/19/2007
7188404	Method for fabricating a resistor An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrat...	03/13/2007
7005712	Method for manufacturing a semiconductor device A semiconductor device of the present invention includes a semiconductor layer 10, an insulation gate type heavy insulated transistor 200 and an insulation gate type light insulated transistor 300 having different drain-source breakdown voltages...	02/28/2006
6937448	Spin valve having copper oxide spacer layer with specified coupling field strength between multi-layer free and pinned layer structures A magnetic head including a spin valve sensor having a sensor layer stack that includes a pinned magnetic layer, a spacer layer formed on the pinned magnetic layer, and a free magnetic layer formed on the spacer layer. In a preferred embodiment the spacer layer is c...	08/30/2005
6835632	Semiconductor device and process of producing the same The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same...	12/28/2004
6656810	Semiconductor device capable of reducing dispersion in electrical characteristics and operating at high speed and method for fabricating the same There is provided a semiconductor device capable of reducing dispersion in electrical characteristics, preventing occurrence of bridge shortcircuit in a silicide process and operating at high operating speed and method for fabricating the same. In a SOI s...	12/02/2003
6639300	Semiconductor integrated circuit having an integrated resistance region A semiconductor integrated circuit device comprises an active device and a resistance element formed monolithically on a common substrate wherein the resistance element includes a dummy pattern having a layered structure identical with a layered structure...	10/28/2003
6569739	Method of reducing the effect of implantation damage to shallow trench isolation regions during the formation of variable thickness gate layers Embodiments of the invention include a method for blanket ion implanting a semiconductor substrate surface to induce uniform damage over desired portions of the surface thereby reducing non-uniform etch effects caused by the varying etch rates of surface ...	05/27/2003
6040225	Method of fabricating polysilicon based resistors in Si-Ge heterojunction devices A method that enables the fabrication of ballast resistors in polysilicon which can be fabricated in a manner so as to not relax the strained layers in the lattice of the silicon germanium transistor wherein the high temperature steps, associated with act...	03/21/2000
5854116	Semiconductor apparatus The present invention relates to a semiconductor apparatus adapted to a ultrahigh density integration process. A semiconductor apparatus of the present invention is characterized by including a high concentration impurity layer with the same type of condu...	12/29/1998
5719066	Method of manufacturing a semiconductor integrated circuit apparatus having a mis-type condenser A lower layer diffusion layer of a metal-insulator-semiconductor-type (MIS-type) condenser is formed by implanting and diffusing phosphorus into an upper portion of an epitaxial layer formed on a semiconductor substrate. Thereafter, a silicon nitride film...	02/17/1998
5316964	Method of forming integrated circuits with diffused resistors in isolation regions An integrated circuit having diffused resistors formed in a low impurity concentration isolation region....	05/31/1994
5141881	Method for manufacturing a semiconductor integrated circuit A method of making a semiconductor integrated circuit provided with an isolating region constituted of an upper and lower isolating regions, and integrated circuit element regions is disclosed, wherein: the lower isolating region is diffused upward to a d...	08/25/1992
5023195	Method for manufacturing a semiconductor integrated circuit including a bipolar transistor After a base region and a base contact region, a diffused resistance region and a pair of contact regions formed at each end of the diffused resistance region are formed, an silicon oxide film of essentially uniform thickness is formed anew on the surface...	06/11/1991
4977101	Monolithic pressure sensitive integrated circuit A monolithic pressure sensitive silicon integrated circuit is formed by first providing a localized etch-stop layer on one surface of the silicon chip, then growing successive epitaxial layers of opposite conductivity types over this surface. In the upper...	12/11/1990
4898837	Method of fabricating a semiconductor integrated circuit A method of fabricating a semiconductor integrated circuit comprises the steps of: forming buried layers in predetermined regions of a semiconductor substrate; forming an epitaxial layer covering the substrate and the buried layers; forming isolation regi...	02/06/1990
4855257	Forming contacts to semiconductor device A semiconductor device wherein a semiconductor region which is electrically floating is provided in the main surface of a semiconductor substrate under a bonding pad. This construction helps prevent short-circuiting between the semiconductor substrate and...	08/08/1989
4610730	Fabrication process for bipolar devices A method for the fabrication of semiconductor devices, particularly bipolar silicon devices, having ultra-shallow but relatively large junctions. The process is characterized by the use of relatively low temperatures for critical oxidations steps and for ...	09/09/1986
4571275	Method for minimizing autodoping during epitaxial deposition utilizing a graded pattern subcollector The method suggests the replacement of all or part of the solid or blanket buried region, typically a subcollector region of a bipolar transistor, by a mesh or stripe shaped subcollector. During subsequent thermal processing involving growth of the epitax...	02/18/1986
4418469	Method of simultaneously forming buried resistors and bipolar transistors by ion implantation A method of making at a relatively low temperature, a resistor region of a high sheet resistance, solely or together with other circuit devices such as bipolar transistors in an IC chip, with the step of forming a buried resistor layer inside a semiconduc...	12/06/1983
4416055	Method of fabricating a monolithic integrated circuit structure Method of fabricating monolithic integrated circuit structure incorporating a bipolar transistor and a high value resistor. First and second N-type sectors are formed in an N-type epitaxial layer by junction isolation. A silicon oxide layer is formed on t...	11/22/1983
4400865	Self-aligned metal process for integrated circuit metallization A self-aligned metal process is decribed which achieves self-aligned metal to silicon contacts and sub-micron contact-to-contact and metal-to-metal spacing. The insulation between the contacts and the metal is a pattern of dielectric material having a thi...	08/30/1983
4247343	Method of making semiconductor integrated circuits The proposed method of making semiconductor integrated circuits comprises sequential formation on a p-substrate of a first layer of n-regions, an epitaxial p-layer, a second layer of n-regions with an oxide layer, a third layer of p- and n-regions formed ...	01/27/1981
4228450	Buried high sheet resistance structure for high density integrated circuits with reach through contacts A high sheet resistance structure for high density integrated circuits and the method for manufacturing such structure is given. The structure includes a silicon region separated from other silicon regions by a dielectric barrier surrounding the region. A...	10/14/1980
4196228	Fabrication of high resistivity semiconductor resistors by ion implanatation This disclosure relates to a low power write-once, read-only semiconductor memory (PROM or programmable read only memory) array wherein the semiconductor resistors located in the word line decoder and driver and also in the bit line decoder and sense ampl...	04/01/1980
4155778	Forming semiconductor devices having ion implanted and diffused regions A method for making ion implanted resistors in conjunction with transistors and other devices within an integrated circuit semiconductor substrate. The implantation of the resistors is done after a predeposition diffusion of the base region of the transis...	05/22/1979
4133701	Selective enhancement of phosphorus diffusion by implanting halogen ions An improved method of making bipolar monolithic integrated circuits by successive diffusions of boron and phosphorus. Selective halogen ion implantation is used to locally specifically enhance phosphorus diffusion. The halogen implant is performed prior t...	01/09/1979
4057894	Controllably valued resistor A monolithic semiconductor device including a resistor comprising a first region of one type conductivity, has means for controllably establishing the value of the resistor comprising two additional regions of the opposite type conductivity disposed respe...	11/15/1977
4021270	Double master mask process for integrated circuit manufacture A double master mask process for fabricating semiconductor integrated circuits is provided in which selectively etchable dielectric layers and ion implanted resistors are used to form dense integrated circuits with a minimum number of critical alignments....	05/03/1977
4009057	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device, in which on a basic mask of a first material there is provided a layer of a second material, after which the first material with the second material present thereon is removed, and an island of the second ...	02/22/1977
4001869	MOS-capacitor for integrated circuits In an integrated circuit formed in a P-type silicon crystal body having an N-type epitaxial layer grown thereon, and having at least one bipolar transistor and at least one ion implanted resistor formed therein, a MOS type capacitor is formed requiring no...	01/04/1977
3962779	Method for fabricating oxide isolated integrated circuits A method of making an oxide isolated integrated circuit structure is simplified by forming a first level metallization pattern without the conventional underlying insulating layer and without the need for restricting the size of the metallization to the s...	06/15/1976
3933528	Process for fabricating integrated circuits utilizing ion implantation A self-aligning process for fabrication of integrated circuits utilizing ion implantation to effect doping. A composed masking technique is used to define self-aligned areas in a silicon oxide layer for definition of isolation, base, resistor and collecto...	01/20/1976

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Class 438/332 - Lightly doped junction isolated resistor