Did You Know...
...that in the early 1940s GE engineer James Wright was charged with a task of utmost importance to the war effort: develop a cheap substitute for rubber that could be used to produce tires, gas masks and a whole host of military gear. Wright tackled the task diligently -- and wound up inventing Silly Putty.
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| Number | Title | Issue Date |
| 7416951 | Thin film resistors integrated at two different metal interconnect levels of single die An integrated circuit includes a first thin film resistor on a first dielectric layer. A first layer of interconnect conductors on the first dielectric layer includes a first and second interconnect conductors electrically contacting the first thin film resistor. A ... | 08/26/2008 |
| 7384852 | Sub-lithographic gate length transistor using self-assembling polymers A semiconductor structure including at least one transistor located on a surface of a semiconductor substrate, wherein the at least one transistor has a sub-lithographic channel length, is provided. Also provided is a method to form such a semiconductor structure us... | 06/10/2008 |
| 7354825 | Methods and apparatus to form gates in semiconductor devices A method of formation a gate in a semiconductor device includes forming a gate oxide layer and a sacrificial layer on a semiconductor substrate. The sacrificial layer is then selectively etched to form a sidewall opening. Next, a polycrystalline silicon layer is for... | 04/08/2008 |
| 7348652 | Bulk-isolated PN diode and method of forming a bulk-isolated PN diode A technique for making a bulk isolated PN diode. Specifically, a technique is provided for making a voltage clamp with a pair of bulk isolated PN diode. Another embodiment provides for a voltage clamp with a pair of bulk isolated PN diodes in parallel with a pair of... | 03/25/2008 |
| 7314786 | Metal resistor, resistor material and method A metal resistor and resistor material and method of forming the metal resistor are disclosed. The metal resistor may include an infused metal selected from the group consisting of: copper (Cu) infused with at least one of silicon (Si), nitrogen (N2), car... | 01/01/2008 |
| 7300850 | Method of forming a self-aligned transistor In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor. ... | 11/27/2007 |
| 7285472 | Low tolerance polysilicon resistor for low temperature silicide processing Various methods of fabricating a high precision, silicon-containing resistor in which the resistor is formed as a discrete device integrated in complementary metal oxide semiconductor (CMOS) processing utilizing low temperature silicidation are provided. In some emb... | 10/23/2007 |
| 7250348 | Apparatus and method for packaging semiconductor devices using a patterned photo sensitive film to reduce stress buffering A method and apparatus for packaging semiconductor devices using patterned laminate films to reduce stress buffering. The method includes fabricating a semiconductor die having thin film resistors and bond pads formed on an active surface. A film layer is formed ont... | 07/31/2007 |
| 7176527 | Semiconductor device and method of fabricating same A semiconductor device and a method of fabricating the same suppress a substrate floating effect without causing lowering of a degree of integration. The semiconductor device has a Silicon-On-Insulator structure which includes a semiconductor layer formed on an insu... | 02/13/2007 |
| 7170137 | Semiconductor device and method of manufacturing the same A semiconductor device includes a semiconductor substrate having a first conductivity type. A pair of source/drain areas having a second conductivity type is formed on a surface of the semiconductor substrate. A gate insulating film is provided on a channel area bet... | 01/30/2007 |
| 7169661 | Process of fabricating high resistance CMOS resistor A process of forming a high resistance CMOS resistor with a relatively small die size is provided. According to an aspect of the present invention, the process of fabricating a high resistance resistor is a standard CMOS process that does not require any additional ... | 01/30/2007 |
| 7132320 | Method for manufacturing semiconductor device The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. T... | 11/07/2006 |
| 7084485 | Method of manufacturing a semiconductor component, and semiconductor component formed thereby A method of manufacturing a semiconductor component includes: providing a semiconductor substrate (210, 510); forming a trench (130, 430) in the semiconductor substrate to define a plurality of active areas separated from each other by the trench; form... | 08/01/2006 |
| 7052944 | Thin-film transistor and method of manufacture thereof A thin-film transistor is provided which prevents the degradation of transistor characteristics due to ion channeling. A thin-film transistor (10) includes thin crystalline silicon (2) including source and drain regions (2a) and a channel... | 05/30/2006 |
| 7053440 | Non-volatile semiconductor memory device and manufacturing method of the same A non-volatile semiconductor memory device comprising: a first conductive type well formed within a semiconductor substrate; and a memory cell having a gate insulating film, a floating gate, an insulating film, a control gate and a pair of source/drain region, the g... | 05/30/2006 |
| 7045426 | Vertical type power MOSFET having trenched gate structure A power MOSFET comprising a drain layer of a first conductivity type, a drift layer of the first conductivity type provided on the drain layer, a base layer of a first or a second conductivity type provided on the drift layer, a source region of the first conductivi... | 05/16/2006 |
| 6977196 | Micro-electromechanical switch fabricated by simultaneous formation of a resistor and bottom electrode The present invention provides a method and product-by-method of integrating a bias resistor in circuit with a bottom electrode of a micro-electromechanical switch on a silicon substrate. The resistor and bottom electrode are formed simultaneously by first sequentia... | 12/20/2005 |
| 6972211 | Method of fabricating trench isolated cross-point memory array Resistive cross-point memory devices are provided, along with methods of manufacture and use. The memory devices are comprised by an active layer of resistive memory material interposed between upper electrodes and lower electrodes. A bit region located within the r... | 12/06/2005 |
| 6939773 | Semiconductor devices and manufacturing methods thereof Semiconductor device fabrication methods include forming an oxide layer on a semiconductor substrate, forming an arrangement trench on the semiconductor substrate by patterning the oxide layer and the semiconductor substrate, forming a nitride layer on the arrangeme... | 09/06/2005 |
| 6912759 | Method of manufacturing a thin piezo resistive pressure sensor A method for forming a sensor including the steps of providing a base wafer and forming a sensor cavity in the base wafer. The method further includes the step of coupling a diaphragm wafer to the base wafer, the diaphragm wafer including a diaphragm portion and a s... | 07/05/2005 |
| 6867079 | Method for manufacturing semiconductor device The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. T... | 03/15/2005 |
| 6855585 | Integrating multiple thin film resistors A method for forming multiple resistors on a substrate. The method initially includes providing a first resistor on the substrate. A first dielectric layer is deposited, patterned, and selectively etched over the first resistor. Second resistor material is provided ... | 02/15/2005 |
| 6835632 | Semiconductor device and process of producing the same The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same... | 12/28/2004 |
| 6812108 | BICMOS process with low temperature coefficient resistor (TCRL) A low temperature coefficient resistor(TCRL) has some unrepaired ion implant damage. The damaged portion raises the resistance and renders the resistor less sensitive to operating temperature fluctuations. A polysilicon thin film low temperature coefficient resistor... | 11/02/2004 |
| 6803598 | Si-based resonant interband tunneling diodes and method of making interband tunneling diodes Interband tunnel diodes which are compatible with Si-based processes such as, but not limited to, CMOS and SiGe HBT fabrication. Interband tunnel diodes are disclosed (i) with spacer layers surrounding a tunnel barrier; (ii) with a quantum well adjacent to, but not ... | 10/12/2004 |
| 6753578 | Resin-sealed semiconductor device A resin-sealed semiconductor device is provided which allows unwanted air to be bled out steadily and readily from the space defined between the resistor of a plate-like shape and the insulating substrate in the resin sealing step. The resin-sealed semiconductor dev... | 06/22/2004 |
| 6743691 | Semiconductor device and method for fabricating the same A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a semiconducto... | 06/01/2004 |
| 6732422 | Method of forming resistors A method of forming a resistor is described which achieves improved resistor stability and voltage coefficient of resistance. A resistor is formed from a conducting material such as doped silicon or polysilicon. The resistor has a rectangular first, second, third, f... | 05/11/2004 |
| 6700474 | High value polysilicon resistor A resistor structure is disclosed that is constructed out of two layers of polysilicon. The intrinsic device is made using the top layer which is either a dedicated deposition, or formed as part of an existing process step such as a base epi growth in a B... | 03/02/2004 |
| 6653193 | Resistance variable device A resistance variable device and a method for using the same. The device includes a body formed of a voltage or current controlled resistance setable material, and at least two spaced electrodes on the body. The body includes a surface extending from one ... | 11/25/2003 |
| 6642606 | Method for producing siliconized polysilicon contacts in integrated semiconductor structures In the manufacture of integrated semiconductor structures, the problem frequently occurs that the resistance of polysilicon structures employed as interconnects must be selectively lowered. In order to reduce the resistance of a polysilicon structure, the... | 11/04/2003 |
| 6639300 | Semiconductor integrated circuit having an integrated resistance region A semiconductor integrated circuit device comprises an active device and a resistance element formed monolithically on a common substrate wherein the resistance element includes a dummy pattern having a layered structure identical with a layered structure... | 10/28/2003 |
| 6610569 | Semiconductor device and process of producing the same The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of produci... | 08/26/2003 |
| 6586311 | Salicide block for silicon-on-insulator (SOI) applications A method is provided, the method comprising forming a buffer layer above a structure layer, and forming a dielectric layer above the buffer layer. The method also comprises patterning the dielectric layer to form a salicide block above a portion of the st... | 07/01/2003 |
| 6569739 | Method of reducing the effect of implantation damage to shallow trench isolation regions during the formation of variable thickness gate layers Embodiments of the invention include a method for blanket ion implanting a semiconductor substrate surface to induce uniform damage over desired portions of the surface thereby reducing non-uniform etch effects caused by the varying etch rates of surface ... | 05/27/2003 |
| 6563194 | BJT with surface resistor connection A semiconductor device having: a base area of the first conduction type formed on a semiconductor substrate; an emitter area of the second conduction type formed in the base area; and a collector area of the second conduction type formed as joined to the ... | 05/13/2003 |
| 6548860 | DMOS transistor structure having improved performance A trench DMOS transistor structure is provided that includes at least three individual trench DMOS transistor cells formed on a substrate of a first conductivity type. The plurality of individual DMOS transistor cells is dividable into peripheral transist... | 04/15/2003 |
| 6544835 | Method of forming a ruthenium film by CVD There is provided a technique for forming an Ru film on the bottom of a deep hole with a considerable film thickness for the lower electrode of an information storage capacity element in order to improve the yield of manufacturing DRAMs. The Ru film is fo... | 04/08/2003 |
| 6479360 | Semiconductor device and manufacturing method In a semiconductor device comprising a resistance element electrically connected to a bipolar transistor, the bipolar transistor is formed on a silicon substrate and a predetermined resistance element is formed on an insulation film formed on the bipolar ... | 11/12/2002 |
| 6458668 | Method for manufacturing hetero junction bipolar transistor Disclosed is a method for manufacturing a hetero junction bipolar transistor capable of forming a ledge by using a low-priced contact aligner and in a selective wet etching manner, without having any expensive stepper and dry etching and forming a ballast... | 10/01/2002 |
