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| Number | Title | Issue Date |
| 7927958 | System and method for providing a self aligned bipolar transistor using a silicon nitride ring A system and method are disclosed for providing a self aligned bipolar transistor using a silicon nitride ring. An active region of the transistor is formed and a sacrificial emitter is formed above the active region of the transistor. A silicon nitride ring is form... | 04/19/2011 |
| 7838375 | System and method for providing a polyemit module for a self aligned heterojunction bipolar transistor architecture A system and method are disclosed for providing an improved polyemit module for a self aligned heterojunction bipolar transistor architecture. The polyemit module of the transistor of the present invention is formed using a double layer deposition process. In the do... | 11/23/2010 |
| 7776704 | Method to build self-aligned NPN in advanced BiCMOS technology The present invention provides a method of forming a self-aligned heterobipolar transistor (HBT) device in a BiCMOS technology. The method includes forming a raised extrinsic base structure by using an epitaxial growth process in which the growth rate between single... | 08/17/2010 |
| 7732292 | Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the... | 06/08/2010 |
| 7709338 | BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices A method of fabricating an heterojunction bipolar transistor (HBT) structure in a bipolar complementary metal-oxide-semiconductor (BiCMOS) process selectively thickens an oxide layer overlying a base region in areas that are not covered by a temporary emitter and sp... | 05/04/2010 |
| 7611954 | Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same A self-aligned bipolar transistor structure having a raised extrinsic base comprising an outer region and an inner region of different doping concentrations and methods of fabricating the transistor are disclosed. More specifically, the self-alignment of the extrins... | 11/03/2009 |
| 7541249 | Process for producing a base connection of a bipolar transistor A process for producing a base connection of a bipolar transistor is provided. The process includes the steps of providing a semiconductor structure that can include a three-dimensional sacrificial structure that is selectively removable with respect to adjacent reg... | 06/02/2009 |
| 7399675 | Electronic device including an array and process for forming the same An electronic device can include an NVM array, wherein portions of word lines are formed within trenches. Insulating features are formed over heavily doped regions within the substrate. In one embodiment, charge storage stacks and a control gate electrode layer can ... | 07/15/2008 |
| 7378324 | Selective links in silicon hetero-junction bipolar transistors using carbon doping and method of forming same Bipolar transistors and methods of forming the bipolar transistors. The method including forming a P-type collector in a silicon substrate; forming an intrinsic base on the collector, the intrinsic base including a first N-type dopant species, germanium and carbon; ... | 05/27/2008 |
| 7348250 | Bipolar structure with two base-emitter junctions in the same circuit Bipolar integrated circuits employing SiGe technology incorporate the provision of mask-selectable types of bipolar transistors. A high-performance/high variability type has a thin base in which the diffusion from the emitter intersects the base dopant diffusion wit... | 03/25/2008 |
| 7335547 | Method for effective BiCMOS process integration According to an exemplary embodiment, a method for integrating bipolar and CMOS devices on a substrate, where the substrate includes bipolar and CMOS regions and has a sacrificial oxide layer situated thereon, includes removing a portion of the sacrificial oxide lay... | 02/26/2008 |
| 7291536 | Fabricating a self-aligned bipolar transistor having increased manufacturability According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated o... | 11/06/2007 |
| 7282418 | Method for fabricating a self-aligned bipolar transistor without spacers According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a sacrificial post situated on the top surface of the base. The bipolar transistor also comprises a conformal layer situated o... | 10/16/2007 |
| 7247530 | Ultrathin SOI transistor and method of making the same A method of fabricating an ultrathin SOI memory transistor includes preparing a substrate, including forming an ultrathin SOI layer of the substrate; adjusting the threshold voltage of the SOI layer; depositing a layer of silicon oxide on the SOI layer; patterning a... | 07/24/2007 |
| 7190047 | Transistors and methods for making the same Apparatus comprising: a first compound semiconductor composition layer doped to have a first charge carrier polarity; a second compound semiconductor composition layer doped to have a second charge carrier polarity and located on the first layer; a third compound se... | 03/13/2007 |
| 7148554 | Discrete electronic component arrangement including anchoring, thermally conductive pad An electronic component arrangement includes a discrete electronic component having first and second terminals and a centre-exposed pad. A substrate has a first electrical conductor electrically connected to the first terminal, a second electrical conductor electric... | 12/12/2006 |
| 7102205 | Bipolar transistor with extrinsic stress layer A method of increasing mobility of charge carriers in a bipolar device comprises the steps of: creating compressive strain in the device to increase mobility of holes in an intrinsic base of the device; and creating tensile strain in the device to increase mobility ... | 09/05/2006 |
| 7064415 | Self-aligned bipolar transistor having increased manufacturability According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated o... | 06/20/2006 |
| 7041564 | Method for fabricating a self-aligned bipolar transistor According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a sacrificial post which, in one exemplary embodiment, is situated between first and second link spacers. The bipolar transist... | 05/09/2006 |
| 7033898 | Method for fabricating a self-aligned bipolar transistor having recessed spacers According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a first link spacer and a second link spacer situated on the top surface of the base. The bipolar transistor further comprises... | 04/25/2006 |
| 7022578 | Heterojunction bipolar transistor using reverse emitter window A heterojunction bipolar transistor (HBT), and manufacturing method therefor, comprising a semiconductor substrate having a collector region, an intrinsic base region of a compound semiconductive material over the collector region, an extrinsic base region, an emitt... | 04/04/2006 |
| 7018865 | Method of protecting an element of an integrated circuit against the formation of a metal silicide A semiconductor material is protected against the formation of a metal silicide by forming a layer of a silicon/germanium alloy on the material. The material which is protected belongs to a component of an integrated circuit comprising other components that have to ... | 03/28/2006 |
| 6992328 | Semiconductor device and manufacturing method thereof By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce po... | 01/31/2006 |
| 6979626 | Method for fabricating a self-aligned bipolar transistor having increased manufacturability and related structure According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated o... | 12/27/2005 |
| 6962842 | Method of removing a sacrificial emitter feature in a BICMOS process with a super self-aligned BJT A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited u... | 11/08/2005 |
| 6894328 | Self-aligned bipolar transistor having recessed spacers and method for fabricating same According to one exemplary embodiment, a bipolar transistor includes a base having a top surface. The bipolar transistor further includes a first link spacer and a second link spacer situated on the top surface of the base. The bipolar transistor further includes a ... | 05/17/2005 |
| 6881640 | Fabrication method for heterojunction bipolar transistor A fabrication method for heterojunction bipolar transistor is disclosed. The method uses ISSG oxide instead of conventional PECVD oxide so that the base/emitter interface damage can be reduced. Moreover, the invention replaces the conventional emitter-window/space m... | 04/19/2005 |
| 6869853 | Fabrication of a bipolar transistor using a sacrificial emitter In one embodiment, a transistor is fabricated by forming a sacrificial emitter over a base, forming an oxide layer over the sacrificial emitter, removing a portion of the oxide layer, and then removing the sacrificial emitter. An emitter is later formed in the space... | 03/22/2005 |
| 6867080 | Polysilicon tilting to prevent geometry effects during laser thermal annealing A method is provided for eliminating uneven heating of substrate active areas during laser thermal annealing (LTA) due to variations in gate electrode density. Embodiments include adding dummy structures, formed simultaneously with the gate electrodes, to “fill in... | 03/15/2005 |
| 6818520 | Method for controlling critical dimension in an HBT emitter According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base. The heterojunction bipolar transistor further comprises a first nitride spacer and a second nitride spacer situated on the base, where the first nitride spacer and the secon... | 11/16/2004 |
| 6812107 | Method for improved alignment tolerance in a bipolar transistor According to one exemplary embodiment, a method for fabricating a bipolar transistor, such as a heterojunction bipolar transistor (“HBT”), comprises fabricating a first inner spacer and a second inner spacer on a top surface of a base. The method further compris... | 11/02/2004 |
| 6790722 | Logic SOI structure, process and application for vertical bipolar transistor A method and structure for forming an emitter in a vertical bipolar transistor includes providing a substrate having a collector layer and a base layer over the collector layer, forming a patterning mask over the collector layer, and filling openings in the mask wit... | 09/14/2004 |
| 6777302 | Nitride pedestal for raised extrinsic base HBT process A method of fabricating a high-performance, raised extrinsic base HBT having a narrow emitter width is provided. In accordance with the method, a patterned nitride pedestal region and inner spacers are employed to reduce the width of an emitter opening. The reduced ... | 08/17/2004 |
| 6716711 | Method for fabricating a self-aligned emitter in a bipolar transistor In one disclosed embodiment, a silicon-germanium base is formed, which includes an extrinsic base region, a link base region, and an intrinsic base region. An etch stop layer, which can be silicon oxide, is deposited over the silicon-germanium base. A polycrystallin... | 04/06/2004 |
| 6680235 | Method for fabricating a selective eptaxial HBT emitter According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a top surface. The heterojunction bipolar transistor further comprises an epitaxial emitter selectively situated on the top surface of the base. For example... | 01/20/2004 |
| 6639257 | Hetero-junction bipolar transistor having a dummy electrode A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a s... | 10/28/2003 |
| 6617220 | Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base An epitaxial base bipolar transistor including an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on a portion of the single crystal layer; a raised extrinsic base on a surface of the semiconductor substrate; an insul... | 09/09/2003 |
| 6573540 | Semiconductor device and method for fabricating the same A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a s... | 06/03/2003 |
| 6569744 | Method of converting a metal oxide semiconductor transistor into a bipolar transistor The present invention provides a method of manufacturing a bipolar transistor. The method includes producing an opening in a dielectric layer located over a substrate and forming a collector in the substrate by implanting a first dopant through the openin... | 05/27/2003 |
| 6551889 | Method of producing a SI-GE base heterojunction bipolar device A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. Afte... | 04/22/2003 |
