Did You Know...
...that one person who claimed to be the inventor of the television is Russian emigre Vladimir Zworykin? In 1929 David Sarnoff, founder of RCA, asked Zworykin what it would take to develop TV for commercial use. He said: a year and a half and $100,000. In reality, it took 20 years and $50 million! Before his death in 1982 at the age of 92, Zworykin said of his invention: "The technique is wonderful. It is beyond my expectations. But the programs! I would never let my children even come close to this thing."
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| Number | Title | Issue Date |
| 7678588 | Method for constructing module for optical critical dimension (OCD) and measuring method of module for optical critical dimension using the module An optical critical dimension measuring method, applicable in measuring a pattern, that includes a plurality of polysilicon layers, of a device, is provided. The method includes obtaining a real curve corresponding to the to-be-measured device. Then, determining whe... | 03/16/2010 |
| 7678587 | Cantilever-type probe and method of fabricating the same Disclosed is a cantilever-type probe and methods of fabricating the same. The probe is comprised of a cantilever being longer lengthwise relative to the directions of width and height, and a tip extending from the bottom of the cantilever and formed at an end of the... | 03/16/2010 |
| 7674636 | Dynamic temperature backside gas control for improved within-substrate process uniformity A method and apparatus are provided to control the radial or non-radial temperature distribution across a substrate during processing to compensate for non-uniform effects, including radial and angular non-uniformities arising from system variations, or process vari... | 03/09/2010 |
| 7674635 | Method of manufacturing a semiconductor device The present invention supplies a manufacturing method of a semiconductor device, which includes a non-contact inspection process capable of confirming if a circuit or circuit element formed on an array substrate is normally performed and can decrease a manufacturing... | 03/09/2010 |
| 7670857 | Inspection method, manufacturing method of piece for analysis, analysis method, analyzer, manufacturing method of SOI wafer, and SOI wafer An inspection method is provided for accurate measurement of conductive materials as defects within a silicon oxide film base material embedded in a SOI wafer sample. In the method, the internal state of a sample 2 is inspected by measuring an conductive mate... | 03/02/2010 |
| 7662648 | Integrated circuit inspection system Methods and systems that include a nanotube used as an emitter in the testing and fabrication of integrated circuits. The nanotube emits a signal to a substrate. Based on the signal or the electrical properties, e.g., current induced in the substrate by the signal, ... | 02/16/2010 |
| 7659126 | Electrical test method and apparatus An electrical test method and apparatus are disclosed. In the method one or more ring oscillators are formed in one or more layers prior to formation of a metal 1 layer of a semiconductor wafer. The one or more layers comprise the formulation of transistors and loca... | 02/09/2010 |
| 7651873 | Method relating to the accurate positioning of a semiconductor wafer Disclosed is a method involving repeatedly measuring a pressure within a flow of processing gas that is provided in a semiconductor processing apparatus for treatment of a semiconductor substrate, such as a semiconductor wafer. The flow of processing gas is made to ... | 01/26/2010 |
| 7648848 | Semiconductor integrated circuit production method and device including preparing a plurality of SOI substrates, grouping SOI substrates having mutual similarities and adjusting their layer thicknesses simultaneously A semiconductor integrated circuit production method prepares an SOI layer thickness database that correlates measurement data of each SOI layer thickness with each SOI substrate identification data. The production method extracts the measurement data for each SOI s... | 01/19/2010 |
| 7645620 | Method and structure for reducing prior level edge interference with critical dimension measurement A method for reducing edge effect interference with critical dimension (CD) measurement of semiconductor via structures includes forming a test structure in a kerf region of a semiconductor wafer, the test structure including at least a via structure and a trench st... | 01/12/2010 |
| 7642101 | Semiconductor device having in-chip critical dimension and focus patterns A semiconductor device is fabricated to include one or more sets of calibration patterns used to measure line pitch and line focus. ... | 01/05/2010 |
| 7642100 | Method and system for yield and productivity improvements in semiconductor processing A semiconductor processing method includes processing a first substrate while detecting at least one first processing parameter value in a first apparatus. The first processing parameter is analyzed, thereby yielding at least one first predicted parameter value. The... | 01/05/2010 |
| 7642102 | Real-time parameter tuning using wafer thickness The invention can provide a method of processing a wafer using a Real-Time Parameter Tuning (RTPT) procedure to receive an input message that can include a pass-through message, a real-time feedforward message, or a real-time optimization message, or any combination... | 01/05/2010 |
| 7629184 | RFID temperature sensing wafer, system and method A method of manufacturing semiconductor wafers is provided that comprises processing a semiconductor wafer to form at least one temperature-sensing RF device on the wafer and further processing the wafer to form a plurality of semiconductor products on the wafer whi... | 12/08/2009 |
| 7622310 | Contamination monitoring and control techniques for use with an optical metrology instrument A technique is provided for generating and subsequently monitoring the controlled environment(s) within an optical metrology instrument in such a manner as to minimize absorbing species within the light path of the metrology instrument and to minimize the build-up o... | 11/24/2009 |
| 7622309 | Mechanical integrity evaluation of low-k devices with bump shear A bump shear test is disclosed for evaluating the mechanical integrity of low-k interconnect stacks in an integrated circuit which includes a die test structure (11) having a stiff structural component (501, 502) positioned above and affixed to a condu... | 11/24/2009 |
| 7595204 | Methods and systems for determining trapped charge density in films Methods and systems for determining a charge trap density between a semiconductor material and a dielectric material are disclosed. In one respect, spectroscopic data of the semiconductor material may be determined and used to determine a change in dielectric functi... | 09/29/2009 |
| 7595205 | Using reverse arrangement for trend test in statistical process control for manufacture of semiconductor integrated circuits A method for manufacturing semiconductor devices or other types of devices and/or entities. The method includes providing a process (e.g., etching, deposition, implantation) associated with a manufacture of a semiconductor device/ The method includes collecting a pl... | 09/29/2009 |
| 7588947 | Method of evaluating semiconductor device and method of manufacturing semiconductor device The method of evaluating a semiconductor device having plural semiconductor elements comprised of an insulating film and an electrode on a semiconductor substrate including, dividing the surface of the semiconductor substrate into plural measurement regions comprisi... | 09/15/2009 |
| 7585685 | Method of determining wafer voltage in a plasma reactor from applied bias voltage and current and a pair of constants The voltage of a wafer on the pedestal of an RF plasma reactor is instantly determined from the applied bias current and the applied bias voltage sampled during plasma processing of the wafer using a pair constants. Prior to plasma processing of the wafer, a determi... | 09/08/2009 |
| 7585684 | Method and apparatus for detecting backside particles during wafer processing A method and apparatus for detecting backside particles during wafer processing is provided. The method includes forming layers on a front side of a wafer, holding a backside of the wafer on a top surface of a chuck, cooling the wafer by ejecting gas toward the back... | 09/08/2009 |
| 7582491 | Method for diagnosing electrostatic chuck, vacuum processing apparatus, and storage medium A method for diagnosing temporal deterioration of temperature controlling performance of an electrostatic chuck includes the steps of performing vacuum processing on the substrate wherein the substrate is adsorbed by the electrostatic chuck while a temperature contr... | 09/01/2009 |
| 7572649 | Device transferring system, device transferring method, and display manufacturing method A device transferring system includes a first substrate support portion on which to mount a first substrate, a second substrate support portion for supporting a second substrate opposed to the first substrate, a swinging unit for regulating the position of the first... | 08/11/2009 |
| 7569403 | Pattern evaluation method, manufacturing method of semiconductor device, correction method of mask pattern and manufacturing method of exposure mask A pattern evaluation method using a circuit arrangement provided with N (N is a natural number of 2 or greater) circuit groups having wiring whose widths are different to each other, each circuit group including first to Mth circuits having first to Mth (M is a natu... | 08/04/2009 |
| 7556971 | Testing electromigration at multiple points of a single node Systems and methods for testing the reliability of a semiconductor component are disclosed herein. One embodiment of a method for testing reliability, among others, comprises providing simulation code of a standard cell, wherein the standard cell represents the semi... | 07/07/2009 |
| 7556972 | Detection and characterization of SiCOH-based dielectric materials during device fabrication Processes and apparatuses are disclosed for detecting and characterizing SiCOH-based dielectric materials during integrated circuit fabrication. The processes generally include chromatographically analyzing a fluid stream generated during a process employed for devi... | 07/07/2009 |
| 7553679 | Method of determining plasma ion density, wafer voltage, etch rate and wafer current from applied bias voltage and current Plasma parameters such as plasma ion density, wafer voltage, etch rate and wafer current in the chamber are determined from external measurements on the applied RF bias electrical parameters such as voltage and current. The method includes sensing RF parameters corr... | 06/30/2009 |
| 7553678 | Method for detecting semiconductor manufacturing conditions A method for detecting semiconductor-manufacturing conditions includes providing a photomask with a plurality of pattern areas each having a plurality of test lines with different pitches, exposing a plurality of wafer with the photomask in different manufacturing c... | 06/30/2009 |
| 7547561 | Advanced process control model incorporating a target offset term An advanced process control (APC) architecture comprising a process model that incorporates a target offset term is provided. The APC architecture may be applied to a so-called develop inspect critical dimension (DICD) model using the target offset term to correct a... | 06/16/2009 |
| 7537942 | Counting circuit for controlling an off-chip driver and method of changing and output current value of the off-chip driver using the same Provided is a method of changing an output current value of an off-chip driver by means of a counting circuit including pluralities of fuses for controlling the off-chip driver, that includes measuring the output current value of the off-chip driver after completing... | 05/26/2009 |
| 7537941 | Variable overlap of dummy shapes for improved rapid thermal anneal uniformity Embodiments of the invention provide a method, structure, service, etc. for variable overlap of dummy shapes for improved rapid thermal anneal uniformity. A method of providing uniform temperatures across a limited region of a wafer during a rapid thermal anneal pro... | 05/26/2009 |
| 7537940 | Method of manufacturing electronic device capable of controlling threshold voltage and ion implanter controller and system that perform the method A method of manufacturing an electronic device, which can obtain sufficient manufacturing margins and reduce a defect rate by compensating for a threshold voltage variation caused by the variation of a critical dimension (CD) of a gate electrode. An ion implanter co... | 05/26/2009 |
| 7537939 | System and method for characterizing lithography effects on a wafer In the manufacture of semiconductors, it is often necessary to characterize the effect of line width and line width shape on yield. In an example embodiment, there is a method (200) for randomizing exposure conditions across a substrate. The method comprises ... | 05/26/2009 |
| 7534630 | Method of improving power distribution in wirebond semiconductor packages A semiconductor package comprising a die adjacent a substrate, a supporting plate adjacent the die, and a conducting plate abutting the supporting plate and electrically coupled to a metal apparatus adjacent the substrate and the die using a plurality of bond wires.... | 05/19/2009 |
| 7534629 | Manufacturing method of semiconductor integrated circuit device By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each push... | 05/19/2009 |
| 7531369 | Process endpoint detection method using broadband reflectometry A method of determining a parameter of interest during processing of a patterned substrate includes obtaining a measured net reflectance spectrum resulting from illuminating at least a portion of the patterned substrate with a light beam having a broadband spectrum,... | 05/12/2009 |
| 7527987 | Fast localization of electrical failures on an integrated circuit system and method Fast localization of electrically measured defects of integrated circuits includes providing information for fabricating a test chip having test structures configured for parallel electrical testing. The test structures on the test chip are electrically tested emplo... | 05/05/2009 |
| 7524682 | Method for monitoring temperature in thermal process A method for monitoring a temperature in a thermal process is described. A monitor substrate is provided and subject to ion implantation, and a characteristic parameter of the monitor substrate correlated to the disorder degree of the lattice structure of the same i... | 04/28/2009 |
| 7524683 | Method of monitoring a semiconductor manufacturing trend A method of monitoring trends in semiconductor processes is provided. Lot values are assigned to each of a set of wafer lots prior to performing semiconductor processes. After at least some of the semiconductor processes, at least some of the wafer lots are tested t... | 04/28/2009 |
| 7521265 | Method for measuring an amount of strain of a bonded strained wafer In a method for measuring an amount of strain of a bonded strained wafer, at least one strained layer is formed on a single crystal substrate. The bonded strained wafer is measured with respect to two asymmetric diffraction planes with diffraction plane indices (XYZ... | 04/21/2009 |